> Date: Sun, 12 Jul 2020 19:30:38 +0200
> From: Christian Weisgerber
>
> Mark Kettenis:
>
> > > Date: Sun, 12 Jul 2020 18:12:39 +0200
> > > From: Christian Weisgerber
> > >
> > > The PowerPC/Power ISA Time Base is a 64-bit register. We can use
> > > the full lower 32 bits.
> > >
> > > OK?
>
Mark Kettenis:
> > Date: Sun, 12 Jul 2020 18:12:39 +0200
> > From: Christian Weisgerber
> >
> > The PowerPC/Power ISA Time Base is a 64-bit register. We can use
> > the full lower 32 bits.
> >
> > OK?
>
> Sure, but this needs to be coordinated with the userland diff.
No.
> Date: Sun, 12 Jul 2020 18:23:09 +0200
> From: Christian Weisgerber
>
> Christian Weisgerber:
>
> > - tb_get_timecount, NULL, 0x7fff, 0, "tb", 0, NULL, 0
> > + tb_get_timecount, NULL, 0x, 0, "tb", 0, NULL, 0
>
> PS: Do we prefer ~0u over 0x?
I prefer 0x. We
> Date: Sun, 12 Jul 2020 18:12:39 +0200
> From: Christian Weisgerber
>
> The PowerPC/Power ISA Time Base is a 64-bit register. We can use
> the full lower 32 bits.
>
> OK?
Sure, but this needs to be coordinated with the userland diff. And
we'd better change it quick because doing it later is
Christian Weisgerber:
> - tb_get_timecount, NULL, 0x7fff, 0, "tb", 0, NULL, 0
> + tb_get_timecount, NULL, 0x, 0, "tb", 0, NULL, 0
PS: Do we prefer ~0u over 0x?
--
Christian "naddy" Weisgerber na...@mips.inka.de
The PowerPC/Power ISA Time Base is a 64-bit register. We can use
the full lower 32 bits.
OK?
Index: arch/macppc/macppc/clock.c
===
RCS file: /cvs/src/sys/arch/macppc/macppc/clock.c,v
retrieving revision 1.44
diff -u -p -r1.44
