date:20121007

Re: Scheduler improvements

2012-10-07 Thread Gregor Best

 [...]
 I don't think changing the idle loop like this is ok.  You want to
 continue checking whether the runqueue is empty in between
 cpu_idle_enter() and cpu_idle_leave().
 [...]

Fair point. I'll change that :)

-- 
Gregor Best

fix athn(4) rfkill switch detection for ar9003

2012-10-07 Thread Stefan Sperling

As reported a while ago (see
http://marc.info/?l=openbsd-miscm=132911890531492w=2)
athn(4) attaches to some ar9003 chips but fails to get past the hardware
rfkill switch. It always reports radio is disabled by hardware switch
regardless of the actual state of the switch.

I've got an ar9485 which the in-tree athn(4) does not yet attach to.
It belongs to the same chip family and also has the rfkill switch
problem so I could diagnose it.

The bug is that the ar9003 gpio support code reads the wrong register
to obtain the value of an gpio input pin. This diff makes gpio read
code match the Linux driver and fixes rfkill switch state detection.

I doubt that ar9300 cards will work properly with this patch. In my case
the driver now fails a little later while trying to perform TX calibration.
Will try looking into that next...

ok?

Index: ar9003.c
===
RCS file: /cvs/src/sys/dev/ic/ar9003.c,v
retrieving revision 1.23
diff -u -p -r1.23 ar9003.c
--- ar9003.c25 Aug 2012 12:14:31 -  1.23
+++ ar9003.c7 Oct 2012 14:56:18 -
@@ -503,7 +506,7 @@ int
 ar9003_gpio_read(struct athn_softc *sc, int pin)
 {
KASSERT(pin  sc-ngpiopins);
-   return ((AR_READ(sc, AR_GPIO_IN_OUT)  pin)  1);
+   return ((AR_READ(sc, AR_GPIO_IN)  (1  pin)) != 0);
 }
 
 void
Index: ar9003reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9003reg.h,v
retrieving revision 1.7
diff -u -p -r1.7 ar9003reg.h
--- ar9003reg.h 1 Jan 2011 13:44:42 -   1.7
+++ ar9003reg.h 7 Oct 2012 14:49:25 -
@@ -25,6 +25,8 @@
 #define AR_ISR_S4_S0x00d8
 #define AR_ISR_S5_S0x00dc
 #define AR_GPIO_IN_OUT 0x4048
+#define AR_GPIO_IN 0x404c
+#define AR9300_GPIO_IN_VAL 0x0001
 #define AR_GPIO_OE_OUT 0x4050
 #define AR_GPIO_INTR_POL   0x4058
 #define AR_GPIO_INPUT_EN_VAL   0x405c
Index: ar9380.c
===
RCS file: /cvs/src/sys/dev/ic/ar9380.c,v
retrieving revision 1.15
diff -u -p -r1.15 ar9380.c
--- ar9380.c10 Jun 2012 21:23:36 -  1.15
+++ ar9380.c6 Oct 2012 18:21:33 -
@@ -148,7 +150,11 @@ ar9380_setup(struct athn_softc *sc)
if (base-rfSilent  AR_EEP_RFSILENT_ENABLED) {
sc-flags |= ATHN_FLAG_RFSILENT;
/* Get GPIO pin used by hardware radio switch. */
-   sc-rfsilent_pin = base-wlanDisableGpio;
+   sc-rfsilent_pin = MS(base-rfSilent,
+   AR_EEP_RFSILENT_GPIO_SEL);
+   /* Get polarity of hardware radio switch. */
+   if (base-rfSilent  AR_EEP_RFSILENT_POLARITY)
+   sc-flags |= ATHN_FLAG_RFSILENT_REVERSED;
}
 
/* Set the number of HW key cache entries. */
Index: ar9380reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9380reg.h,v
retrieving revision 1.17
diff -u -p -r1.17 ar9380reg.h
--- ar9380reg.h 10 Jun 2012 21:23:36 -  1.17
+++ ar9380reg.h 6 Oct 2012 18:21:07 -
@@ -75,6 +75,8 @@ struct ar9380_base_eep_hdr {
uint8_t eepMisc;
uint8_t rfSilent;
 #define AR_EEP_RFSILENT_ENABLED0x0001
+#define AR_EEP_RFSILENT_GPIO_SEL_M 0x001c
+#define AR_EEP_RFSILENT_GPIO_SEL_S 2
 #define AR_EEP_RFSILENT_POLARITY   0x0002
 
uint8_t blueToothOptions;

update athn(4) ar9485 initvals (please test on any athn(4))

2012-10-07 Thread Stefan Sperling

The init values athn(4) has for the ar9485 are for version 1.0 of
this chip, which according to Atheros Linux developers was never sold:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=commitdiff;h=903946e6e21ef4dd678acafb8881cabde9182caf

This diff updates the initvals to what the Linux driver is using
for the 1.1 generation of the ar9485.

Because the serdes values are written to different registers on the
ar9485 I had to tweak code for other athn(4) devices, too. So please
test this on any athn(4) to make sure there are no regressions. Thanks!

Index: ar5416reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar5416reg.h,v
retrieving revision 1.4
diff -u -p -r1.4 ar5416reg.h
--- ar5416reg.h 10 Jun 2012 21:23:36 -  1.4
+++ ar5416reg.h 7 Oct 2012 16:05:08 -
@@ -811,6 +811,20 @@ static const uint32_t ar5416_bank6_vals[
 /*
  * Serializer/Deserializer programming.
  */
+
+static const uint32_t ar5416_serdes_regs[] = {
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES2
+};
+
 static const uint32_t ar5416_serdes_vals[] = {
0x9248fc00,
0x24924924,
@@ -821,10 +835,12 @@ static const uint32_t ar5416_serdes_vals
0x001defff,
0x1aaabe40,
0xbe105554,
-   0x000e3007
+   0x000e3007,
+   0x
 };
 
 static const struct athn_serdes ar5416_serdes = {
nitems(ar5416_serdes_vals),
-   ar5416_serdes_vals
+   ar5416_serdes_regs,
+   ar5416_serdes_vals,
 };
Index: ar9280reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9280reg.h,v
retrieving revision 1.5
diff -u -p -r1.5 ar9280reg.h
--- ar9280reg.h 10 Jun 2012 21:23:36 -  1.5
+++ ar9280reg.h 7 Oct 2012 16:05:08 -
@@ -586,6 +586,21 @@ static const struct athn_gain ar9280_2_0
 /*
  * Serializer/Deserializer programming.
  */
+
+static const uint32_t ar9280_2_0_serdes_regs[] = {
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES,
+   AR_PCIE_SERDES2,
+};
+
 static const uint32_t ar9280_2_0_serdes_vals[] = {
0x9248fd00,
0x24924924,
@@ -599,10 +614,12 @@ static const uint32_t ar9280_2_0_serdes_
 #endif
0x1aaabe41,
0xbe105554,
-   0x00043007
+   0x00043007,
+   0x
 };
 
 static const struct athn_serdes ar9280_2_0_serdes = {
nitems(ar9280_2_0_serdes_vals),
+   ar9280_2_0_serdes_regs,
ar9280_2_0_serdes_vals
 };
Index: ar9380.c
===
RCS file: /cvs/src/sys/dev/ic/ar9380.c,v
retrieving revision 1.15
diff -u -p -r1.15 ar9380.c
--- ar9380.c10 Jun 2012 21:23:36 -  1.15
+++ ar9380.c7 Oct 2012 16:05:08 -
@@ -117,11 +117,13 @@ ar9380_attach(struct athn_softc *sc)
sc-cca_max_2g = AR9380_PHY_CCA_MAX_GOOD_VAL_2GHZ;
sc-cca_min_5g = AR9380_PHY_CCA_MIN_GOOD_VAL_5GHZ;
sc-cca_max_5g = AR9380_PHY_CCA_MAX_GOOD_VAL_5GHZ;
-   if (AR_SREV_9485(sc))
-   sc-ini = ar9485_1_0_ini;
-   else
+   if (AR_SREV_9485(sc)) {
+   sc-ini = ar9485_1_1_ini;
+   sc-serdes = ar9485_1_1_serdes;
+   } else {
sc-ini = ar9380_2_2_ini;
-   sc-serdes = ar9380_2_2_serdes;
+   sc-serdes = ar9380_2_2_serdes;
+   }
 
return (ar9003_attach(sc));
 }
@@ -179,7 +181,7 @@ ar9380_setup(struct athn_softc *sc)
else
sc-rx_gain = ar9380_2_2_rx_gain;
} else
-   sc-rx_gain = ar9485_1_0_rx_gain;
+   sc-rx_gain = ar9485_1_1_rx_gain;
 
/* Select initialization values based on ROM. */
type = MS(eep-baseEepHeader.txrxgain, AR_EEP_TX_GAIN);
@@ -193,7 +195,7 @@ ar9380_setup(struct athn_softc *sc)
else
sc-tx_gain = ar9380_2_2_tx_gain;
} else
-   sc-tx_gain = ar9485_1_0_tx_gain;
+   sc-tx_gain = ar9485_1_1_tx_gain;
 }
 
 const uint8_t *
Index: ar9380reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9380reg.h,v
retrieving revision 1.17
diff -u -p -r1.17 ar9380reg.h
--- ar9380reg.h 10 Jun 2012 21:23:36 -  1.17
+++ ar9380reg.h 7 Oct 2012 16:05:08 -
@@ -1107,12 +1107,12 @@ static const struct athn_ini ar9380_2_2_
 };
 
 /*
- * AR9485 1.0 programming.
+ * AR9485 1.1 programming.
  */
-static const uint16_t ar9485_1_0_regs[] = {
+
+static const uint16_t ar9485_1_1_regs[] = {
P(0x01030), P(0x01070), P(0x010b0), P(0x08014), P(0x0801c),
-   P(0x08120), P(0x081d0),

Re: fix athn(4) rfkill switch detection for ar9003

2012-10-07 Thread Mark Kettenis

 Date: Sun, 7 Oct 2012 18:02:23 +0200
 From: Stefan Sperling s...@openbsd.org

 As reported a while ago (see
 http://marc.info/?l=openbsd-miscm=132911890531492w=2)
 athn(4) attaches to some ar9003 chips but fails to get past the hardware
 rfkill switch. It always reports radio is disabled by hardware switch
 regardless of the actual state of the switch.

 I've got an ar9485 which the in-tree athn(4) does not yet attach to.
 It belongs to the same chip family and also has the rfkill switch
 problem so I could diagnose it.

 The bug is that the ar9003 gpio support code reads the wrong register
 to obtain the value of an gpio input pin. This diff makes gpio read
 code match the Linux driver and fixes rfkill switch state detection.

 I doubt that ar9300 cards will work properly with this patch. In my case
 the driver now fails a little later while trying to perform TX calibration.
 Will try looking into that next...

 ok?

Hmm, the AR9300_GPIO_IN_VAL define you introduce isn't actually used.
Not terribly important, but you could leave that one out.  Either way:

ok kettenis@

 Index: ar9003.c
 ===
 RCS file: /cvs/src/sys/dev/ic/ar9003.c,v
 retrieving revision 1.23
 diff -u -p -r1.23 ar9003.c
 --- ar9003.c  25 Aug 2012 12:14:31 -  1.23
 +++ ar9003.c  7 Oct 2012 14:56:18 -
 @@ -503,7 +506,7 @@ int
  ar9003_gpio_read(struct athn_softc *sc, int pin)
  {
   KASSERT(pin  sc-ngpiopins);
 - return ((AR_READ(sc, AR_GPIO_IN_OUT)  pin)  1);
 + return ((AR_READ(sc, AR_GPIO_IN)  (1  pin)) != 0);
  }

  void
 Index: ar9003reg.h
 ===
 RCS file: /cvs/src/sys/dev/ic/ar9003reg.h,v
 retrieving revision 1.7
 diff -u -p -r1.7 ar9003reg.h
 --- ar9003reg.h   1 Jan 2011 13:44:42 -   1.7
 +++ ar9003reg.h   7 Oct 2012 14:49:25 -
 @@ -25,6 +25,8 @@
  #define AR_ISR_S4_S  0x00d8
  #define AR_ISR_S5_S  0x00dc
  #define AR_GPIO_IN_OUT   0x4048
 +#define AR_GPIO_IN   0x404c
 +#define AR9300_GPIO_IN_VAL   0x0001
  #define AR_GPIO_OE_OUT   0x4050
  #define AR_GPIO_INTR_POL 0x4058
  #define AR_GPIO_INPUT_EN_VAL 0x405c
 Index: ar9380.c
 ===
 RCS file: /cvs/src/sys/dev/ic/ar9380.c,v
 retrieving revision 1.15
 diff -u -p -r1.15 ar9380.c
 --- ar9380.c  10 Jun 2012 21:23:36 -  1.15
 +++ ar9380.c  6 Oct 2012 18:21:33 -
 @@ -148,7 +150,11 @@ ar9380_setup(struct athn_softc *sc)
   if (base-rfSilent  AR_EEP_RFSILENT_ENABLED) {
   sc-flags |= ATHN_FLAG_RFSILENT;
   /* Get GPIO pin used by hardware radio switch. */
 - sc-rfsilent_pin = base-wlanDisableGpio;
 + sc-rfsilent_pin = MS(base-rfSilent,
 + AR_EEP_RFSILENT_GPIO_SEL);
 + /* Get polarity of hardware radio switch. */
 + if (base-rfSilent  AR_EEP_RFSILENT_POLARITY)
 + sc-flags |= ATHN_FLAG_RFSILENT_REVERSED;
   }

   /* Set the number of HW key cache entries. */
 Index: ar9380reg.h
 ===
 RCS file: /cvs/src/sys/dev/ic/ar9380reg.h,v
 retrieving revision 1.17
 diff -u -p -r1.17 ar9380reg.h
 --- ar9380reg.h   10 Jun 2012 21:23:36 -  1.17
 +++ ar9380reg.h   6 Oct 2012 18:21:07 -
 @@ -75,6 +75,8 @@ struct ar9380_base_eep_hdr {
   uint8_t eepMisc;
   uint8_t rfSilent;
  #define AR_EEP_RFSILENT_ENABLED  0x0001
 +#define AR_EEP_RFSILENT_GPIO_SEL_M   0x001c
 +#define AR_EEP_RFSILENT_GPIO_SEL_S   2
  #define AR_EEP_RFSILENT_POLARITY 0x0002

   uint8_t blueToothOptions;

Re: fix athn(4) rfkill switch detection for ar9003

2012-10-07 Thread Stefan Sperling

On Sun, Oct 07, 2012 at 07:41:58PM +0200, Mark Kettenis wrote:
 Hmm, the AR9300_GPIO_IN_VAL define you introduce isn't actually used.

Thanks, I forgot about using it.

Not sure if it is important though maybe the upper bits of the
register aren't always stable? In any case we should just use
the bit mask like Linux does.

Index: ar9003.c
===
RCS file: /cvs/src/sys/dev/ic/ar9003.c,v
retrieving revision 1.23
diff -u -p -r1.23 ar9003.c
--- ar9003.c25 Aug 2012 12:14:31 -  1.23
+++ ar9003.c7 Oct 2012 21:26:18 -
@@ -503,7 +503,8 @@ int
 ar9003_gpio_read(struct athn_softc *sc, int pin)
 {
KASSERT(pin  sc-ngpiopins);
-   return ((AR_READ(sc, AR_GPIO_IN_OUT)  pin)  1);
+   return (((AR_READ(sc, AR_GPIO_IN)  AR9300_GPIO_IN_VAL) 
+   (1  pin)) != 0);
 }
 
 void
Index: ar9003reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9003reg.h,v
retrieving revision 1.7
diff -u -p -r1.7 ar9003reg.h
--- ar9003reg.h 1 Jan 2011 13:44:42 -   1.7
+++ ar9003reg.h 7 Oct 2012 21:26:18 -
@@ -25,6 +25,8 @@
 #define AR_ISR_S4_S0x00d8
 #define AR_ISR_S5_S0x00dc
 #define AR_GPIO_IN_OUT 0x4048
+#define AR_GPIO_IN 0x404c
+#define AR9300_GPIO_IN_VAL 0x0001
 #define AR_GPIO_OE_OUT 0x4050
 #define AR_GPIO_INTR_POL   0x4058
 #define AR_GPIO_INPUT_EN_VAL   0x405c
Index: ar9380.c
===
RCS file: /cvs/src/sys/dev/ic/ar9380.c,v
retrieving revision 1.15
diff -u -p -r1.15 ar9380.c
--- ar9380.c10 Jun 2012 21:23:36 -  1.15
+++ ar9380.c7 Oct 2012 21:26:18 -
@@ -148,7 +148,11 @@ ar9380_setup(struct athn_softc *sc)
if (base-rfSilent  AR_EEP_RFSILENT_ENABLED) {
sc-flags |= ATHN_FLAG_RFSILENT;
/* Get GPIO pin used by hardware radio switch. */
-   sc-rfsilent_pin = base-wlanDisableGpio;
+   sc-rfsilent_pin = MS(base-rfSilent,
+   AR_EEP_RFSILENT_GPIO_SEL);
+   /* Get polarity of hardware radio switch. */
+   if (base-rfSilent  AR_EEP_RFSILENT_POLARITY)
+   sc-flags |= ATHN_FLAG_RFSILENT_REVERSED;
}
 
/* Set the number of HW key cache entries. */
Index: ar9380reg.h
===
RCS file: /cvs/src/sys/dev/ic/ar9380reg.h,v
retrieving revision 1.17
diff -u -p -r1.17 ar9380reg.h
--- ar9380reg.h 10 Jun 2012 21:23:36 -  1.17
+++ ar9380reg.h 7 Oct 2012 21:26:18 -
@@ -75,6 +75,8 @@ struct ar9380_base_eep_hdr {
uint8_t eepMisc;
uint8_t rfSilent;
 #define AR_EEP_RFSILENT_ENABLED0x0001
+#define AR_EEP_RFSILENT_GPIO_SEL_M 0x001c
+#define AR_EEP_RFSILENT_GPIO_SEL_S 2
 #define AR_EEP_RFSILENT_POLARITY   0x0002
 
uint8_t blueToothOptions;

Re: Scheduler improvements

fix athn(4) rfkill switch detection for ar9003

update athn(4) ar9485 initvals (please test on any athn(4))

Re: fix athn(4) rfkill switch detection for ar9003

Re: fix athn(4) rfkill switch detection for ar9003

5 matches

Site Navigation

Mail list logo

Footer information