octeon cnmac phy addresses

2013-09-14 Thread Jonathan Matthew
The network interfaces on the ubiquiti edgerouter lite don't work yet.
Here's the first step towards fixing that:

Mapping port numbers to phy addresses in the mii read/write functions
hides the phy addresses unnecessarily.  Instead, we should figure out
the phy address when setting up the port and pass it to mii_attach.

I don't have an octeon system that works with the existing code, so all
I can say is this doesn't make any difference on the edgerouter lite.
It uses different phy addresses, which I'll add a mapping for later.

ok?

Index: arch/octeon/dev/cn30xxgmx.c
===
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmx.c,v
retrieving revision 1.5
diff -u -p -r1.5 cn30xxgmx.c
--- arch/octeon/dev/cn30xxgmx.c 5 Dec 2012 23:20:14 -   1.5
+++ arch/octeon/dev/cn30xxgmx.c 14 Sep 2013 09:35:40 -
@@ -146,6 +146,11 @@ struct cn30xxgmx_port_ops *cn30xxgmx_por
[GMX_SPI42_PORT] = cn30xxgmx_port_ops_spi42
 };
 
+/* this apparently works for the portwell cam-0100 */
+int octeon_eth_phy_table[] = {
+   0x02, 0x03, 0x22
+};
+
 #ifdef OCTEON_ETH_DEBUG
 static void*cn30xxgmx_intr_drop_ih;
 struct evcnt   cn30xxgmx_intr_drop_evcnt =
@@ -178,6 +183,14 @@ cn30xxgmx_match(struct device *parent, v
return 1;
 }
 
+static int
+cn30xxgmx_port_phy_addr(int port)
+{
+   if (port = nitems(octeon_eth_phy_table))
+   return -1;
+   return octeon_eth_phy_table[port];
+}
+
 static void
 cn30xxgmx_attach(struct device *parent, struct device *self, void *aux)
 {
@@ -223,6 +236,9 @@ cn30xxgmx_attach(struct device *parent, 
gmx_aa.ga_port_type = sc-sc_port_types[i];
gmx_aa.ga_gmx = sc;
gmx_aa.ga_gmx_port = port_sc;
+   gmx_aa.ga_phy_addr = cn30xxgmx_port_phy_addr(i);
+   if (gmx_aa.ga_phy_addr == -1)
+   panic(: don't know phy address for port %d, i);
 
config_found_sm(self, gmx_aa,
cn30xxgmx_print, cn30xxgmx_submatch);
Index: arch/octeon/dev/cn30xxgmxvar.h
===
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmxvar.h,v
retrieving revision 1.1
diff -u -p -r1.1 cn30xxgmxvar.h
--- arch/octeon/dev/cn30xxgmxvar.h  16 Jun 2011 11:22:30 -  1.1
+++ arch/octeon/dev/cn30xxgmxvar.h  14 Sep 2013 09:35:40 -
@@ -136,6 +136,7 @@ struct cn30xxgmx_attach_args {
const char  *ga_name;
int ga_portno;
int ga_port_type;
+   int ga_phy_addr;
 
struct cn30xxgmx_softc *ga_gmx;
struct cn30xxgmx_port_softc
Index: arch/octeon/dev/if_cnmac.c
===
RCS file: /cvs/src/sys/arch/octeon/dev/if_cnmac.c,v
retrieving revision 1.11
diff -u -p -r1.11 if_cnmac.c
--- arch/octeon/dev/if_cnmac.c  17 Aug 2013 10:00:09 -  1.11
+++ arch/octeon/dev/if_cnmac.c  14 Sep 2013 09:35:40 -
@@ -259,15 +259,6 @@ static const struct octeon_evcnt_entry o
 };
 #endif
 
-/* XXX board-specific */
-static const int   octeon_eth_phy_table[] = {
-#if defined __seil5__
-   0x04, 0x01, 0x02
-#else
-   0x02, 0x03, 0x22
-#endif
-};
-
 /*  buffer management */
 
 static const struct octeon_eth_pool_param {
@@ -338,6 +329,7 @@ octeon_eth_attach(struct device *parent,
sc-sc_port_type = ga-ga_port_type;
sc-sc_gmx = ga-ga_gmx;
sc-sc_gmx_port = ga-ga_gmx_port;
+   sc-sc_phy_addr = ga-ga_phy_addr;
 
sc-sc_init_flag = 0;
 
@@ -549,30 +541,14 @@ static int
 octeon_eth_mii_readreg(struct device *self, int phy_no, int reg)
 {
struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
-   int phy_addr = octeon_eth_phy_table[phy_no];
-
-   if (sc-sc_port = (int)nitems(octeon_eth_phy_table) ||
-   phy_no != sc-sc_port) {
-   log(LOG_ERR,
-   mii read address mismatch, phy number %d.\n, phy_no);
-   return -1;
-   }
-   return cn30xxsmi_read(sc-sc_smi, phy_addr, reg);
+   return cn30xxsmi_read(sc-sc_smi, phy_no, reg);
 }
 
 static void
 octeon_eth_mii_writereg(struct device *self, int phy_no, int reg, int value)
 {
struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
-   int phy_addr = octeon_eth_phy_table[phy_no];
-
-   if (sc-sc_port = (int)nitems(octeon_eth_phy_table) ||
-   phy_no != sc-sc_port) {
-   log(LOG_ERR,
-   mii write address mismatch, phy number %d.\n, phy_no);
-   return;
-   }
-   cn30xxsmi_write(sc-sc_smi, phy_addr, reg, value);
+   cn30xxsmi_write(sc-sc_smi, phy_no, reg, value);
 }
 
 static void
@@ -606,7 +582,7 @@ octeon_eth_mediainit(struct octeon_eth_s
octeon_eth_mediastatus);
 
mii_attach(sc-sc_dev, sc-sc_mii,
-   0x, 

azalia acer quirks

2013-09-14 Thread Raphael Graf
Without this diff, I just get silence from an Acer Extensa 6700.
I don't know if this is the right way to fix it..
Comments?

Index: sys/dev/pci/azalia_codec.c
===
RCS file: /cvs/src/sys/dev/pci/azalia_codec.c,v
retrieving revision 1.154
diff -u -p -u -p -r1.154 azalia_codec.c
--- sys/dev/pci/azalia_codec.c  27 May 2013 21:19:31 -  1.154
+++ sys/dev/pci/azalia_codec.c  14 Sep 2013 10:41:31 -
@@ -74,6 +74,8 @@ azalia_codec_init_vtbl(codec_t *this)
break;
case 0x10ec0260:
this-name = Realtek ALC260;
+   if (this-subid == 0x008f1025)
+   this-qrks |= AZ_QRK_GPIO_UNMUTE_0;
break;
case 0x10ec0262:
this-name = Realtek ALC262;




azalia0 at pci0 dev 27 function 0 Intel 82801FB HD Audio rev 0x04: msi
azalia0: codecs: Realtek ALC260, Conexant/0x2bfa, using Realtek ALC260
audio0 at azalia0


Domain /dev/pci0:
 0:0:0: Intel 82915GM Host
0x: Vendor ID: 8086 Product ID: 2590
0x0004: Command: 0106 Status: 2090
0x0008: Class: 06 Subclass: 00 Interface: 00 Revision: 03
0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR empty ()
0x0014: BAR empty ()
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 1025 Product ID: 008f
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 00 Line: 00 Min Gnt: 00 Max Lat: 00
0x00e0: Capability 0x09: Vendor Specific
 0:2:0: Intel 82915GM Video
0x: Vendor ID: 8086 Product ID: 2592
0x0004: Command: 0007 Status: 0090
0x0008: Class: 03 Subclass: 00 Interface: 00 Revision: 03
0x000c: BIST: 00 Header Type: 80 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR mem 32bit addr: 0xb008/0x0008
0x0014: BAR io addr: 0x1800/0x0008
0x0018: BAR mem prefetchable 32bit addr: 0xc000/0x1000
0x001c: BAR mem 32bit addr: 0xb000/0x0004
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 1025 Product ID: 008f
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 01 Line: 0a Min Gnt: 00 Max Lat: 00
0x00d0: Capability 0x01: Power Management
 0:2:1: Intel 82915GM Video
0x: Vendor ID: 8086 Product ID: 2792
0x0004: Command:  Status: 0090
0x0008: Class: 03 Subclass: 80 Interface: 00 Revision: 03
0x000c: BIST: 00 Header Type: 80 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR mem 32bit addr: 0x/0x0008
0x0014: BAR empty ()
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 1025 Product ID: 008f
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 00 Line: 00 Min Gnt: 00 Max Lat: 00
0x00d0: Capability 0x01: Power Management
 0:27:0: Intel 82801FB HD Audio
0x: Vendor ID: 8086 Product ID: 2668
0x0004: Command: 0006 Status: 0010
0x0008: Class: 04 Subclass: 03 Interface: 00 Revision: 04
0x000c: BIST: 00 Header Type: 00 Latency Timer: 00 Cache Line Size: 00
0x0010: BAR mem 64bit addr: 0xd000c000/0x4000
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
0x0028: Cardbus CIS: 
0x002c: Subsystem Vendor ID: 1025 Product ID: 008f
0x0030: Expansion ROM Base Address: 
0x0038: 
0x003c: Interrupt Pin: 01 Line: 00 Min Gnt: 00 Max Lat: 00
0x0050: Capability 0x01: Power Management
0x0060: Capability 0x05: Message Signaled Interrupts (MSI)
0x0070: Capability 0x10: PCI Express
 0:28:0: Intel 82801FB PCIE
0x: Vendor ID: 8086 Product ID: 2660
0x0004: Command:  Status: 0010
0x0008: Class: 06 Subclass: 04 Interface: 00 Revision: 04
0x000c: BIST: 00 Header Type: 81 Latency Timer: 00 Cache Line Size: 08
0x0010: 
0x0014: 
0x0018: Primary Bus: 0 Secondary Bus: 9 Subordinate Bus: 9
Secondary Latency Timer: 00
0x001c: I/O Base: 00 I/O Limit: 00 Secondary Status: 2000
0x0020: Memory Base: fff0 Memory Limit: 
0x0024: Prefetch Memory Base: fff1 Prefetch Memory Limit: 0001
0x0028: Prefetch Memory Base Upper 32 Bits: 

Patriot Wireless N USB Adapter

2013-09-14 Thread Kyle R. W. Milz
Tech,

Recently purchased the Patriot PCUSBW1150 wireless adapter and it works
great with the urtwn driver. Perchance it can be added to the HARDWARE
section of the man page?

urtwn0 at uhub1 port 2 Realtek 802.11n WLAN Adapter rev 2.00/2.00 addr 3
urtwn0: MAC/BB RTL8188CUS, RF 6052 1T1R, address mac addr scrubbed



Re: Patriot Wireless N USB Adapter

2013-09-14 Thread Jason McIntyre
On Sat, Sep 14, 2013 at 11:21:04AM -0600, Kyle R. W. Milz wrote:
 Tech,
 
 Recently purchased the Patriot PCUSBW1150 wireless adapter and it works
 great with the urtwn driver. Perchance it can be added to the HARDWARE
 section of the man page?
 
 urtwn0 at uhub1 port 2 Realtek 802.11n WLAN Adapter rev 2.00/2.00 addr 3
 urtwn0: MAC/BB RTL8188CUS, RF 6052 1T1R, address mac addr scrubbed
 

duly noted!

thanks,
jmc



Re: Patriot Wireless N USB Adapter

2013-09-14 Thread Kyle R. W. Milz
I'll stop being lazy, maybe this will make things easier for you.  Full
disclosure: first patch I've sent to this list.


Index: share/man/man4/urtwn.4
===
RCS file: /cvs/src/share/man/man4/urtwn.4,v
retrieving revision 1.24
diff -u -p -r1.24 urtwn.4
--- share/man/man4/urtwn.4  20 Aug 2013 13:46:54 -  1.24
+++ share/man/man4/urtwn.4  14 Sep 2013 17:30:35 -
@@ -106,6 +106,7 @@ The following adapters should work:
 .It Hercules Wireless N USB Pico HWNUp-150
 .It IO-DATA WN-G150UM
 .It Netgear WNA1000A
+.It Patriot PCUSBW1150
 .It Planex GW-USEco300
 .It Planex GW-USNano2
 .It Planex GW-USValue-EZ



Re: Patriot Wireless N USB Adapter

2013-09-14 Thread David Coppa
On Sat, Sep 14, 2013 at 7:48 PM, Kyle R. W. Milz k...@getaddrinfo.net wrote:
 I'll stop being lazy, maybe this will make things easier for you.  Full
 disclosure: first patch I've sent to this list.


 Index: share/man/man4/urtwn.4
 ===
 RCS file: /cvs/src/share/man/man4/urtwn.4,v
 retrieving revision 1.24
 diff -u -p -r1.24 urtwn.4
 --- share/man/man4/urtwn.4  20 Aug 2013 13:46:54 -  1.24
 +++ share/man/man4/urtwn.4  14 Sep 2013 17:30:35 -
 @@ -106,6 +106,7 @@ The following adapters should work:
  .It Hercules Wireless N USB Pico HWNUp-150
  .It IO-DATA WN-G150UM
  .It Netgear WNA1000A
 +.It Patriot PCUSBW1150
  .It Planex GW-USEco300
  .It Planex GW-USNano2
  .It Planex GW-USValue-EZ


jmc already committed it.



Re: Patriot Wireless N USB Adapter

2013-09-14 Thread Jason McIntyre
On Sat, Sep 14, 2013 at 07:52:51PM +0200, David Coppa wrote:
 On Sat, Sep 14, 2013 at 7:48 PM, Kyle R. W. Milz k...@getaddrinfo.net wrote:
  I'll stop being lazy, maybe this will make things easier for you.  Full
  disclosure: first patch I've sent to this list.
 
 
  Index: share/man/man4/urtwn.4
  ===
  RCS file: /cvs/src/share/man/man4/urtwn.4,v
  retrieving revision 1.24
  diff -u -p -r1.24 urtwn.4
  --- share/man/man4/urtwn.4  20 Aug 2013 13:46:54 -  1.24
  +++ share/man/man4/urtwn.4  14 Sep 2013 17:30:35 -
  @@ -106,6 +106,7 @@ The following adapters should work:
   .It Hercules Wireless N USB Pico HWNUp-150
   .It IO-DATA WN-G150UM
   .It Netgear WNA1000A
  +.It Patriot PCUSBW1150
   .It Planex GW-USEco300
   .It Planex GW-USNano2
   .It Planex GW-USValue-EZ
 
 
 jmc already committed it.
 

yeah, my mail wasn;t entirely clear. i was trying to match the wizardry
of kyle's perchance. it's a hard one to follow...

anyway, as david said, i did commit this. still, diffs attached to mails
are so much better, and always clearer.

jmc



Re: Patriot Wireless N USB Adapter

2013-09-14 Thread Kyle R W Milz
On Sat, Sep 14, 2013 at 07:05:53PM +0059, Jason McIntyre wrote:
 On Sat, Sep 14, 2013 at 07:52:51PM +0200, David Coppa wrote:
  On Sat, Sep 14, 2013 at 7:48 PM, Kyle R. W. Milz k...@getaddrinfo.net 
  wrote:
   I'll stop being lazy, maybe this will make things easier for you.  Full
   disclosure: first patch I've sent to this list.
  
  
   Index: share/man/man4/urtwn.4
   ===
   RCS file: /cvs/src/share/man/man4/urtwn.4,v
   retrieving revision 1.24
   diff -u -p -r1.24 urtwn.4
   --- share/man/man4/urtwn.4  20 Aug 2013 13:46:54 -  1.24
   +++ share/man/man4/urtwn.4  14 Sep 2013 17:30:35 -
   @@ -106,6 +106,7 @@ The following adapters should work:
.It Hercules Wireless N USB Pico HWNUp-150
.It IO-DATA WN-G150UM
.It Netgear WNA1000A
   +.It Patriot PCUSBW1150
.It Planex GW-USEco300
.It Planex GW-USNano2
.It Planex GW-USValue-EZ
  
  
  jmc already committed it.
  
 
 yeah, my mail wasn;t entirely clear. i was trying to match the wizardry
 of kyle's perchance. it's a hard one to follow...

Hah, wizardry. Will use plainer language next time :)

 anyway, as david said, i did commit this. still, diffs attached to mails
 are so much better, and always clearer.

ack.

 jmc



Re: azalia acer quirks

2013-09-14 Thread Alexandre Ratchov
On Sat, Sep 14, 2013 at 01:03:39PM +0200, Raphael Graf wrote:
 Without this diff, I just get silence from an Acer Extensa 6700.
 I don't know if this is the right way to fix it..
 Comments?
 

The diff seems correct. Anyone with a non-Acer Extensa 6700 box
using a ALC260 to test this diff ?

-- Alexandre



Re: octeon cnmac phy addresses

2013-09-14 Thread David Gwynne
makes a lot of sense to me, ok. you need oks from people other than me though.

dlg

On 14/09/2013, at 8:34 PM, Jonathan Matthew jmatt...@openbsd.org wrote:

 The network interfaces on the ubiquiti edgerouter lite don't work yet.
 Here's the first step towards fixing that:
 
 Mapping port numbers to phy addresses in the mii read/write functions
 hides the phy addresses unnecessarily.  Instead, we should figure out
 the phy address when setting up the port and pass it to mii_attach.
 
 I don't have an octeon system that works with the existing code, so all
 I can say is this doesn't make any difference on the edgerouter lite.
 It uses different phy addresses, which I'll add a mapping for later.
 
 ok?
 
 Index: arch/octeon/dev/cn30xxgmx.c
 ===
 RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmx.c,v
 retrieving revision 1.5
 diff -u -p -r1.5 cn30xxgmx.c
 --- arch/octeon/dev/cn30xxgmx.c   5 Dec 2012 23:20:14 -   1.5
 +++ arch/octeon/dev/cn30xxgmx.c   14 Sep 2013 09:35:40 -
 @@ -146,6 +146,11 @@ struct cn30xxgmx_port_ops *cn30xxgmx_por
   [GMX_SPI42_PORT] = cn30xxgmx_port_ops_spi42
 };
 
 +/* this apparently works for the portwell cam-0100 */
 +int octeon_eth_phy_table[] = {
 + 0x02, 0x03, 0x22
 +};
 +
 #ifdef OCTEON_ETH_DEBUG
 static void   *cn30xxgmx_intr_drop_ih;
 struct evcnt  cn30xxgmx_intr_drop_evcnt =
 @@ -178,6 +183,14 @@ cn30xxgmx_match(struct device *parent, v
   return 1;
 }
 
 +static int
 +cn30xxgmx_port_phy_addr(int port)
 +{
 + if (port = nitems(octeon_eth_phy_table))
 + return -1;
 + return octeon_eth_phy_table[port];
 +}
 +
 static void
 cn30xxgmx_attach(struct device *parent, struct device *self, void *aux)
 {
 @@ -223,6 +236,9 @@ cn30xxgmx_attach(struct device *parent, 
   gmx_aa.ga_port_type = sc-sc_port_types[i];
   gmx_aa.ga_gmx = sc;
   gmx_aa.ga_gmx_port = port_sc;
 + gmx_aa.ga_phy_addr = cn30xxgmx_port_phy_addr(i);
 + if (gmx_aa.ga_phy_addr == -1)
 + panic(: don't know phy address for port %d, i);
 
   config_found_sm(self, gmx_aa,
   cn30xxgmx_print, cn30xxgmx_submatch);
 Index: arch/octeon/dev/cn30xxgmxvar.h
 ===
 RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmxvar.h,v
 retrieving revision 1.1
 diff -u -p -r1.1 cn30xxgmxvar.h
 --- arch/octeon/dev/cn30xxgmxvar.h16 Jun 2011 11:22:30 -  1.1
 +++ arch/octeon/dev/cn30xxgmxvar.h14 Sep 2013 09:35:40 -
 @@ -136,6 +136,7 @@ struct cn30xxgmx_attach_args {
   const char  *ga_name;
   int ga_portno;
   int ga_port_type;
 + int ga_phy_addr;
 
   struct cn30xxgmx_softc *ga_gmx;
   struct cn30xxgmx_port_softc
 Index: arch/octeon/dev/if_cnmac.c
 ===
 RCS file: /cvs/src/sys/arch/octeon/dev/if_cnmac.c,v
 retrieving revision 1.11
 diff -u -p -r1.11 if_cnmac.c
 --- arch/octeon/dev/if_cnmac.c17 Aug 2013 10:00:09 -  1.11
 +++ arch/octeon/dev/if_cnmac.c14 Sep 2013 09:35:40 -
 @@ -259,15 +259,6 @@ static const struct octeon_evcnt_entry o
 };
 #endif
 
 -/* XXX board-specific */
 -static const int octeon_eth_phy_table[] = {
 -#if defined __seil5__
 - 0x04, 0x01, 0x02
 -#else
 - 0x02, 0x03, 0x22
 -#endif
 -};
 -
 /*  buffer management */
 
 static const struct octeon_eth_pool_param {
 @@ -338,6 +329,7 @@ octeon_eth_attach(struct device *parent,
   sc-sc_port_type = ga-ga_port_type;
   sc-sc_gmx = ga-ga_gmx;
   sc-sc_gmx_port = ga-ga_gmx_port;
 + sc-sc_phy_addr = ga-ga_phy_addr;
 
   sc-sc_init_flag = 0;
 
 @@ -549,30 +541,14 @@ static int
 octeon_eth_mii_readreg(struct device *self, int phy_no, int reg)
 {
   struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
 - int phy_addr = octeon_eth_phy_table[phy_no];
 -
 - if (sc-sc_port = (int)nitems(octeon_eth_phy_table) ||
 - phy_no != sc-sc_port) {
 - log(LOG_ERR,
 - mii read address mismatch, phy number %d.\n, phy_no);
 - return -1;
 - }
 - return cn30xxsmi_read(sc-sc_smi, phy_addr, reg);
 + return cn30xxsmi_read(sc-sc_smi, phy_no, reg);
 }
 
 static void
 octeon_eth_mii_writereg(struct device *self, int phy_no, int reg, int value)
 {
   struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
 - int phy_addr = octeon_eth_phy_table[phy_no];
 -
 - if (sc-sc_port = (int)nitems(octeon_eth_phy_table) ||
 - phy_no != sc-sc_port) {
 - log(LOG_ERR,
 - mii write address mismatch, phy number %d.\n, phy_no);
 - return;
 - }
 - cn30xxsmi_write(sc-sc_smi, phy_addr, reg, value);
 + cn30xxsmi_write(sc-sc_smi, phy_no, reg, value);
 }