Re: octeon cnmac phy addresses
On Sat, Sep 14, 2013 at 08:34:42PM +1000, Jonathan Matthew wrote:
> The network interfaces on the ubiquiti edgerouter lite don't work yet.
> Here's the first step towards fixing that:
>
> Mapping port numbers to phy addresses in the mii read/write functions
> hides the phy addresses unnecessarily. Instead, we should figure out
> the phy address when setting up the port and pass it to mii_attach.
>
> I don't have an octeon system that works with the existing code, so all
> I can say is this doesn't make any difference on the edgerouter lite.
> It uses different phy addresses, which I'll add a mapping for later.
>
> ok?
Reads good to me, and given the fact it doesn't break the cam-0100; Ok with me.
> Index: arch/octeon/dev/cn30xxgmx.c
> ===
> RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmx.c,v
> retrieving revision 1.5
> diff -u -p -r1.5 cn30xxgmx.c
> --- arch/octeon/dev/cn30xxgmx.c 5 Dec 2012 23:20:14 - 1.5
> +++ arch/octeon/dev/cn30xxgmx.c 14 Sep 2013 09:35:40 -
> @@ -146,6 +146,11 @@ struct cn30xxgmx_port_ops *cn30xxgmx_por
> [GMX_SPI42_PORT] = &cn30xxgmx_port_ops_spi42
> };
>
> +/* this apparently works for the portwell cam-0100 */
> +int octeon_eth_phy_table[] = {
> + 0x02, 0x03, 0x22
> +};
> +
> #ifdef OCTEON_ETH_DEBUG
> static void *cn30xxgmx_intr_drop_ih;
> struct evcnt cn30xxgmx_intr_drop_evcnt =
> @@ -178,6 +183,14 @@ cn30xxgmx_match(struct device *parent, v
> return 1;
> }
>
> +static int
> +cn30xxgmx_port_phy_addr(int port)
> +{
> + if (port >= nitems(octeon_eth_phy_table))
> + return -1;
> + return octeon_eth_phy_table[port];
> +}
> +
> static void
> cn30xxgmx_attach(struct device *parent, struct device *self, void *aux)
> {
> @@ -223,6 +236,9 @@ cn30xxgmx_attach(struct device *parent,
> gmx_aa.ga_port_type = sc->sc_port_types[i];
> gmx_aa.ga_gmx = sc;
> gmx_aa.ga_gmx_port = port_sc;
> + gmx_aa.ga_phy_addr = cn30xxgmx_port_phy_addr(i);
> + if (gmx_aa.ga_phy_addr == -1)
> + panic(": don't know phy address for port %d", i);
>
> config_found_sm(self, &gmx_aa,
> cn30xxgmx_print, cn30xxgmx_submatch);
> Index: arch/octeon/dev/cn30xxgmxvar.h
> ===
> RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmxvar.h,v
> retrieving revision 1.1
> diff -u -p -r1.1 cn30xxgmxvar.h
> --- arch/octeon/dev/cn30xxgmxvar.h16 Jun 2011 11:22:30 - 1.1
> +++ arch/octeon/dev/cn30xxgmxvar.h14 Sep 2013 09:35:40 -
> @@ -136,6 +136,7 @@ struct cn30xxgmx_attach_args {
> const char *ga_name;
> int ga_portno;
> int ga_port_type;
> + int ga_phy_addr;
>
> struct cn30xxgmx_softc *ga_gmx;
> struct cn30xxgmx_port_softc
> Index: arch/octeon/dev/if_cnmac.c
> ===
> RCS file: /cvs/src/sys/arch/octeon/dev/if_cnmac.c,v
> retrieving revision 1.11
> diff -u -p -r1.11 if_cnmac.c
> --- arch/octeon/dev/if_cnmac.c17 Aug 2013 10:00:09 - 1.11
> +++ arch/octeon/dev/if_cnmac.c14 Sep 2013 09:35:40 -
> @@ -259,15 +259,6 @@ static const struct octeon_evcnt_entry o
> };
> #endif
>
> -/* XXX board-specific */
> -static const int octeon_eth_phy_table[] = {
> -#if defined __seil5__
> - 0x04, 0x01, 0x02
> -#else
> - 0x02, 0x03, 0x22
> -#endif
> -};
> -
> /* buffer management */
>
> static const struct octeon_eth_pool_param {
> @@ -338,6 +329,7 @@ octeon_eth_attach(struct device *parent,
> sc->sc_port_type = ga->ga_port_type;
> sc->sc_gmx = ga->ga_gmx;
> sc->sc_gmx_port = ga->ga_gmx_port;
> + sc->sc_phy_addr = ga->ga_phy_addr;
>
> sc->sc_init_flag = 0;
>
> @@ -549,30 +541,14 @@ static int
> octeon_eth_mii_readreg(struct device *self, int phy_no, int reg)
> {
> struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
> - int phy_addr = octeon_eth_phy_table[phy_no];
> -
> - if (sc->sc_port >= (int)nitems(octeon_eth_phy_table) ||
> - phy_no != sc->sc_port) {
> - log(LOG_ERR,
> - "mii read address mismatch, phy number %d.\n", phy_no);
> - return -1;
> - }
> - return cn30xxsmi_read(sc->sc_smi, phy_addr, reg);
> + return cn30xxsmi_read(sc->sc_smi, phy_no, reg);
> }
>
> static void
> octeon_eth_mii_writereg(struct device *self, int phy_no, int reg, int value)
> {
> struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
> - int phy_addr = octeon_eth_phy_table[phy_no];
> -
> - if (sc->sc_port >= (int)nitems(octeon_eth_phy_table) ||
> - phy_no != sc->sc_port) {
> - log(LOG_ERR,
> - "mii write address mismatch, phy numb
Re: octeon cnmac phy addresses
On 09/15/13 01:53, David Gwynne wrote:
makes a lot of sense to me, ok. you need oks from people other than me though.
dlg
I've been running this for the last 12 hours or so without problems on
my CAM-0100, so ok for me.
~Brian
On 14/09/2013, at 8:34 PM, Jonathan Matthew wrote:
The network interfaces on the ubiquiti edgerouter lite don't work yet.
Here's the first step towards fixing that:
Mapping port numbers to phy addresses in the mii read/write functions
hides the phy addresses unnecessarily. Instead, we should figure out
the phy address when setting up the port and pass it to mii_attach.
I don't have an octeon system that works with the existing code, so all
I can say is this doesn't make any difference on the edgerouter lite.
It uses different phy addresses, which I'll add a mapping for later.
ok?
Index: arch/octeon/dev/cn30xxgmx.c
===
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmx.c,v
retrieving revision 1.5
diff -u -p -r1.5 cn30xxgmx.c
--- arch/octeon/dev/cn30xxgmx.c 5 Dec 2012 23:20:14 - 1.5
+++ arch/octeon/dev/cn30xxgmx.c 14 Sep 2013 09:35:40 -
@@ -146,6 +146,11 @@ struct cn30xxgmx_port_ops *cn30xxgmx_por
[GMX_SPI42_PORT] = &cn30xxgmx_port_ops_spi42
};
+/* this apparently works for the portwell cam-0100 */
+int octeon_eth_phy_table[] = {
+ 0x02, 0x03, 0x22
+};
+
#ifdef OCTEON_ETH_DEBUG
static void *cn30xxgmx_intr_drop_ih;
struct evcntcn30xxgmx_intr_drop_evcnt =
@@ -178,6 +183,14 @@ cn30xxgmx_match(struct device *parent, v
return 1;
}
+static int
+cn30xxgmx_port_phy_addr(int port)
+{
+ if (port >= nitems(octeon_eth_phy_table))
+ return -1;
+ return octeon_eth_phy_table[port];
+}
+
static void
cn30xxgmx_attach(struct device *parent, struct device *self, void *aux)
{
@@ -223,6 +236,9 @@ cn30xxgmx_attach(struct device *parent,
gmx_aa.ga_port_type = sc->sc_port_types[i];
gmx_aa.ga_gmx = sc;
gmx_aa.ga_gmx_port = port_sc;
+ gmx_aa.ga_phy_addr = cn30xxgmx_port_phy_addr(i);
+ if (gmx_aa.ga_phy_addr == -1)
+ panic(": don't know phy address for port %d", i);
config_found_sm(self, &gmx_aa,
cn30xxgmx_print, cn30xxgmx_submatch);
Index: arch/octeon/dev/cn30xxgmxvar.h
===
RCS file: /cvs/src/sys/arch/octeon/dev/cn30xxgmxvar.h,v
retrieving revision 1.1
diff -u -p -r1.1 cn30xxgmxvar.h
--- arch/octeon/dev/cn30xxgmxvar.h 16 Jun 2011 11:22:30 - 1.1
+++ arch/octeon/dev/cn30xxgmxvar.h 14 Sep 2013 09:35:40 -
@@ -136,6 +136,7 @@ struct cn30xxgmx_attach_args {
const char *ga_name;
int ga_portno;
int ga_port_type;
+ int ga_phy_addr;
struct cn30xxgmx_softc *ga_gmx;
struct cn30xxgmx_port_softc
Index: arch/octeon/dev/if_cnmac.c
===
RCS file: /cvs/src/sys/arch/octeon/dev/if_cnmac.c,v
retrieving revision 1.11
diff -u -p -r1.11 if_cnmac.c
--- arch/octeon/dev/if_cnmac.c 17 Aug 2013 10:00:09 - 1.11
+++ arch/octeon/dev/if_cnmac.c 14 Sep 2013 09:35:40 -
@@ -259,15 +259,6 @@ static const struct octeon_evcnt_entry o
};
#endif
-/* XXX board-specific */
-static const int octeon_eth_phy_table[] = {
-#if defined __seil5__
- 0x04, 0x01, 0x02
-#else
- 0x02, 0x03, 0x22
-#endif
-};
-
/* buffer management */
static const struct octeon_eth_pool_param {
@@ -338,6 +329,7 @@ octeon_eth_attach(struct device *parent,
sc->sc_port_type = ga->ga_port_type;
sc->sc_gmx = ga->ga_gmx;
sc->sc_gmx_port = ga->ga_gmx_port;
+ sc->sc_phy_addr = ga->ga_phy_addr;
sc->sc_init_flag = 0;
@@ -549,30 +541,14 @@ static int
octeon_eth_mii_readreg(struct device *self, int phy_no, int reg)
{
struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
- int phy_addr = octeon_eth_phy_table[phy_no];
-
- if (sc->sc_port >= (int)nitems(octeon_eth_phy_table) ||
- phy_no != sc->sc_port) {
- log(LOG_ERR,
- "mii read address mismatch, phy number %d.\n", phy_no);
- return -1;
- }
- return cn30xxsmi_read(sc->sc_smi, phy_addr, reg);
+ return cn30xxsmi_read(sc->sc_smi, phy_no, reg);
}
static void
octeon_eth_mii_writereg(struct device *self, int phy_no, int reg, int value)
{
struct octeon_eth_softc *sc = (struct octeon_eth_softc *)self;
- int phy_addr = octeon_eth_phy_table[phy_no];
-
- if (sc->sc_port >= (int)nitems(octeon_eth_phy_table) ||
- phy_no != sc->sc_port) {
- log(LOG_ERR,
- "mii write address mismatch, phy number %d.\n", phy_no);
- return;
- }
- cn3
Re: SQLite 3.8.0.2 diff
On Thu, Sep 12, 2013 at 02:35:02PM -0400, James Turner wrote: > Attached is a diff to update our in tree version of SQLite to the > recently released 3.8.0.2. SQLite 3.8.0 is needed for a fossil update > I'm working on. > > I've tested this diff against my fossil update and everything appears to > be good, the recent arc4random addition should have been maintained > across the diff. > > This should probably go through a round of bulk builds. I'll express my > thanks now for anyone who can assist by running a bulk build on a couple > platforms. Doesnt seem to cause any direct fallout in an amd64 bulk build. At some poing mozilla will also require 3.8.x, see https://bugzilla.mozilla.org/show_bug.cgi?id=909382. Apparently there are still bugfixes piling on this 3.8.0.x branch.. And note that for mozilla, we might need to turn on the new SQLITE_ALLOW_URI_AUTHORITY define flag at some point for https://bugzilla.mozilla.org/show_bug.cgi?id=879133 . I dont grok all the details here, it seems a windows only issue (profiles on a cifs network drive) but mozilla might require that flag to be set to allow building with systemwide sqlite. Landry
