Re: initial i217/i218 Haswell Ethernet support for em(4)
On Sat, 9 Nov 2013, Jonathan Gray wrote: This adds the initial bits for the i217/i218 PHY and the Lynx Point PCH found in Haswell systems. Doesn't include the new workarounds yet and follows the pch2/82579 paths for now but this seems to be enough to make a desktop machine with I217-LM work This fails for the I217-V with an EEPROM invalid checksum error: OpenBSD 5.4-current (GENERIC.MP) #23: Sat Nov 16 08:47:47 CET 2013 mar...@teiresias.markus-hennecke.de:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 8518668288 (8124MB) avail mem = 8283758592 (7900MB) mainbus0 at root bios0 at mainbus0: SMBIOS rev. 2.8 @ 0xec320 (77 entries) bios0: vendor Intel Corp. version RLH8710H.86A.0322.2013.1003.1952 date 10/03/2013 bios0: Intel Corporation DH87RL acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP APIC FPDT LPIT SSDT SSDT SSDT MCFG HPET SSDT SSDT DMAR acpi0: wakeup devices PS2K(S3) PS2M(S3) PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) PXSX(S4) RP07(S4) [...] acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Core(TM) i5-4570 CPU @ 3.20GHz, 3193.12 MHz cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu0: 256KB 64b/line 8-way L2 cache cpu0: smt 0, core 0, package 0 cpu0: apic clock running at 99MHz cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Core(TM) i5-4570 CPU @ 3.20GHz, 3192.62 MHz cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu1: 256KB 64b/line 8-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Core(TM) i5-4570 CPU @ 3.20GHz, 3192.62 MHz cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu2: 256KB 64b/line 8-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Core(TM) i5-4570 CPU @ 3.20GHz, 3192.62 MHz cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,HLE,AVX2,SMEP,BMI2,ERMS,INVPCID,RTM cpu3: 256KB 64b/line 8-way L2 cache cpu3: smt 0, core 3, package 0 ioapic0 at mainbus0: apid 2 pa 0xfec0, version 20, 24 pins acpimcfg0 at acpi0 addr 0xf800, bus 0-63 acpihpet0 at acpi0: 14318179 Hz acpiprt0 at acpi0: bus 0 (PCI0) acpiprt1 at acpi0: bus 2 (RP01) acpiprt2 at acpi0: bus 3 (RP08) acpiprt3 at acpi0: bus 1 (PEG0) acpiec0 at acpi0: Failed to read resource settings acpicpu0 at acpi0: C1, PSS acpicpu1 at acpi0: C1, PSS acpicpu2 at acpi0: C1, PSS acpicpu3 at acpi0: C1, PSS acpipwrres0 at acpi0: FN00: resource for FAN0 acpipwrres1 at acpi0: FN01: resource for FAN1 acpipwrres2 at acpi0: FN02: resource for FAN2 acpipwrres3 at acpi0: FN03: resource for FAN3 acpipwrres4 at acpi0: FN04: resource for FAN4 acpitz0 at acpi0: critical temperature is 105 degC acpitz1 at acpi0: critical temperature is 105 degC acpibat0 at acpi0: BAT0 not present acpibat1 at acpi0: BAT1 not present acpibat2 at acpi0: BAT2 not present acpibtn0 at acpi0: PWRB acpibtn1 at acpi0: LID0 acpivideo0 at acpi0: GFX0 acpivout0 at acpivideo0: DD1F cpu0: Enhanced SpeedStep 3193 MHz: speeds: 3201, 3200, 3000, 2900, 2700, 2500, 2300, 2200, 2000, 1800, 1700, 1500, 1300, 1100, 1000, 800 MHz pci0 at mainbus0 bus 0 pchb0 at pci0 dev 0 function 0 Intel Core 4G Host rev 0x06 ppb0 at pci0 dev 1 function 0 Intel Core 4G PCIE rev 0x06: msi pci1 at ppb0 bus 1 radeondrm0 at pci1 dev 0 function 0 ATI Radeon HD 7750 rev 0x00: apic 2 int 16 drm0 at radeondrm0 azalia0 at pci1 dev 0 function 1 vendor ATI, unknown product 0xaab0 rev 0x00: msi azalia0: no supported codecs Intel 8 Series xHCI rev 0x04 at pci0 dev 20 function 0 not configured Intel 8 Series MEI rev 0x04 at pci0 dev 22 function 0 not configured em0 at pci0
Re: initial i217/i218 Haswell Ethernet support for em(4)
Before you fix it to death - same chip works for me with rev 0x05: OpenBSD 5.4-current (GENERIC.MP) #5: Wed Nov 13 19:25:04 CET 2013 r...@smartie.doris.net:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 8489422848 (8096MB) avail mem = 8255299584 (7872MB) mainbus0 at root bios0 at mainbus0: SMBIOS rev. 2.7 @ 0xeb270 (35 entries) bios0: vendor American Megatrends Inc. version 4.6.5 date 08/13/2013 bios0: Notebook W740SU acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP APIC FPDT SSDT SSDT SSDT MCFG HPET SSDT SSDT DMAR acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) PXSX(S4) RP07(S4) PXSX(S4) RP08(S4) [...] acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.63 MHz cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu0: 256KB 64b/line 8-way L2 cache cpu0: smt 0, core 0, package 0 cpu0: apic clock running at 99MHz cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu1: 256KB 64b/line 8-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu2: 256KB 64b/line 8-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu3: 256KB 64b/line 8-way L2 cache cpu3: smt 0, core 3, package 0 cpu4 at mainbus0: apid 1 (application processor) cpu4: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.39 MHz cpu4: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu4: 256KB 64b/line 8-way L2 cache cpu4: smt 1, core 0, package 0 cpu5 at mainbus0: apid 3 (application processor) cpu5: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu5: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu5: 256KB 64b/line 8-way L2 cache cpu5: smt 1, core 1, package 0 cpu6 at mainbus0: apid 5 (application processor) cpu6: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu6: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu6: 256KB 64b/line 8-way L2 cache cpu6: smt 1, core 2, package 0 cpu7 at mainbus0: apid 7 (application processor) cpu7: Intel(R) Core(TM) i7-4750HQ CPU @ 2.00GHz, 1995.38 MHz cpu7: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,LONG,LAHF,ABM,PERF,ITSC,FSGSBASE,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID cpu7: 256KB
ip_stripoptions in icmp_reflect
Hi,
Instead of stripping the IP options manually in icmp_reflect(),
just call ip_stripoptions(). Remove an unneeded parameter and
adjust the ip length in ip_stripoptions(). From FreeBSD.
ok?
bluhm
Index: netinet/ip_icmp.c
===
RCS file: /data/mirror/openbsd/cvs/src/sys/netinet/ip_icmp.c,v
retrieving revision 1.109
diff -u -p -u -p -r1.109 ip_icmp.c
--- netinet/ip_icmp.c 11 Nov 2013 09:15:34 - 1.109
+++ netinet/ip_icmp.c 16 Nov 2013 13:36:35 -
@@ -807,18 +807,7 @@ icmp_reflect(struct mbuf *m, struct mbuf
printf(%d\n, opts-m_len);
#endif
}
- /*
-* Now strip out original options by copying rest of first
-* mbuf's data back, and adjust the IP length.
-*/
- ip-ip_len = htons(ntohs(ip-ip_len) - optlen);
- ip-ip_hl = sizeof(struct ip) 2;
- m-m_len -= optlen;
- if (m-m_flags M_PKTHDR)
- m-m_pkthdr.len -= optlen;
- optlen += sizeof(struct ip);
- bcopy((caddr_t)ip + optlen, (caddr_t)(ip + 1),
- m-m_len - sizeof(struct ip));
+ ip_stripoptions(m);
}
m-m_flags = ~(M_BCAST|M_MCAST);
if (op)
Index: netinet/ip_input.c
===
RCS file: /data/mirror/openbsd/cvs/src/sys/netinet/ip_input.c,v
retrieving revision 1.220
diff -u -p -u -p -r1.220 ip_input.c
--- netinet/ip_input.c 11 Nov 2013 09:15:34 - 1.220
+++ netinet/ip_input.c 16 Nov 2013 13:27:47 -
@@ -1336,14 +1336,10 @@ ip_srcroute(struct mbuf *m0)
}
/*
- * Strip out IP options, at higher
- * level protocol in the kernel.
- * Second argument is buffer to which options
- * will be moved, and return value is their length.
- * XXX should be deleted; last arg currently ignored.
+ * Strip out IP options, at higher level protocol in the kernel.
*/
void
-ip_stripoptions(struct mbuf *m, struct mbuf *mopt)
+ip_stripoptions(struct mbuf *m)
{
int i;
struct ip *ip = mtod(m, struct ip *);
@@ -1358,6 +1354,7 @@ ip_stripoptions(struct mbuf *m, struct m
if (m-m_flags M_PKTHDR)
m-m_pkthdr.len -= olen;
ip-ip_hl = sizeof(struct ip) 2;
+ ip-ip_len = htons(ntohs(ip-ip_len) - olen);
}
int inetctlerrmap[PRC_NCMDS] = {
Index: netinet/ip_var.h
===
RCS file: /data/mirror/openbsd/cvs/src/sys/netinet/ip_var.h,v
retrieving revision 1.48
diff -u -p -u -p -r1.48 ip_var.h
--- netinet/ip_var.h24 Oct 2013 11:17:36 - 1.48
+++ netinet/ip_var.h16 Nov 2013 13:18:01 -
@@ -200,7 +200,7 @@ int ip_setmoptions(int, struct ip_mopti
voidip_slowtimo(void);
struct mbuf *
ip_srcroute(struct mbuf *);
-voidip_stripoptions(struct mbuf *, struct mbuf *);
+voidip_stripoptions(struct mbuf *);
int ip_sysctl(int *, u_int, void *, size_t *, void *, size_t);
voidip_savecontrol(struct inpcb *, struct mbuf **, struct ip *,
struct mbuf *);
Re: setpassent(1) not working
On Thu, Nov 14, 2013 at 1:00 PM, Erik Lax e...@halon.se wrote: I noticed that setpassent(1) probably doesn't work as intended, as this program should open the spwd.db file once, not four times? ... This following patch fixes this. This has been committed; thanks! Philip Guenther
Re: Weard security report
Hi Sven,
sven falempin wrote on Wed, Nov 06, 2013 at 10:24:53AM -0500:
Running security(8):
==
/var/db/cloud.json diffs (-OLD +NEW)
==
--- /dev/null Fri Oct 25 01:30:33 2013
+++ /var/db/cloud.json Thu Oct 17 17:21:15 2013
Previous security:
==
/var/db/cloud.json diffs (-OLD +NEW)
==
--- /var/backups/var_db_cloud.json.current Sat Jul 27 01:30:11 2013
+++ /var/db/cloud.json Wed Aug 7 16:28:55 2013
/dev/null !!!???
What possibly could happened ??
Is this possible if a reboot occur while the daily is running
(i guess no but...) ?
Actually, yes.
The copying is done with File::Copy::copy.
If you look into /usr/libdata/perl5/File/Copy.pm,
the function copy() does: open $to_h, , $to
So the file is first truncated, then written to, non-atomically.
In principle, if the security script gets killed right after
truncating the file, before writing any data into it,
i would expect the next security(8) run tun compare against /dev/null
in backup_if_changed() because the code says:
my $last = -s $current ? $current : '/dev/null';
But it's a narrow race to end up with an empty $current.
PS:
Is that possible to keep more than one backup in /var/backup ?
That's trivial to implement, see below, the question is whether
we want it...
Yours,
Ingo
Index: security
===
RCS file: /cvs/src/libexec/security/security,v
retrieving revision 1.23
diff -u -p -r1.23 security
--- security21 Mar 2013 09:37:37 - 1.23
+++ security16 Nov 2013 23:54:42 -
@@ -755,6 +755,12 @@ sub backup_if_changed {
diff $last, $orig or return;
if (-s $current) {
+ for (my $next = 5; $next; --$next) {
+ my $prev = $next - 1 || '';
+ next unless -s $backup$prev;
+ copy $backup$prev, $backup$next;
+ chown 0, 0, $backup$next;
+ }
copy $current, $backup;
chown 0, 0, $backup;
}
rfc: acpi wmi diff
tech@,
Here is an initial implementation of a generic acpi wmi framework and a
single consumer for the framework that lets the volume adjustment keys
on an asus ux31e work.
The generic framework could be used to support hotkeys found in
different acer, dell, hp, msi, other laptops.
This is by no means complete as wmi can do all sorts of other stupid
things like blink leds, toggle radios, control backlights, etc. The code
has some style(9) issues.
Looking for feedback before I go any further.
Index: arch/amd64/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/amd64/conf/GENERIC,v
retrieving revision 1.352
diff -u -p -r1.352 GENERIC
--- arch/amd64/conf/GENERIC 4 Nov 2013 14:07:15 - 1.352
+++ arch/amd64/conf/GENERIC 17 Nov 2013 05:53:40 -
@@ -58,6 +58,8 @@ acpitoshiba* at acpi?
acpivideo* at acpi?
acpivout* at acpivideo?
acpipwrres*at acpi?
+acpiwmi* at acpi?
+acpiwmi_asus* at acpiwmi?
aibs* at acpi?
mpbios0at bios0
Index: dev/acpi/acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.247
diff -u -p -r1.247 acpi.c
--- dev/acpi/acpi.c 6 Nov 2013 10:40:36 - 1.247
+++ dev/acpi/acpi.c 17 Nov 2013 05:53:42 -
@@ -2429,7 +2429,8 @@ acpi_foundhid(struct aml_node *node, voi
!strcmp(dev, ACPI_DEV_TOSHIBA_SPA40)) {
aaa.aaa_name = acpitoshiba;
acpi_toshiba_enabled = 1;
- }
+ } else if (!strcmp(dev, ACPI_DEV_WMI))
+ aaa.aaa_name = acpiwmi;
if (aaa.aaa_name)
Index: dev/acpi/acpidev.h
===
RCS file: /cvs/src/sys/dev/acpi/acpidev.h,v
retrieving revision 1.33
diff -u -p -r1.33 acpidev.h
--- dev/acpi/acpidev.h 13 Jul 2012 10:37:40 - 1.33
+++ dev/acpi/acpidev.h 17 Nov 2013 05:53:42 -
@@ -22,6 +22,7 @@
#include sys/sensors.h
#include sys/rwlock.h
#include dev/acpi/acpireg.h
+#include dev/acpi/amltypes.h
#define DEVNAME(s) ((s)-sc_dev.dv_xname)
@@ -337,4 +338,48 @@ struct acpiec_softc {
void acpibtn_disable_psw(void);
void acpibtn_enable_psw(void);
+
+struct acpiwmi_guid {
+ char guid[16];
+ union {
+ char object_id[2];
+ struct {
+ unsigned char notify_id;
+ unsigned char reserved;
+ };
+ };
+ uint8_t instance_count;
+ uint8_t flags;
+#define ACPI_WMI_EXPENSIVE 0x1
+#define ACPI_WMI_METHOD 0x2 /* GUID is a method */
+#define ACPI_WMI_STRING 0x4 /* GUID takes returns a string */
+#define ACPI_WMI_EVENT 0x8 /* GUID is an event */
+};
+
+typedef void (*wmi_notify_handler) (uint32_t, void *);
+
+struct acpiwmi_block {
+ struct acpiwmi_guid guid_block;
+ char guid_string[37];
+ /* acpi_handle handle; */
+ wmi_notify_handler handler;
+ void *handler_data;
+ struct device dev;
+
+ SIMPLEQ_ENTRY(acpiwmi_block) wmi_link;
+};
+
+struct acpiwmi_softc {
+ struct device sc_dev;
+
+ struct acpi_softc *sc_acpi;
+ struct aml_node *sc_devnode;
+
+ SIMPLEQ_HEAD(, acpiwmi_block) wmi_head;
+};
+
+int acpiwmi_guid_match(struct device *, const char *);
+int acpiwmi_install_notify_handler(struct acpiwmi_softc *, const char *,
wmi_notify_handler, void *);
+int acpiwmi_evaluate_method(struct acpiwmi_softc *, const char *, uint8_t,
uint32_t, const struct aml_value *, struct aml_value *);
+int acpiwmi_get_event_data(struct acpiwmi_softc *, uint32_t, struct aml_value
*);
#endif /* __DEV_ACPI_ACPIDEV_H__ */
Index: dev/acpi/acpireg.h
===
RCS file: /cvs/src/sys/dev/acpi/acpireg.h,v
retrieving revision 1.29
diff -u -p -r1.29 acpireg.h
--- dev/acpi/acpireg.h 6 Nov 2013 10:40:36 - 1.29
+++ dev/acpi/acpireg.h 17 Nov 2013 05:53:42 -
@@ -728,6 +728,7 @@ struct acpi_ivrs {
#define ACPI_DEV_LDPNP0C0D /* Lid Device */
#define ACPI_DEV_SBD PNP0C0E /* Sleep Button Device */
#define ACPI_DEV_PILD PNP0C0F /* PCI Interrupt Link Device */
+#define ACPI_DEV_WMI pnp0c14 /* Windows Management Instrumentation */
#define ACPI_DEV_MEMD PNP0C80 /* Memory Device */
#define ACPI_DEV_SHC ACPI0001 /* SMBus 1.0 Host Controller */
#define ACPI_DEV_SMS1 ACPI0002 /* Smart Battery Subsystem */
Index: dev/acpi/acpiwmi.c
===
RCS file: dev/acpi/acpiwmi.c
diff -N dev/acpi/acpiwmi.c
--- /dev/null 1 Jan 1970 00:00:00 -
+++ dev/acpi/acpiwmi.c 17 Nov 2013 05:53:42 -
@@ -0,0 +1,389 @@
+#include sys/param.h
+#include sys/device.h
+#include sys/malloc.h
+#include sys/systm.h
+#include sys/workq.h
+
+#include
Re: disksort() vs bufqs
here's a diff to sys/arch/sparc/dev/fd.c. not compiled, and therefore
not tested.
anyone? ok?
On Sun, Nov 03, 2013 at 09:30:56AM +1000, David Gwynne wrote:
once upon a time pretty much all block storage was on spinning disks, so all
the drivers for disks tried to order queued io to better suit moving a head
across a platter by calling disksort. between then and now a lot of the
assumptions that disksort relied on are no longer true (eg, SSDs are a thing
now) so it's usually more harmful than helpful. with beck@s addition of the
nscan backend in bufqs it makes sense to try and unify all disk drivers
behind bufqs and deprecate disksort.
so, ive been working through the tree replacing the last direct users of the
disksort() over to bufqs, but ive run out of code that i can compile for.
there are now 4 drivers in 3 architectures that need conversion, so im asking
if anyone is interested in taking some (or all) of them on.
the code in question is:
sys/arch/hp300/dev/hd.c
sys/arch/sparc/dev/fd.c
sys/arch/sparc/dev/xy.c
sys/arch/vax/vsa/hdc9224.c
if anyone has those archs and a some spare time, please feel free to have a
go and cut them over. even if you dont have the hardware to test your change,
making a compilable diff and sending it to tech@ for testing is better than i
can do right now.
cheers,
dlg
Index: fd.c
===
RCS file: /cvs/src/sys/arch/sparc/dev/fd.c,v
retrieving revision 1.86
diff -u -p -r1.86 fd.c
--- fd.c12 Nov 2013 16:04:09 - 1.86
+++ fd.c17 Nov 2013 06:40:34 -
@@ -217,7 +217,8 @@ struct fd_softc {
TAILQ_ENTRY(fd_softc) sc_drivechain;
int sc_ops; /* I/O ops since last switch */
- struct buf sc_q;/* head of buf chain */
+ struct bufq sc_bufq;/* pending I/O requests */
+ struct buf *sc_bp; /* current I/O */
struct timeout fd_motor_on_to;
struct timeout fd_motor_off_to;
@@ -642,6 +643,7 @@ fdattach(parent, self, aux)
*/
fd-sc_dk.dk_flags = DKF_NOLABELREAD;
fd-sc_dk.dk_name = fd-sc_dv.dv_xname;
+ bufq_init(fd-sc_bufq, BUFQ_DEFAULT);
disk_attach(fd-sc_dv, fd-sc_dk);
/*
@@ -732,11 +734,13 @@ fdstrategy(bp)
(long long)fd-sc_blkno, bp-b_cylinder);
#endif
+ /* Queue transfer */
+ bufq_queue(fd-sc_bufq, bp);
+
/* Queue transfer on drive, activate drive and controller if idle. */
s = splbio();
- disksort(fd-sc_q, bp);
timeout_del(fd-fd_motor_off_to); /* a good idea */
- if (!fd-sc_q.b_active)
+ if (fd-sc_bp == NULL)
fdstart(fd);
#ifdef DIAGNOSTIC
else {
@@ -767,7 +771,7 @@ fdstart(fd)
int active = !TAILQ_EMPTY(fdc-sc_drives);
/* Link into controller queue. */
- fd-sc_q.b_active = 1;
+ fd-sc_bp = bufq_dequeue(fd-sc_bufq);
TAILQ_INSERT_TAIL(fdc-sc_drives, fd, sc_drivechain);
/* If controller not already active, start it. */
@@ -782,6 +786,9 @@ fdfinish(fd, bp)
{
struct fdc_softc *fdc = (void *)fd-sc_dv.dv_parent;
+ fd-sc_skip = 0;
+ fd-sc_bp = bufq_dequeue(fd-sc_bufq);
+
/*
* Move this drive to the end of the queue to give others a `fair'
* chance. We only force a switch if N operations are completed while
@@ -791,15 +798,11 @@ fdfinish(fd, bp)
if (TAILQ_NEXT(fd, sc_drivechain) != NULL ++fd-sc_ops = 8) {
fd-sc_ops = 0;
TAILQ_REMOVE(fdc-sc_drives, fd, sc_drivechain);
- if (bp-b_actf) {
+ if (fd-sc_bp != NULL)
TAILQ_INSERT_TAIL(fdc-sc_drives, fd, sc_drivechain);
- } else
- fd-sc_q.b_active = 0;
}
- bp-b_resid = fd-sc_bcount;
- fd-sc_skip = 0;
- fd-sc_q.b_actf = bp-b_actf;
+ bp-b_resid = fd-sc_bcount;
biodone(bp);
/* turn off motor 5s from now */
timeout_add_sec(fd-fd_motor_off_to, 5);
@@ -1117,7 +1120,7 @@ fdctimeout(arg)
goto out;
}
- if (fd-sc_q.b_actf)
+ if (fd-sc_bp != NULL)
fdc-sc_state++;
else
fdc-sc_state = DEVIDLE;
@@ -1285,11 +1288,10 @@ loop:
}
/* Is there a transfer to this drive? If not, deactivate drive. */
- bp = fd-sc_q.b_actf;
+ bp = fd-sc_bp;
if (bp == NULL) {
fd-sc_ops = 0;
TAILQ_REMOVE(fdc-sc_drives, fd, sc_drivechain);
- fd-sc_q.b_active = 0;
goto loop;
}
@@ -1663,7 +1665,7 @@ fdcretry(fdc)
int error = EIO;
fd = TAILQ_FIRST(fdc-sc_drives);
- bp = fd-sc_q.b_actf;
+ bp = fd-sc_bp;
fdc-sc_overruns = 0;
if (fd-sc_opts FDOPT_NORETRY)
