Re: athn(4) WPA2/WPA1 mixed-mode compat fix
On Wed, Nov 11, 2020 at 09:16:16PM +0100, Matej Nanut wrote: > Hello, > > I've applied your diff and dhclient now works on my athn0 interface, > where it didn't work before. > > The symptom was that it did get a link, but couldn't get a lease. > > Thanks. Matej Thank you for confirming. I have committed this fix.
Re: athn(4) WPA2/WPA1 mixed-mode compat fix
Hello,
I've applied your diff and dhclient now works on my athn0 interface,
where it didn't work before.
The symptom was that it did get a link, but couldn't get a lease.
Thanks. Matej
On Tue, 10 Nov 2020 at 12:39, Stefan Sperling wrote:
>
> Similar to the urtwn(4) WPA1/TKIP fix I have just committed, there's
> a bug in athn(4) where the value of ni_rsncipher is used to guide the
> hardware- vs. software-crypto decision for multicast frames, not just
> for unicast frames as was intended.
>
> This means multicast frames could fail to decrypt if the AP is configured
> to use WPA1/TKIP instead of WPA2/CMMP as the group cipher (symptoms may
> include dhclient failing to get link).
>
> Ok?
>
> diff 89be218cf39e3311509e6aba9a8efd44b360a42f /usr/src
> blob - 560db09a447651b7bcabac7b94286a872b313ee2
> file + sys/dev/ic/ar5008.c
> --- sys/dev/ic/ar5008.c
> +++ sys/dev/ic/ar5008.c
> @@ -1003,7 +1003,8 @@ ar5008_rx_process(struct athn_softc *sc, struct mbuf_l
> (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) &&
> (ic->ic_flags & IEEE80211_F_RSNON) &&
> (ni->ni_flags & IEEE80211_NODE_RXPROT) &&
> - (ni->ni_rsncipher == IEEE80211_CIPHER_CCMP ||
> + ((!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
> + ni->ni_rsncipher == IEEE80211_CIPHER_CCMP) ||
> (IEEE80211_IS_MULTICAST(wh->i_addr1) &&
> ni->ni_rsngroupcipher == IEEE80211_CIPHER_CCMP))) {
> if (ar5008_ccmp_decap(sc, m, ni) != 0) {
>
>
>
Moving from 5.4 to 5.5 on i386 broke USB and soundcard support on Vaio SR31K (intel 82371/440BX chipset)
Hi,
I've been trying to revive my ancient Vaio, and unfortunately USB and
soundcard support with "uhci0 at pci0 dev 7 function 2 "Intel 82371AB
USB" rev 0x01: couldn't map interrupt" when releases moved from 5.4 to
5.5. I've tested this on every release since, it's the same problem. I
guess an update happened that broke the 440BX / i82371A chipset's
support for various things.
I'm in the process of getting 5.5 on the laptop to get you the
dmesg+pcidump -v for that.
Cheers,
Noth
P.S. I'm not subscribed to this list, please CC me.
Here's 5.4's dmesg:
OpenBSD 5.4 (GENERIC) #37: Tue Jul 30 12:05:01 MDT 2013
dera...@i386.openbsd.org:/usr/src/sys/arch/i386/compile/GENERIC
cpu0: Intel Pentium III ("GenuineIntel" 686-class) 746 MHz
cpu0:
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PSE36,MMX,FXSR,SSE,PERF
real mem = 267907072 (255MB)
avail mem = 252076032 (240MB)
mainbus0 at root
bios0 at mainbus0: AT/286+ BIOS, date 04/10/01, BIOS32 rev. 0 @ 0xfd8a0,
SMBIOS rev. 2.1 @ 0xf2020 (27 entries)
bios0: vendor Phoenix Technologies LTD version "R0210D1" date 04/10/01
bios0: Sony Corporation PCG-SR31K(CH)
apm0 at bios0: Power Management spec V1.2
acpi at bios0 function 0x0 not configured
pcibios0 at bios0: rev 2.1 @ 0xfd8a0/0x760
pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xfdf60/128 (6 entries)
pcibios0: PCI Interrupt Router at 000:07:0 ("Intel 82371FB ISA" rev 0x00)
pcibios0: PCI bus #2 is the last bus
bios0: ROM list: 0xc/0xc000 0xdc000/0x4000!
cpu0 at mainbus0: (uniprocessor)
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "Intel 82443BX AGP" rev 0x03
intelagp0 at pchb0
agp0 at intelagp0: aperture at 0x4000, size 0x100
ppb0 at pci0 dev 1 function 0 "Intel 82443BX AGP" rev 0x03
pci1 at ppb0 bus 1
vga1 at pci1 dev 0 function 0 "S3 Savage/IX-MV" rev 0x13
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
piixpcib0 at pci0 dev 7 function 0 "Intel 82371AB PIIX4 ISA" rev 0x02:
SpeedStep
pciide0 at pci0 dev 7 function 1 "Intel 82371AB IDE" rev 0x01: DMA,
channel 0 wired to compatibility, channel 1 wired to compatibility
wd0 at pciide0 channel 0 drive 0:
wd0: 16-sector PIO, LBA, 19077MB, 39070080 sectors
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 2
pciide0: channel 1 disabled (no drives)
uhci0 at pci0 dev 7 function 2 "Intel 82371AB USB" rev 0x01: irq 9
piixpm0 at pci0 dev 7 function 3 "Intel 82371AB Power" rev 0x03: SMI
iic0 at piixpm0
"Sony CXD3222 FireWire" rev 0x02 at pci0 dev 8 function 0 not configured
yds0 at pci0 dev 9 function 0 "Yamaha 754" rev 0x00: irq 9
cbb0 at pci0 dev 12 function 0 "Ricoh 5C475 CardBus" rev 0x80: irq 9
isa0 at piixpcib0
isadma0 at isa0
pckbc0 at isa0 port 0x60/5
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
pms0 at pckbc0 (aux slot)
pckbc0: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pms0: ALPS Glidepoint, version 0x7321
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
usb0 at uhci0: USB revision 1.0
uhub0 at usb0 "Intel UHCI root hub" rev 1.00/1.00 addr 1
cardslot0 at cbb0 slot 0 flags 0
cardbus0 at cardslot0: bus 2 device 0 cacheline 0x0, lattimer 0xb0
pcmcia0 at cardslot0
mtrr: Pentium Pro MTRR support
urtwn0 at uhub0 port 1 "Realtek 802.11n WLAN Adapter" rev 2.00/2.00 addr 2
urtwn0: MAC/BB RTL8188CUS, RF 6052 1T1R, address 08:be:ac:05:40:12
uhub1 at uhub0 port 2 "Philips Semiconductors hub" rev 1.10/1.10 addr 3
umass0 at uhub1 port 1 configuration 1 interface 0 "Sony USB Memory
Stick Slot" rev 1.10/1.80 addr 4
umass0: using ATAPI over CBI with CCI
scsibus0 at umass0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: ATAPI 0/direct
removable
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
root on wd0a (ff0b067003b74baf.a) swap on wd0b dump on wd0b
ac97: codec id 0x414b4d02 (Asahi Kasei AK4543)
ac97: codec features headphone, 18 bit DAC, 18 bit ADC, AKM 3D
audio0 at yds0
opl at yds0 not configured
opl at yds0 not configured
opl at yds0 not configured
opl at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
urtwn0: timeout waiting for MAC auto ON
urtwn0: timeout waiting for MAC auto ON
urtwn0: timeout waiting for MAC auto ON
5.4 pcidump -v:
Domain /dev/pci0:
0:0:0: Intel 82443BX AGP
0x: Vendor ID: 8086 Product ID: 7190
0x0004: Command: 0106 Status: 2210
0x0008: Class: 06 Subclass: 00 Interface: 00 Revision: 03
0x000c: BIST: 00 Header Type: 00 Latency Timer: 40 Cache Line
Size: 00
0x0010: BAR mem prefetchable 32bit addr: 0x4000/0x0100
0x0014: BAR empty ()
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
Moving from 5.4 to 5.5 on i386 broke USB and soundcard support on Vaio SR31K (intel 82371/440BX chipset)
Hi,
I've been trying to revive my ancient Vaio, and unfortunately USB and
soundcard support with "uhci0 at pci0 dev 7 function 2 "Intel 82371AB
USB" rev 0x01: couldn't map interrupt" when releases moved from 5.4 to
5.5. I've tested this on every release since, it's the same problem. I
guess an update happened that broke the 440BX / i82371A chipset's
support for various things.
I'm in the process of getting 5.5 on the laptop to get you the
dmesg+pcidump -v for that.
Cheers,
Noth
P.S. I'm not subscribed to this list, please CC me.
Here's 5.4's dmesg:
OpenBSD 5.4 (GENERIC) #37: Tue Jul 30 12:05:01 MDT 2013
dera...@i386.openbsd.org:/usr/src/sys/arch/i386/compile/GENERIC
cpu0: Intel Pentium III ("GenuineIntel" 686-class) 746 MHz
cpu0:
FPU,V86,DE,PSE,TSC,MSR,PAE,MCE,CX8,SEP,MTRR,PGE,MCA,CMOV,PSE36,MMX,FXSR,SSE,PERF
real mem = 267907072 (255MB)
avail mem = 252076032 (240MB)
mainbus0 at root
bios0 at mainbus0: AT/286+ BIOS, date 04/10/01, BIOS32 rev. 0 @ 0xfd8a0,
SMBIOS rev. 2.1 @ 0xf2020 (27 entries)
bios0: vendor Phoenix Technologies LTD version "R0210D1" date 04/10/01
bios0: Sony Corporation PCG-SR31K(CH)
apm0 at bios0: Power Management spec V1.2
acpi at bios0 function 0x0 not configured
pcibios0 at bios0: rev 2.1 @ 0xfd8a0/0x760
pcibios0: PCI IRQ Routing Table rev 1.0 @ 0xfdf60/128 (6 entries)
pcibios0: PCI Interrupt Router at 000:07:0 ("Intel 82371FB ISA" rev 0x00)
pcibios0: PCI bus #2 is the last bus
bios0: ROM list: 0xc/0xc000 0xdc000/0x4000!
cpu0 at mainbus0: (uniprocessor)
pci0 at mainbus0 bus 0: configuration mode 1 (bios)
pchb0 at pci0 dev 0 function 0 "Intel 82443BX AGP" rev 0x03
intelagp0 at pchb0
agp0 at intelagp0: aperture at 0x4000, size 0x100
ppb0 at pci0 dev 1 function 0 "Intel 82443BX AGP" rev 0x03
pci1 at ppb0 bus 1
vga1 at pci1 dev 0 function 0 "S3 Savage/IX-MV" rev 0x13
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
piixpcib0 at pci0 dev 7 function 0 "Intel 82371AB PIIX4 ISA" rev 0x02:
SpeedStep
pciide0 at pci0 dev 7 function 1 "Intel 82371AB IDE" rev 0x01: DMA,
channel 0 wired to compatibility, channel 1 wired to compatibility
wd0 at pciide0 channel 0 drive 0:
wd0: 16-sector PIO, LBA, 19077MB, 39070080 sectors
wd0(pciide0:0:0): using PIO mode 4, Ultra-DMA mode 2
pciide0: channel 1 disabled (no drives)
uhci0 at pci0 dev 7 function 2 "Intel 82371AB USB" rev 0x01: irq 9
piixpm0 at pci0 dev 7 function 3 "Intel 82371AB Power" rev 0x03: SMI
iic0 at piixpm0
"Sony CXD3222 FireWire" rev 0x02 at pci0 dev 8 function 0 not configured
yds0 at pci0 dev 9 function 0 "Yamaha 754" rev 0x00: irq 9
cbb0 at pci0 dev 12 function 0 "Ricoh 5C475 CardBus" rev 0x80: irq 9
isa0 at piixpcib0
isadma0 at isa0
pckbc0 at isa0 port 0x60/5
pckbd0 at pckbc0 (kbd slot)
pckbc0: using irq 1 for kbd slot
wskbd0 at pckbd0: console keyboard, using wsdisplay0
pms0 at pckbc0 (aux slot)
pckbc0: using irq 12 for aux slot
wsmouse0 at pms0 mux 0
pms0: ALPS Glidepoint, version 0x7321
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
npx0 at isa0 port 0xf0/16: reported by CPUID; using exception 16
usb0 at uhci0: USB revision 1.0
uhub0 at usb0 "Intel UHCI root hub" rev 1.00/1.00 addr 1
cardslot0 at cbb0 slot 0 flags 0
cardbus0 at cardslot0: bus 2 device 0 cacheline 0x0, lattimer 0xb0
pcmcia0 at cardslot0
mtrr: Pentium Pro MTRR support
urtwn0 at uhub0 port 1 "Realtek 802.11n WLAN Adapter" rev 2.00/2.00 addr 2
urtwn0: MAC/BB RTL8188CUS, RF 6052 1T1R, address 08:be:ac:05:40:12
uhub1 at uhub0 port 2 "Philips Semiconductors hub" rev 1.10/1.10 addr 3
umass0 at uhub1 port 1 configuration 1 interface 0 "Sony USB Memory
Stick Slot" rev 1.10/1.80 addr 4
umass0: using ATAPI over CBI with CCI
scsibus0 at umass0: 2 targets, initiator 0
sd0 at scsibus0 targ 1 lun 0: ATAPI 0/direct removable
vscsi0 at root
scsibus1 at vscsi0: 256 targets
softraid0 at root
scsibus2 at softraid0: 256 targets
root on wd0a (ff0b067003b74baf.a) swap on wd0b dump on wd0b
ac97: codec id 0x414b4d02 (Asahi Kasei AK4543)
ac97: codec features headphone, 18 bit DAC, 18 bit ADC, AKM 3D
audio0 at yds0
opl at yds0 not configured
opl at yds0 not configured
opl at yds0 not configured
opl at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
mpu at yds0 not configured
urtwn0: timeout waiting for MAC auto ON
urtwn0: timeout waiting for MAC auto ON
urtwn0: timeout waiting for MAC auto ON
5.4 pcidump -v:
Domain /dev/pci0:
0:0:0: Intel 82443BX AGP
0x: Vendor ID: 8086 Product ID: 7190
0x0004: Command: 0106 Status: 2210
0x0008: Class: 06 Subclass: 00 Interface: 00 Revision: 03
0x000c: BIST: 00 Header Type: 00 Latency Timer: 40 Cache Line
Size: 00
0x0010: BAR mem prefetchable 32bit addr: 0x4000/0x0100
0x0014: BAR empty ()
0x0018: BAR empty ()
0x001c: BAR empty ()
0x0020: BAR empty ()
0x0024: BAR empty ()
Re: unbound.conf.5.in: remove reference to default pidfile
On Sat, Nov 07, 2020 at 12:48:11PM +0100, Martin Vahlensieck wrote: > Hi > > Unbound on OpenBSD does not have a pidfile, so remove the reference in > the manual. As the variable is empty, it also incorrectly formats the > description as italic. > > Best, > > Martin > fixed, thanks. jmc > Index: unbound.conf.5.in > === > RCS file: /cvs/src/usr.sbin/unbound/doc/unbound.conf.5.in,v > retrieving revision 1.34 > diff -u -p -r1.34 unbound.conf.5.in > --- unbound.conf.5.in 28 Oct 2020 11:31:07 - 1.34 > +++ unbound.conf.5.in 7 Nov 2020 11:45:38 - > @@ -2360,9 +2360,6 @@ location. > .I @ub_conf_file@ > unbound configuration file. > .TP > -.I @UNBOUND_PIDFILE@ > -default unbound pidfile with process ID of the running daemon. > -.TP > .I unbound.log > unbound log file. default is to log to > \fIsyslog\fR(3). >
Re: Document art locking fields
On Wed, Nov 11, 2020 at 05:25:25AM -0300, Martin Pieuchot wrote:
> While discussing the new source address mechanism with denis@, I figured
> those ought to be documented.
>
> Note that `ar_rtableid' is unused and can die. The ART code is actually
> free from any network knowledge.
>
> ok?
>
it seems sound.
OK denis@
> Index: net/art.c
> ===
> RCS file: /cvs/src/sys/net/art.c,v
> retrieving revision 1.28
> diff -u -p -r1.28 art.c
> --- net/art.c 31 Mar 2019 19:29:27 - 1.28
> +++ net/art.c 9 Nov 2020 19:52:48 -
> @@ -115,7 +115,6 @@ art_alloc(unsigned int rtableid, unsigne
> }
>
> ar->ar_off = off;
> - ar->ar_rtableid = rtableid;
> rw_init(>ar_lock, "art");
>
> return (ar);
> Index: net/art.h
> ===
> RCS file: /cvs/src/sys/net/art.h,v
> retrieving revision 1.19
> diff -u -p -r1.19 art.h
> --- net/art.h 29 Oct 2020 21:15:27 - 1.19
> +++ net/art.h 9 Nov 2020 19:52:42 -
> @@ -27,16 +27,22 @@
>
> /*
> * Root of the ART tables, equivalent to the radix head.
> + *
> + * Locks used to protect struct members in this file:
> + * I immutable after creation
> + * l root's `ar_lock'
> + * K kernel lock
> + * For SRP related structures that allow lock-free reads, the write lock
> + * is indicated below.
> */
> struct art_root {
> - struct srp ar_root; /* First table */
> - struct rwlockar_lock; /* Serialise modifications */
> - uint8_t ar_bits[ART_MAXLVL]; /* Per level stride */
> - uint8_t ar_nlvl; /* Number of levels */
> - uint8_t ar_alen; /* Address length in bits */
> - uint8_t ar_off;/* Offset of the key in bytes */
> - unsigned int ar_rtableid; /* ID of this routing table */
> - struct sockaddr *source;/* optional src addr to use */
> + struct srp ar_root; /* [l] First table */
> + struct rwlockar_lock; /* [] Serialise modifications */
> + uint8_t ar_bits[ART_MAXLVL]; /* [I] Per level stride */
> + uint8_t ar_nlvl; /* [I] Number of levels */
> + uint8_t ar_alen; /* [I] Address length in bits */
> + uint8_t ar_off;/* [I] Offset of key in bytes */
> + struct sockaddr *source;/* [K] optional src addr to use
> */
> };
>
> #define ISLEAF(e)(((unsigned long)(e) & 1) == 0)
>
Document art locking fields
While discussing the new source address mechanism with denis@, I figured
those ought to be documented.
Note that `ar_rtableid' is unused and can die. The ART code is actually
free from any network knowledge.
ok?
Index: net/art.c
===
RCS file: /cvs/src/sys/net/art.c,v
retrieving revision 1.28
diff -u -p -r1.28 art.c
--- net/art.c 31 Mar 2019 19:29:27 - 1.28
+++ net/art.c 9 Nov 2020 19:52:48 -
@@ -115,7 +115,6 @@ art_alloc(unsigned int rtableid, unsigne
}
ar->ar_off = off;
- ar->ar_rtableid = rtableid;
rw_init(>ar_lock, "art");
return (ar);
Index: net/art.h
===
RCS file: /cvs/src/sys/net/art.h,v
retrieving revision 1.19
diff -u -p -r1.19 art.h
--- net/art.h 29 Oct 2020 21:15:27 - 1.19
+++ net/art.h 9 Nov 2020 19:52:42 -
@@ -27,16 +27,22 @@
/*
* Root of the ART tables, equivalent to the radix head.
+ *
+ * Locks used to protect struct members in this file:
+ * I immutable after creation
+ * l root's `ar_lock'
+ * K kernel lock
+ * For SRP related structures that allow lock-free reads, the write lock
+ * is indicated below.
*/
struct art_root {
- struct srp ar_root; /* First table */
- struct rwlockar_lock; /* Serialise modifications */
- uint8_t ar_bits[ART_MAXLVL]; /* Per level stride */
- uint8_t ar_nlvl; /* Number of levels */
- uint8_t ar_alen; /* Address length in bits */
- uint8_t ar_off;/* Offset of the key in bytes */
- unsigned int ar_rtableid; /* ID of this routing table */
- struct sockaddr *source;/* optional src addr to use */
+ struct srp ar_root; /* [l] First table */
+ struct rwlockar_lock; /* [] Serialise modifications */
+ uint8_t ar_bits[ART_MAXLVL]; /* [I] Per level stride */
+ uint8_t ar_nlvl; /* [I] Number of levels */
+ uint8_t ar_alen; /* [I] Address length in bits */
+ uint8_t ar_off;/* [I] Offset of key in bytes */
+ struct sockaddr *source;/* [K] optional src addr to use
*/
};
#define ISLEAF(e) (((unsigned long)(e) & 1) == 0)
