On Sun, Apr 24, 2022 at 08:00:50PM -0500, joshua stein wrote:
> Any interest in this?
>
> acpidptfs0 at acpi0: SEN2, sensor "Sensor 2 USB2"
> acpidptfs1 at acpi0: SEN4, sensor "Sensor 4 Ambience"
> acpidptfs2 at acpi0: SEN1, sensor "Thermistor CPU SOC"
> acpidptfs3 at acpi0: SEN3, sensor "Sensor 3
On Mon, Apr 25, 2022 at 08:29:18PM +0200, Florian Obser wrote:
> On 2022-04-24 20:01 +02, Ibrahim Khalifa wrote:
> > Hi,
> >
> > I ran into an issue with dhcpleased when trying to do pxeboot and automatic
> > installation when using DHCP Relay on Cisco ASA.
> >
> > The problem is when dhcpleased
On 2022-04-24 20:01 +02, Ibrahim Khalifa wrote:
> Hi,
>
> I ran into an issue with dhcpleased when trying to do pxeboot and automatic
> installation when using DHCP Relay on Cisco ASA.
>
> The problem is when dhcpleased starts for the first time after bsd.rd
> is loaded there is no hostname set
On Sat, Apr 23, 2022 at 09:20:06AM +0200, Sebastien Marie wrote:
> Does such diff to force UTC timezone in kernel buildate would be acceptable ?
I always convert Canada Mountain time to UTC in my head to estimate
whether a commit may be in a snapshot used in regress testing.
Having everything in
On Mon, Apr 25, 2022 at 02:52:08PM +, Visa Hankala wrote:
>
> The patch uses membar_sync(), and not membar_enter(), after the loop
> in refcnt_finalize() because subsequent memory operations should hinge
> on the load of r_refs.
>
> membar_enter() is usable when the reference point is a
On 25.4.2022. 17:32, Claudio Jeker wrote:
> You may need to play with hw.setperf and maybe run a single cpu load to
> see boost behaviour. I noticed that my 7th gen Intel CPU behaves different
> to the AMD Ryzen CPUs I own.
This is like playing with new desktop environment... Thank you :)
2
On Tue, Apr 19, 2022 at 09:00:08PM +0200, Anton Borowka wrote:
> Hi,
>
> the attached diff fixes 2 issues with line wrappings in wall(1).
...
I can confirm that your patch fixes the described problems. But I
am wondering if it makes sense to split the ch == '\n' case and the
cnt == 79 case into
On Mon, Apr 25, 2022 at 05:33:51PM +0200, Claudio Jeker wrote:
> On Mon, Apr 25, 2022 at 11:31:22AM -0400, Bryan Steele wrote:
> > On Mon, Apr 25, 2022 at 05:20:46PM +0200, Claudio Jeker wrote:
> > > On Sun, Apr 24, 2022 at 07:06:19PM +0200, Claudio Jeker wrote:
> > > > On Ryzen CPUs each CCD has
On Mon, Apr 25, 2022 at 11:31:22AM -0400, Bryan Steele wrote:
> On Mon, Apr 25, 2022 at 05:20:46PM +0200, Claudio Jeker wrote:
> > On Sun, Apr 24, 2022 at 07:06:19PM +0200, Claudio Jeker wrote:
> > > On Ryzen CPUs each CCD has a temp sensor. If the CPU has CCDs (which
> > > excludes Zen APU CPUs)
On Mon, Apr 25, 2022 at 05:22:51PM +0200, Hrvoje Popovski wrote:
> On 25.4.2022. 16:50, Hrvoje Popovski wrote:
> > On 25.4.2022. 16:19, Claudio Jeker wrote:
> >> After I sent out my ksmn(4) diff to include cpu frequency sensors dlg@
> >> told me that this is a generic way to find the cpu frequency
On Mon, Apr 25, 2022 at 05:20:46PM +0200, Claudio Jeker wrote:
> On Sun, Apr 24, 2022 at 07:06:19PM +0200, Claudio Jeker wrote:
> > On Ryzen CPUs each CCD has a temp sensor. If the CPU has CCDs (which
> > excludes Zen APU CPUs) this should show additional temp info. This is
> > based on info from
On 25.4.2022. 16:50, Hrvoje Popovski wrote:
> On 25.4.2022. 16:19, Claudio Jeker wrote:
>> After I sent out my ksmn(4) diff to include cpu frequency sensors dlg@
>> told me that this is a generic way to find the cpu frequency on modern x86
>> cpus (both intel and amd support it).
>>
>> So this
On Sun, Apr 24, 2022 at 07:06:19PM +0200, Claudio Jeker wrote:
> On Ryzen CPUs each CCD has a temp sensor. If the CPU has CCDs (which
> excludes Zen APU CPUs) this should show additional temp info. This is
> based on info from the Linux k10temp driver.
>
> Additionally use the MSRs defined in
On Tue, Feb 08, 2022 at 09:12:11AM +, Visa Hankala wrote:
> Now that poll(2) is based on kqueue, the old, non-MP-safe poll backend
> is not used any longer. Event sources can call KNOTE() directly instead
> of selwakeup().
>
> This diff does the KNOTE() conversion for pipes and sockets,
On Thu, Apr 21, 2022 at 11:10:40PM +0200, Mark Kettenis wrote:
> > Date: Thu, 21 Apr 2022 22:17:31 +0200
> > From: Alexander Bluhm
> >
> > On Mon, Apr 18, 2022 at 08:33:06AM +, Visa Hankala wrote:
> > > I think the sanest solution is to add the release and acquire barriers
> > > in
> Date: Mon, 25 Apr 2022 16:19:45 +0200
> From: Claudio Jeker
>
> After I sent out my ksmn(4) diff to include cpu frequency sensors dlg@
> told me that this is a generic way to find the cpu frequency on modern x86
> cpus (both intel and amd support it).
>
> So this diff cleans up the CPU
On 25.4.2022. 16:19, Claudio Jeker wrote:
> After I sent out my ksmn(4) diff to include cpu frequency sensors dlg@
> told me that this is a generic way to find the cpu frequency on modern x86
> cpus (both intel and amd support it).
>
> So this diff cleans up the CPU frequency sensors and moves
After I sent out my ksmn(4) diff to include cpu frequency sensors dlg@
told me that this is a generic way to find the cpu frequency on modern x86
cpus (both intel and amd support it).
So this diff cleans up the CPU frequency sensors and moves them to the
cpu(4). I had to split the sensor
> Date: Sun, 24 Apr 2022 20:00:50 -0500
> From: joshua stein
>
> Any interest in this?
>
> acpidptfs0 at acpi0: SEN2, sensor "Sensor 2 USB2"
> acpidptfs1 at acpi0: SEN4, sensor "Sensor 4 Ambience"
> acpidptfs2 at acpi0: SEN1, sensor "Thermistor CPU SOC"
> acpidptfs3 at acpi0: SEN3, sensor
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