Re: audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
On Fri, Dec 09, 2022 at 12:43:31PM -0600, Scott Cheloha wrote:
> On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote:
> > This diff adds an option to display variables periodically. Basically
> > it replaces this usage:
> > 
> > while sleep 1; do audioctl play.errors; done
> > 
> > by
> > 
> > audioctl -w 1 play.errors
> > 
> > The purpose of above audioctl commands is to debug underruns, so we
> > don't want to fork a new process and reopen the device. This would
> > trigger longer kernel code-paths and may cause additional underruns
> > than the ones being investigated.
> > 
> > OK?
> 
> I like the idea, but I would like to tweak some things.
> 
> - Add [-w wait] to the first synoptic form in the manpage.  It's legal
>   to do e.g.
> 
>   # audioctl -w 1
> 

done

> - Call the variable "wait" in audioctl.c to match the manpage.
>

done (used wait_sec, as there's a global wait() symbol).

> - Update usagestr to mention [-w wait].
>

done

> - When polling variables periodically, it's better to use setitimer(2)
>   and sigsuspend(2) instead of sleep(3).  setitimer(2) keeps the period
>   from drifting.
> 
> - Let the user SIGINT (^C) out of the program without returning an
>   error to the shell.
> 
>   I'm unsure about this one, but it seems logical to give the user a
>   way to gracefully terminate the program.  You say in the manpage that
>   the program will continue printing until it is interrupted.
> 

I just tried these. Synchronizing the display to a clock might make
sense if it was the sound card's clock, but here the result was boiler
with no benefit. The intent of -w is to just show the variables from
time to time, so keeping the code trivial is more important,
IMHO. I've added a comment to say so.

About ^C, I've changed the man page text to "audioctl will display
variables forever." which implies that ^C is out of the scope.

Index: audioctl.8
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.8,v
retrieving revision 1.4
diff -u -p -r1.4 audioctl.8
--- audioctl.8  23 Apr 2020 00:16:59 -  1.4
+++ audioctl.8  10 Dec 2022 05:50:05 -
@@ -35,9 +35,11 @@
 .Sh SYNOPSIS
 .Nm audioctl
 .Op Fl f Ar file
+.Op Fl w Ar wait
 .Nm audioctl
 .Op Fl n
 .Op Fl f Ar file
+.Op Fl w Ar wait
 .Ar name ...
 .Nm audioctl
 .Op Fl nq
@@ -59,6 +61,12 @@ The default is
 Suppress printing of the variable name.
 .It Fl q
 Suppress all output when setting a variable.
+.It Fl w Ar wait
+Pause
+.Ar wait
+seconds between each display.
+.Nm
+will display variables forever.
 .It Ar name Ns = Ns Ar value
 Attempt to set the specified variable
 .Ar name
@@ -130,10 +138,10 @@ audio control devices
 audio devices
 .El
 .Sh EXAMPLES
-Display the number of bytes of silence inserted during play buffer
-underruns since device started:
+Once per-second, display the number of bytes of silence inserted due to buffer
+underruns (since the device started playback):
 .Bd -literal -offset indent
-# audioctl play.errors
+# audioctl -w 1 play.errors
 .Ed
 .Pp
 Use signed 24-bit samples and 44100Hz sample rate:
Index: audioctl.c
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.c,v
retrieving revision 1.43
diff -u -p -r1.43 audioctl.c
--- audioctl.c  12 Jul 2021 15:09:19 -  1.43
+++ audioctl.c  10 Dec 2022 05:50:05 -
@@ -43,6 +43,7 @@ struct field {
 #define STR2
 #define ENC3
int type;
+   int show;
int set;
 } fields[] = {
{"name",,NULL,   STR},
@@ -63,11 +64,11 @@ struct field {
 };
 
 const char usagestr[] =
-   "usage: audioctl [-f file]\n"
-   "   audioctl [-n] [-f file] name ...\n"
+   "usage: audioctl [-f file] [-w wait_sec]\n"
+   "   audioctl [-n] [-f file] [-w wait_sec] name ...\n"
"   audioctl [-nq] [-f file] name=value ...\n";
 
-int fd, show_names = 1, quiet = 0;
+int fd, show_names = 1, quiet = 0, wait_sec = 0;
 
 /*
  * parse encoding string (examples: s8, u8, s16, s16le, s24be ...)
@@ -198,20 +199,9 @@ audio_main(int argc, char **argv)
char *lhs, *rhs;
int set = 0;
 
-   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
-   err(1, "AUDIO_GETSTATUS");
-   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
-   err(1, "AUDIO_GETDEV");
-   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
-   err(1, "AUDIO_GETPAR");
-   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
-   err(1, "AUDIO_GETPOS");
if (argc == 0) {
-   for (f = fields; f->name != NULL; f++) {
-   printf("%s=", f->name);
-   print_field(f, f->raddr);
-   printf("\n");
-   }
+   for (f = fields; f->name != NULL; f++)
+   f->show = 1;
}
AUDIO_INITPAR();
for (; argc > 0; argc--, argv++) {
@@ -231,15 +221,41 @@ 

Re: Unlock in_ioctl_get(), push kernel lock into in_ioctl_{set,change}_ifaddr()

2022-12-09 Thread Klemens Nanni
On Wed, Nov 30, 2022 at 06:17:51PM +, Klemens Nanni wrote:
> Follow up on how in6_ioctl() does it:  grab the kernel lock in all the
> ioctl specific functions, where needed and not earlier, i.e. exactly where
> the net lock is currently taken/released.
> 
> Like in6_ioctl_get(), in_ioctl_get() simply grabs a net lock protected
> interface address, may check net lock protected interface flags and copies
> out data -- all under the shared net lock.
> 
> in_ioctl_set_ifaddr() and in_ioctl_change_ifaddr() remain kernel locked,
> but at least their sanity check on ioctl data now happens without it.
> 
> Feedback? Objection? OK?

Ping.

diff --git a/sys/netinet/in.c b/sys/netinet/in.c
index fa778ef580f..fcecc3ec36a 100644
--- a/sys/netinet/in.c
+++ b/sys/netinet/in.c
@@ -216,9 +216,7 @@ in_control(struct socket *so, u_long cmd, caddr_t data, 
struct ifnet *ifp)
break;
 #endif /* MROUTING */
default:
-   KERNEL_LOCK();
error = in_ioctl(cmd, data, ifp, privileged);
-   KERNEL_UNLOCK();
break;
}
 
@@ -262,6 +260,7 @@ in_ioctl(u_long cmd, caddr_t data, struct ifnet *ifp, int 
privileged)
return (error);
}
 
+   KERNEL_LOCK();
NET_LOCK();
 
TAILQ_FOREACH(ifa, >if_addrlist, ifa_list) {
@@ -348,6 +347,7 @@ in_ioctl(u_long cmd, caddr_t data, struct ifnet *ifp, int 
privileged)
}
 err:
NET_UNLOCK();
+   KERNEL_UNLOCK();
return (error);
 }
 
@@ -372,6 +372,7 @@ in_ioctl_set_ifaddr(u_long cmd, caddr_t data, struct ifnet 
*ifp,
if (error)
return (error);
 
+   KERNEL_LOCK();
NET_LOCK();
 
TAILQ_FOREACH(ifa, >if_addrlist, ifa_list) {
@@ -406,6 +407,7 @@ in_ioctl_set_ifaddr(u_long cmd, caddr_t data, struct ifnet 
*ifp,
if_addrhooks_run(ifp);
 
NET_UNLOCK();
+   KERNEL_UNLOCK();
return error;
 }
 
@@ -427,6 +429,7 @@ in_ioctl_change_ifaddr(u_long cmd, caddr_t data, struct 
ifnet *ifp,
return (error);
}
 
+   KERNEL_LOCK();
NET_LOCK();
 
TAILQ_FOREACH(ifa, >if_addrlist, ifa_list) {
@@ -555,9 +558,9 @@ in_ioctl_change_ifaddr(u_long cmd, caddr_t data, struct 
ifnet *ifp,
}
 
NET_UNLOCK();
+   KERNEL_UNLOCK();
return (error);
 }
-
 int
 in_ioctl_get(u_long cmd, caddr_t data, struct ifnet *ifp)
 {



sparc64: don't install %TICK timecounter on UltraSPARC IIe

2022-12-09 Thread Scott Cheloha
The UltraSPARC IIe's %TICK register has a variable frequency.  See
section 2.3 in this document here:

https://web.archive.org/web/20221028065731/https://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/ultrasparc-iie-2516664.pdf

Timecounters need to have a constant frequency, so we should not
install tick_timecounter if the implementation is an UltraSPARC IIe
("Hummingbird").

As far as I know this issue is unique to the IIe.  I can't find any
reference to a varying %TICK frequency in the documentation for the
IIi or the UltraSPARC III.

miod@ confirmed that the problem is real.

ok?

Index: clock.c
===
RCS file: /cvs/src/sys/arch/sparc64/sparc64/clock.c,v
retrieving revision 1.72
diff -u -p -r1.72 clock.c
--- clock.c 10 Nov 2022 07:08:01 -  1.72
+++ clock.c 9 Dec 2022 22:19:33 -
@@ -567,17 +567,23 @@ cpu_initclocks(void)
/* Default to 200MHz clock X */
cpu_clockrate = 2;
 
-   tick_timecounter.tc_frequency = cpu_clockrate;
-   tc_init(_timecounter);
+   if (CPU_ISSUN4U || CPU_ISSUN4US)
+   impl = (getver() & VER_IMPL) >> VER_IMPL_SHIFT;
+
+   /*
+* The TICK frequency varies on the UltraSPARc IIe, so it isn't
+* a suitable timecounter.
+*/
+   if (impl != IMPL_HUMMINGBIRD) {
+   tick_timecounter.tc_frequency = cpu_clockrate;
+   tc_init(_timecounter);
+   }
 
/*
 * UltraSPARC IIe processors do have a STICK register, but it
 * lives on the PCI host bridge and isn't accessible through
 * ASR24.
 */
-   if (CPU_ISSUN4U || CPU_ISSUN4US)
-   impl = (getver() & VER_IMPL) >> VER_IMPL_SHIFT;
-
sys_tick_rate = getpropint(findroot(), "stick-frequency", 0);
if (sys_tick_rate > 0 && impl != IMPL_HUMMINGBIRD) {
sys_tick_timecounter.tc_frequency = sys_tick_rate;



Move solock() down to pru_connect2 handlers

2022-12-09 Thread Vitaliy Makkoveev
Only unix(4) sockets have pru_connect2() support. This movement makes
soconnect2() just pru_connect2() wrapper and removes "persocket" logic
from this path. Since the pru_*() request handlers are the separate
functions, this doesn't introduce locking inconsistency to the pcb
layer.

Also, we already have dummy soabort(), so it looks reasonable to turn it
inline with the soconnect2().

Index: sys/kern/uipc_socket.c
===
RCS file: /cvs/src/sys/kern/uipc_socket.c,v
retrieving revision 1.291
diff -u -p -r1.291 uipc_socket.c
--- sys/kern/uipc_socket.c  28 Nov 2022 21:39:28 -  1.291
+++ sys/kern/uipc_socket.c  9 Dec 2022 21:42:09 -
@@ -484,19 +484,7 @@ soconnect(struct socket *so, struct mbuf
 int
 soconnect2(struct socket *so1, struct socket *so2)
 {
-   int persocket, error;
-
-   if ((persocket = solock_persocket(so1)))
-   solock_pair(so1, so2);
-   else
-   solock(so1);
-
-   error = pru_connect2(so1, so2);
-
-   if (persocket)
-   sounlock(so2);
-   sounlock(so1);
-   return (error);
+   return pru_connect2(so1, so2);
 }
 
 int
Index: sys/kern/uipc_usrreq.c
===
RCS file: /cvs/src/sys/kern/uipc_usrreq.c,v
retrieving revision 1.195
diff -u -p -r1.195 uipc_usrreq.c
--- sys/kern/uipc_usrreq.c  5 Dec 2022 23:18:37 -   1.195
+++ sys/kern/uipc_usrreq.c  9 Dec 2022 21:42:09 -
@@ -678,8 +678,10 @@ uipc_connect2(struct socket *so, struct 
struct unpcb *unp = sotounpcb(so), *unp2;
int error;
 
+   solock_pair(so, so2);
+
if ((error = unp_connect2(so, so2)))
-   return (error);
+   goto error;
 
unp->unp_connid.uid = curproc->p_ucred->cr_uid;
unp->unp_connid.gid = curproc->p_ucred->cr_gid;
@@ -690,8 +692,11 @@ uipc_connect2(struct socket *so, struct 
unp2->unp_connid.gid = curproc->p_ucred->cr_gid;
unp2->unp_connid.pid = curproc->p_p->ps_pid;
unp2->unp_flags |= UNP_FEIDS;
+error:
+   sounlock(so);
+   sounlock(so2);
 
-   return (0);
+   return (error);
 }
 
 int



hostname.if(5): lladdr tweaks

2022-12-09 Thread Jason McIntyre
hi.

two points about the recent ability to use lladdr:

- the example of "bridge0" made sense when bridge was regarded as a
  separate entity and not integrated with ifconfig. plus a list of one
  example looks rubbish. now that we have a second example (lladdr) and
  bridge is not flagged as a special case, i think we can simply the
  text and reduce it to two examples

- i'm not sure about using "lladdr". although we use this term in
  ifconfig(8), we explain it. and people may miss it if they are thinking
  of mac address. i've attempted to both write the term fully as "link
  layer local address" and add a "(MAC)". i suppose you could argue that
  people who think of the term as "lladdr" might miss that (!) but i
  don;t think that is a real worry.

so here's my cut at tweaking...
jmc

Index: hostname.if.5
===
RCS file: /cvs/src/share/man/man5/hostname.if.5,v
retrieving revision 1.80
diff -u -p -r1.80 hostname.if.5
--- hostname.if.5   5 Dec 2022 20:12:00 -   1.80
+++ hostname.if.5   9 Dec 2022 21:25:06 -
@@ -40,13 +40,12 @@
 The
 .Nm hostname.*\&
 files contain information regarding the configuration of each network 
interface.
-The interface can be referenced by name or lladdr, such as
-.Pa hostname.fxp0 ,
-.Pa hostname.00:00:5e:00:53:af ,
+The interface can be referenced by name or link layer (MAC) address, such as
+.Pa hostname.fxp0
 or
-.Pa hostname.bridge0 .
+.Pa hostname.00:00:5e:00:53:af .
 One file should exist for each interface that is to be configured,
-with priority given to configuration by interface name over lladdr.
+with priority given to configuration by interface name over link layer address.
 A configuration file is not needed for lo0.
 .Pp
 The configuration information is expressed in a line-by-line packed format



Re: audioctl: display variables periodically

2022-12-09 Thread Scott Cheloha
On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote:
> This diff adds an option to display variables periodically. Basically
> it replaces this usage:
> 
>   while sleep 1; do audioctl play.errors; done
> 
> by
> 
>   audioctl -w 1 play.errors
> 
> The purpose of above audioctl commands is to debug underruns, so we
> don't want to fork a new process and reopen the device. This would
> trigger longer kernel code-paths and may cause additional underruns
> than the ones being investigated.
> 
> OK?

I like the idea, but I would like to tweak some things.

- Add [-w wait] to the first synoptic form in the manpage.  It's legal
  to do e.g.

# audioctl -w 1

- Call the variable "wait" in audioctl.c to match the manpage.

- Update usagestr to mention [-w wait].

- When polling variables periodically, it's better to use setitimer(2)
  and sigsuspend(2) instead of sleep(3).  setitimer(2) keeps the period
  from drifting.

- Let the user SIGINT (^C) out of the program without returning an
  error to the shell.

  I'm unsure about this one, but it seems logical to give the user a
  way to gracefully terminate the program.  You say in the manpage that
  the program will continue printing until it is interrupted.

Index: audioctl.8
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.8,v
retrieving revision 1.4
diff -u -p -r1.4 audioctl.8
--- audioctl.8  23 Apr 2020 00:16:59 -  1.4
+++ audioctl.8  9 Dec 2022 18:41:45 -
@@ -35,8 +35,10 @@
 .Sh SYNOPSIS
 .Nm audioctl
 .Op Fl f Ar file
+.Op Fl w wait
 .Nm audioctl
 .Op Fl n
+.Op Fl w wait
 .Op Fl f Ar file
 .Ar name ...
 .Nm audioctl
@@ -59,6 +61,12 @@ The default is
 Suppress printing of the variable name.
 .It Fl q
 Suppress all output when setting a variable.
+.It Fl w Ar wait
+Pause
+.Ar wait
+seconds between each display.
+.Nm
+will display variables until it is interrupted.
 .It Ar name Ns = Ns Ar value
 Attempt to set the specified variable
 .Ar name
@@ -130,10 +138,10 @@ audio control devices
 audio devices
 .El
 .Sh EXAMPLES
-Display the number of bytes of silence inserted during play buffer
-underruns since device started:
+Once per second, display the number of bytes of silence inserted
+during play buffer underruns since device started:
 .Bd -literal -offset indent
-# audioctl play.errors
+# audioctl -w 1 play.errors
 .Ed
 .Pp
 Use signed 24-bit samples and 44100Hz sample rate:
Index: audioctl.c
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.c,v
retrieving revision 1.43
diff -u -p -r1.43 audioctl.c
--- audioctl.c  12 Jul 2021 15:09:19 -  1.43
+++ audioctl.c  9 Dec 2022 18:41:45 -
@@ -16,9 +16,11 @@
  */
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -43,6 +45,7 @@ struct field {
 #define STR2
 #define ENC3
int type;
+   int show;
int set;
 } fields[] = {
{"name",,NULL,   STR},
@@ -63,11 +66,24 @@ struct field {
 };
 
 const char usagestr[] =
-   "usage: audioctl [-f file]\n"
-   "   audioctl [-n] [-f file] name ...\n"
+   "usage: audioctl [-f file] [-w wait]\n"
+   "   audioctl [-n] [-f file] [-w wait] name ...\n"
"   audioctl [-nq] [-f file] name=value ...\n";
 
 int fd, show_names = 1, quiet = 0;
+unsigned int wait;
+volatile sig_atomic_t uninterrupted = 1;
+
+void
+handle_alrm(int signo)
+{
+}
+
+void
+handle_int(int signo)
+{
+   uninterrupted = 0;
+}
 
 /*
  * parse encoding string (examples: s8, u8, s16, s16le, s24be ...)
@@ -194,24 +210,15 @@ parse_field(struct field *f, void *addr,
 void
 audio_main(int argc, char **argv)
 {
+   struct itimerval itv;
struct field *f;
char *lhs, *rhs;
+   sigset_t empty;
int set = 0;
 
-   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
-   err(1, "AUDIO_GETSTATUS");
-   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
-   err(1, "AUDIO_GETDEV");
-   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
-   err(1, "AUDIO_GETPAR");
-   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
-   err(1, "AUDIO_GETPOS");
if (argc == 0) {
-   for (f = fields; f->name != NULL; f++) {
-   printf("%s=", f->name);
-   print_field(f, f->raddr);
-   printf("\n");
-   }
+   for (f = fields; f->name != NULL; f++)
+   f->show = 1;
}
AUDIO_INITPAR();
for (; argc > 0; argc--, argv++) {
@@ -231,15 +238,51 @@ audio_main(int argc, char **argv)
parse_field(f, f->waddr, rhs);
f->set = 1;
set = 1;
-   } else {
+   } else
+   f->show = 1;
+   }
+
+   if (set && wait)
+   

Re: sxitimer(4): switch to clockintr

2022-12-09 Thread Mark Kettenis
> Date: Fri, 9 Dec 2022 11:28:43 -0600
> From: Scott Cheloha 
> 
> sxitimer(4) is the fourth and final armv7 clock interrupt driver that
> needs to switch to clockintr.
> 
> - Remove everything related to STATTIMER.  We can multiplex TICKTIMER
>   to handle all clock interrupt events.
> - Remove sxitimer-specific clock interrupt scheduling bits and randomized
>   statclock bits.
> - Wire up sxitimer_intrclock.
> 
> This is not compile-tested.  When we get it to compile, it ought to
> survive a release build if that's practical for machines sporting
> sxitimer(4).
> 
> What sort of machine has one of these?

I have a board with an allwinner A10 here that has it.  I'll see if I
can dig it out over the weekend.

> Index: sys/arch/arm/include/cpu.h
> ===
> RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
> retrieving revision 1.61
> diff -u -p -r1.61 cpu.h
> --- sys/arch/arm/include/cpu.h6 Jul 2021 09:34:06 -   1.61
> +++ sys/arch/arm/include/cpu.h9 Dec 2022 17:27:13 -
> @@ -149,6 +149,7 @@ void  arm32_vector_init(vaddr_t, int);
>   * Per-CPU information.  For now we assume one CPU.
>   */
>  
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -198,7 +199,7 @@ struct cpu_info {
>  #ifdef GPROF
>   struct gmonparam *ci_gmon;
>  #endif
> -
> + struct clockintr_queue  ci_queue;
>   charci_panicbuf[512];
>  };
>  
> Index: sys/arch/arm/include/_types.h
> ===
> RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
> retrieving revision 1.19
> diff -u -p -r1.19 _types.h
> --- sys/arch/arm/include/_types.h 5 Mar 2018 01:15:25 -   1.19
> +++ sys/arch/arm/include/_types.h 9 Dec 2022 17:27:13 -
> @@ -35,6 +35,8 @@
>  #ifndef _ARM__TYPES_H_
>  #define _ARM__TYPES_H_
>  
> +#define  __HAVE_CLOCKINTR
> +
>  #if defined(_KERNEL)
>  typedef struct label_t {
>   long val[11];
> Index: sys/arch/armv7/sunxi/sxitimer.c
> ===
> RCS file: /cvs/src/sys/arch/armv7/sunxi/sxitimer.c,v
> retrieving revision 1.18
> diff -u -p -r1.18 sxitimer.c
> --- sys/arch/armv7/sunxi/sxitimer.c   24 Oct 2021 17:52:28 -  1.18
> +++ sys/arch/armv7/sunxi/sxitimer.c   9 Dec 2022 17:27:14 -
> @@ -20,7 +20,9 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
> +#include 
>  #include 
>  
>  #include 
> @@ -94,6 +96,17 @@ static struct timecounter sxitimer_timec
>   .tc_user = 0,
>  };
>  
> +uint64_t sxitimer_nsec_cycle_ratio;
> +uint64_t sxitimer_nsec_max;
> +
> +void sxitimer_rearm(void *, uint64_t);
> +void sxitimer_trigger(void *);
> +
> +const struct intrclock sxitimer_intrclock = {
> + .ic_rearm = sxitimer_rearm,
> + .ic_trigger = sxitimer_trigger
> +};
> +
>  bus_space_tag_t  sxitimer_iot;
>  bus_space_handle_t   sxitimer_ioh;
>  
> @@ -111,11 +124,6 @@ uint32_t sxitimer_irq[] = {
>   0
>  };
>  
> -uint32_t sxitimer_stat_tpi, sxitimer_tick_tpi;
> -uint32_t sxitimer_statvar, sxitimer_statmin;
> -uint32_t sxitimer_tick_nextevt, sxitimer_stat_nextevt;
> -uint32_t sxitimer_ticks_err_cnt, sxitimer_ticks_err_sum;
> -
>  struct sxitimer_softc {
>   struct device   sc_dev;
>  };
> @@ -147,7 +155,6 @@ void
>  sxitimer_attach(struct device *parent, struct device *self, void *aux)
>  {
>   struct fdt_attach_args *faa = aux;
> - uint32_t freq, ival, now;
>  
>   KASSERT(faa->fa_nreg > 0);
>  
> @@ -163,61 +170,32 @@ sxitimer_attach(struct device *parent, s
>   & CNT64_CLR_EN)
>   continue;
>  
> - /* timers are down-counters, from interval to 0 */
> - now = 0x; /* known big value */
> - freq = sxitimer_freq[TICKTIMER];
> -
>   /* stop timer, and set clk src */
>   bus_space_write_4(sxitimer_iot, sxitimer_ioh,
>   TIMER_CTRL(TICKTIMER), TIMER_OSC24M);
>  
> - ival = sxitimer_tick_tpi = freq / hz;
> - sxitimer_tick_nextevt = now - ival;
> -
> - sxitimer_ticks_err_cnt = freq % hz;
> - sxitimer_ticks_err_sum = 0;
> -
> - bus_space_write_4(sxitimer_iot, sxitimer_ioh,
> - TIMER_INTV(TICKTIMER), ival);
> -
> - /* timers are down-counters, from interval to 0 */
> - now = 0x; /* known big value */
> - freq = sxitimer_freq[STATTIMER];
> -
> - /* stop timer, and set clk src */
> - bus_space_write_4(sxitimer_iot, sxitimer_ioh,
> - TIMER_CTRL(STATTIMER), TIMER_OSC24M);
> + sxitimer_nsec_cycle_ratio =
> + sxitimer_freq[TICKTIMER] * (1ULL << 32) / 10;
> + sxitimer_nsec_max = UINT64_MAX / sxitimer_nsec_cycle_ratio;
>  
>   /* 100/1000 or 128/1024 ? */
>   stathz = 128;
>   profhz = 1024;
> - sxitimer_setstatclockrate(stathz);
> -
> - ival = sxitimer_stat_tpi = freq / stathz;
> - sxitimer_stat_nextevt = now - ival;
> -
> - 

Re: audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
On Fri, Dec 09, 2022 at 04:24:03PM +, Edd Barrett wrote:
> On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote:
> > -Display the number of bytes of silence inserted during play buffer
> > -underruns since device started:
> > +Once per second, display the number of bytes of silence inserted
> > +during play buffer underruns since device started:
> 
> Would it read better as:
> 
> "Once per-second, display the number of bytes of silence inserted due to 
> buffer
> underruns (since the device started playback):"
> 
> And don't forget to update the usage message too :)
> 

Thanks. New diff, with above suggestions plus the fix for the missing
Ar tag in the synopsis.

Index: audioctl.8
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.8,v
retrieving revision 1.4
diff -u -p -u -p -r1.4 audioctl.8
--- audioctl.8  23 Apr 2020 00:16:59 -  1.4
+++ audioctl.8  9 Dec 2022 17:40:21 -
@@ -37,6 +37,7 @@
 .Op Fl f Ar file
 .Nm audioctl
 .Op Fl n
+.Op Fl w Ar wait
 .Op Fl f Ar file
 .Ar name ...
 .Nm audioctl
@@ -59,6 +60,12 @@ The default is
 Suppress printing of the variable name.
 .It Fl q
 Suppress all output when setting a variable.
+.It Fl w Ar wait
+Pause
+.Ar wait
+seconds between each display.
+.Nm
+will display variables until it is interrupted.
 .It Ar name Ns = Ns Ar value
 Attempt to set the specified variable
 .Ar name
@@ -130,10 +137,10 @@ audio control devices
 audio devices
 .El
 .Sh EXAMPLES
-Display the number of bytes of silence inserted during play buffer
-underruns since device started:
+Once per-second, display the number of bytes of silence inserted due to buffer
+underruns (since the device started playback):
 .Bd -literal -offset indent
-# audioctl play.errors
+# audioctl -w 1 play.errors
 .Ed
 .Pp
 Use signed 24-bit samples and 44100Hz sample rate:
Index: audioctl.c
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.c,v
retrieving revision 1.43
diff -u -p -u -p -r1.43 audioctl.c
--- audioctl.c  12 Jul 2021 15:09:19 -  1.43
+++ audioctl.c  9 Dec 2022 17:40:21 -
@@ -43,6 +43,7 @@ struct field {
 #define STR2
 #define ENC3
int type;
+   int show;
int set;
 } fields[] = {
{"name",,NULL,   STR},
@@ -64,10 +65,10 @@ struct field {
 
 const char usagestr[] =
"usage: audioctl [-f file]\n"
-   "   audioctl [-n] [-f file] name ...\n"
+   "   audioctl [-n] [-w wait] [-f file] name ...\n"
"   audioctl [-nq] [-f file] name=value ...\n";
 
-int fd, show_names = 1, quiet = 0;
+int fd, show_names = 1, quiet = 0, period = 0;
 
 /*
  * parse encoding string (examples: s8, u8, s16, s16le, s24be ...)
@@ -198,20 +199,9 @@ audio_main(int argc, char **argv)
char *lhs, *rhs;
int set = 0;
 
-   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
-   err(1, "AUDIO_GETSTATUS");
-   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
-   err(1, "AUDIO_GETDEV");
-   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
-   err(1, "AUDIO_GETPAR");
-   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
-   err(1, "AUDIO_GETPOS");
if (argc == 0) {
-   for (f = fields; f->name != NULL; f++) {
-   printf("%s=", f->name);
-   print_field(f, f->raddr);
-   printf("\n");
-   }
+   for (f = fields; f->name != NULL; f++)
+   f->show = 1;
}
AUDIO_INITPAR();
for (; argc > 0; argc--, argv++) {
@@ -231,15 +221,38 @@ audio_main(int argc, char **argv)
parse_field(f, f->waddr, rhs);
f->set = 1;
set = 1;
-   } else {
+   } else
+   f->show = 1;
+   }
+
+   if (set && period)
+   errx(1, "Can't set variables periodically");
+
+   while (1) {
+   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
+   err(1, "AUDIO_GETSTATUS");
+   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
+   err(1, "AUDIO_GETDEV");
+   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
+   err(1, "AUDIO_GETPAR");
+   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
+   err(1, "AUDIO_GETPOS");
+   for (f = fields; f->name != NULL; f++) {
+   if (!f->show)
+   continue;
if (show_names)
printf("%s=", f->name);
print_field(f, f->raddr);
printf("\n");
}
+   if (period == 0)
+   break;
+   sleep(period);
}
+
if (!set)
return;
+
if (ioctl(fd, AUDIO_SETPAR, ) == -1)
  

Re: skeleton mwx(4) - MediaTek MT7921 driver

2022-12-09 Thread Theo de Raadt
If there's someone who wants to dig into this, but lack a card, I have
one I can send.

Claudio Jeker  wrote:

> Here is the start of mwx(4) a driver for the MediaTek MT7921 chip which
> shipped for example in Lenovo AMD T14 Gen 2 laptops.
> So far the firmware loading works reliably and also the various DMA ring
> operate. It is possible to send commands and get answers. The problem
> where I got stuck now for a while is that the scan command fails to scan
> more than channel 1 and switching channel puts the device into a broken
> state.
> 
> I kind of hit a wall and hope someone else would like to join and share
> the pain. To enable the driver add 'mwx* at pci?' to your kernel config.
> 
> -- 
> :wq Claudio
> 
> Index: files.pci
> ===
> RCS file: /cvs/src/sys/dev/pci/files.pci,v
> retrieving revision 1.359
> diff -u -p -r1.359 files.pci
> --- files.pci 31 Mar 2022 21:41:17 -  1.359
> +++ files.pci 5 Apr 2022 06:44:51 -
> @@ -850,5 +850,10 @@ file dev/pci/igc_phy.c   igc
>  attach   com at pci with com_pci
>  file dev/pci/com_pci.c   com_pci
>  
> +# MediaTek MT7921E wifi
> +device   mwx: ifnet, wlan, firmload
> +attach   mwx at pci
> +file dev/pci/if_mwx.cmwx
> +
>  include "dev/pci/files.agp"
>  include "dev/pci/drm/files.drm"
> Index: if_mwx.c
> ===
> RCS file: if_mwx.c
> diff -N if_mwx.c
> --- /dev/null 1 Jan 1970 00:00:00 -
> +++ if_mwx.c  9 Dec 2022 17:03:39 -
> @@ -0,0 +1,3652 @@
> +/*
> + * Copyright (c) 2022 Claudio Jeker 
> + * Copyright (c) 2021 MediaTek Inc.
> + * Copyright (c) 2021 Lorenzo Bianconi 
> + * Copyright (c) 2017 Stefan Sperling 
> + * Copyright (c) 2016 Felix Fietkau 
> + * Copyright (c) 2007-2010 Damien Bergamini 
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#include "bpfilter.h"
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +
> +#if NBPFILTER > 0
> +#include 
> +#endif
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +static const struct pci_matchid mwx_devices[] = {
> + { PCI_VENDOR_MEDIATEK, PCI_PRODUCT_MEDIATEK_MT7921 },
> + { PCI_VENDOR_MEDIATEK, PCI_PRODUCT_MEDIATEK_MT7921K },
> +};
> +
> +#define MWX_DEBUG1
> +
> +#define  MT7921_ROM_PATCH"mt7961_1_2_rom_patch.bin"
> +#define  MT7921_FIRMWARE_WM  "mt7961_1.bin"
> +
> +#if NBPFILTER > 0
> +struct mwx_rx_radiotap_header {
> + struct ieee80211_radiotap_headerwr_ihdr;
> + uint64_twr_tsft;
> + uint8_t wr_flags;
> + uint8_t wr_rate;
> + uint16_twr_chan_freq;
> + uint16_twr_chan_flags;
> + int8_t  wr_dbm_antsignal;
> + int8_t  wr_dbm_antnoise;
> +} __packed;
> +
> +#define  MWX_RX_RADIOTAP_PRESENT \
> + ((1 << IEEE80211_RADIOTAP_TSFT) |   \
> + (1 << IEEE80211_RADIOTAP_FLAGS) |   \
> + (1 << IEEE80211_RADIOTAP_RATE) |\
> + (1 << IEEE80211_RADIOTAP_CHANNEL) | \
> + (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |   \
> + (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
> +
> +struct mwx_tx_radiotap_header {
> + struct ieee80211_radiotap_headerwt_ihdr;
> + uint8_t wt_flags;
> + uint8_t wt_rate;
> + uint16_twt_chan_freq;
> + uint16_twt_chan_flags;
> +} __packed;
> +
> +#define  MWX_TX_RADIOTAP_PRESENT \
> + ((1 << IEEE80211_RADIOTAP_FLAGS) |  \
> + (1 << IEEE80211_RADIOTAP_RATE) |\
> + (1 << IEEE80211_RADIOTAP_CHANNEL))
> +
> +#endif
> +
> +struct mwx_data {
> + struct mbuf *md_data;
> + bus_dmamap_t md_map;
> +};
> +
> +struct mwx_queue {
> + uint32_t  

Re: Introduce `sb_state' and move SS_CANTSENDMORE to SBS_CANTSENDMORE

2022-12-09 Thread Todd C . Miller
On Fri, 09 Dec 2022 19:48:02 +0300, Vitaliy Makkoveev wrote:

> This time, socket's buffer lock requires solock() to be held. I'm
> working on standalone socket's buffer locking, and I want to commit some
> bits. I mean SS_CANTSENDMORE and SS_CANTRCVMORE socket's state bits,
> which I want to turn into per buffer state. The diff below introduces
> per buffer `sb_state' and turns SS_CANTSENDMORE into SBS_CANTSENDMORE.
> This bit will be processed on `so_snd' buffer only.
>
> I want to move SS_CANTRCVMORE and SS_RCVATMARK bits with separate diff
> to make the review easier and exclude possible so_rcv/so_snd mistypes.
>
> Also, I don't want to adjust the remaining SS_* bits right now.

This looks fine to me.  It is nice that we get sb_state for free
since it is adjacent to sb_flags (also a short).

 - todd



sxitimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
sxitimer(4) is the fourth and final armv7 clock interrupt driver that
needs to switch to clockintr.

- Remove everything related to STATTIMER.  We can multiplex TICKTIMER
  to handle all clock interrupt events.
- Remove sxitimer-specific clock interrupt scheduling bits and randomized
  statclock bits.
- Wire up sxitimer_intrclock.

This is not compile-tested.  When we get it to compile, it ought to
survive a release build if that's practical for machines sporting
sxitimer(4).

What sort of machine has one of these?

Index: sys/arch/arm/include/cpu.h
===
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.61
diff -u -p -r1.61 cpu.h
--- sys/arch/arm/include/cpu.h  6 Jul 2021 09:34:06 -   1.61
+++ sys/arch/arm/include/cpu.h  9 Dec 2022 17:27:13 -
@@ -149,6 +149,7 @@ voidarm32_vector_init(vaddr_t, int);
  * Per-CPU information.  For now we assume one CPU.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -198,7 +199,7 @@ struct cpu_info {
 #ifdef GPROF
struct gmonparam *ci_gmon;
 #endif
-
+   struct clockintr_queue  ci_queue;
charci_panicbuf[512];
 };
 
Index: sys/arch/arm/include/_types.h
===
RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
retrieving revision 1.19
diff -u -p -r1.19 _types.h
--- sys/arch/arm/include/_types.h   5 Mar 2018 01:15:25 -   1.19
+++ sys/arch/arm/include/_types.h   9 Dec 2022 17:27:13 -
@@ -35,6 +35,8 @@
 #ifndef _ARM__TYPES_H_
 #define _ARM__TYPES_H_
 
+#define__HAVE_CLOCKINTR
+
 #if defined(_KERNEL)
 typedef struct label_t {
long val[11];
Index: sys/arch/armv7/sunxi/sxitimer.c
===
RCS file: /cvs/src/sys/arch/armv7/sunxi/sxitimer.c,v
retrieving revision 1.18
diff -u -p -r1.18 sxitimer.c
--- sys/arch/armv7/sunxi/sxitimer.c 24 Oct 2021 17:52:28 -  1.18
+++ sys/arch/armv7/sunxi/sxitimer.c 9 Dec 2022 17:27:14 -
@@ -20,7 +20,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 #include 
 
 #include 
@@ -94,6 +96,17 @@ static struct timecounter sxitimer_timec
.tc_user = 0,
 };
 
+uint64_t sxitimer_nsec_cycle_ratio;
+uint64_t sxitimer_nsec_max;
+
+void sxitimer_rearm(void *, uint64_t);
+void sxitimer_trigger(void *);
+
+const struct intrclock sxitimer_intrclock = {
+   .ic_rearm = sxitimer_rearm,
+   .ic_trigger = sxitimer_trigger
+};
+
 bus_space_tag_tsxitimer_iot;
 bus_space_handle_t sxitimer_ioh;
 
@@ -111,11 +124,6 @@ uint32_t sxitimer_irq[] = {
0
 };
 
-uint32_t sxitimer_stat_tpi, sxitimer_tick_tpi;
-uint32_t sxitimer_statvar, sxitimer_statmin;
-uint32_t sxitimer_tick_nextevt, sxitimer_stat_nextevt;
-uint32_t sxitimer_ticks_err_cnt, sxitimer_ticks_err_sum;
-
 struct sxitimer_softc {
struct device   sc_dev;
 };
@@ -147,7 +155,6 @@ void
 sxitimer_attach(struct device *parent, struct device *self, void *aux)
 {
struct fdt_attach_args *faa = aux;
-   uint32_t freq, ival, now;
 
KASSERT(faa->fa_nreg > 0);
 
@@ -163,61 +170,32 @@ sxitimer_attach(struct device *parent, s
& CNT64_CLR_EN)
continue;
 
-   /* timers are down-counters, from interval to 0 */
-   now = 0x; /* known big value */
-   freq = sxitimer_freq[TICKTIMER];
-
/* stop timer, and set clk src */
bus_space_write_4(sxitimer_iot, sxitimer_ioh,
TIMER_CTRL(TICKTIMER), TIMER_OSC24M);
 
-   ival = sxitimer_tick_tpi = freq / hz;
-   sxitimer_tick_nextevt = now - ival;
-
-   sxitimer_ticks_err_cnt = freq % hz;
-   sxitimer_ticks_err_sum = 0;
-
-   bus_space_write_4(sxitimer_iot, sxitimer_ioh,
-   TIMER_INTV(TICKTIMER), ival);
-
-   /* timers are down-counters, from interval to 0 */
-   now = 0x; /* known big value */
-   freq = sxitimer_freq[STATTIMER];
-
-   /* stop timer, and set clk src */
-   bus_space_write_4(sxitimer_iot, sxitimer_ioh,
-   TIMER_CTRL(STATTIMER), TIMER_OSC24M);
+   sxitimer_nsec_cycle_ratio =
+   sxitimer_freq[TICKTIMER] * (1ULL << 32) / 10;
+   sxitimer_nsec_max = UINT64_MAX / sxitimer_nsec_cycle_ratio;
 
/* 100/1000 or 128/1024 ? */
stathz = 128;
profhz = 1024;
-   sxitimer_setstatclockrate(stathz);
-
-   ival = sxitimer_stat_tpi = freq / stathz;
-   sxitimer_stat_nextevt = now - ival;
-
-   bus_space_write_4(sxitimer_iot, sxitimer_ioh,
-   TIMER_INTV(STATTIMER), ival);
-
-   /* timers are down-counters, from interval to 0 */
-   now = 0x; /* known big value */
-   freq = sxitimer_freq[CNTRTIMER];
+   clockintr_init(CL_RNDSTAT);
 
/* stop timer, and set clk src */
bus_space_write_4(sxitimer_iot, sxitimer_ioh,

Re: dmtimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
On Fri, Dec 09, 2022 at 06:03:38PM +0100, Mark Kettenis wrote:
> > Date: Fri, 9 Dec 2022 10:32:26 -0600
> > From: Scott Cheloha 
> > 
> > dmtimer(4) is a third armv7 clock interrupt driver that needs to
> > switch to clockintr.
> > 
> > - Remove dmtimer-specific clock interrupt scheduling bits and
> >   randomized statclock bits.
> > - Add dmtimer_reset_tisr().  We need to clear the pending interrupt
> >   bits in multiple spots in exactly the same way, seems better to
> >   write it once.
> > - Wire up dmtimer_intrclock.
> > 
> > This is not compile-tested.  When we get it to compile, it then ought
> > to survive a release build.  I don't know if that is practical,
> > though.  Maybe machines with dmtimer(4) are not beefy enough to build
> > a release?
> > 
> > In any case, my guess is that dmtimer(4) is somewhat rare.  Where can
> > we find one?
> 
> The beaglebone has this one.  Those are fairly common.  Maybe ask
> stuge as he hacks on these SoCs.  I think jsg@ has one as well.

jsg/stuge:

Could one of you give this a spin on your Beaglebone?  Need to get it
to compile, boot, and then through a release build.

Index: sys/arch/arm/include/cpu.h
===
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.61
diff -u -p -r1.61 cpu.h
--- sys/arch/arm/include/cpu.h  6 Jul 2021 09:34:06 -   1.61
+++ sys/arch/arm/include/cpu.h  9 Dec 2022 16:31:31 -
@@ -149,6 +149,7 @@ voidarm32_vector_init(vaddr_t, int);
  * Per-CPU information.  For now we assume one CPU.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -198,7 +199,7 @@ struct cpu_info {
 #ifdef GPROF
struct gmonparam *ci_gmon;
 #endif
-
+   struct clockintr_queue  ci_queue;
charci_panicbuf[512];
 };
 
Index: sys/arch/arm/include/_types.h
===
RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
retrieving revision 1.19
diff -u -p -r1.19 _types.h
--- sys/arch/arm/include/_types.h   5 Mar 2018 01:15:25 -   1.19
+++ sys/arch/arm/include/_types.h   9 Dec 2022 16:31:31 -
@@ -35,6 +35,8 @@
 #ifndef _ARM__TYPES_H_
 #define _ARM__TYPES_H_
 
+#define__HAVE_CLOCKINTR
+
 #if defined(_KERNEL)
 typedef struct label_t {
long val[11];
Index: sys/arch/armv7/omap/dmtimer.c
===
RCS file: /cvs/src/sys/arch/armv7/omap/dmtimer.c,v
retrieving revision 1.15
diff -u -p -r1.15 dmtimer.c
--- sys/arch/armv7/omap/dmtimer.c   21 Feb 2022 10:57:58 -  1.15
+++ sys/arch/armv7/omap/dmtimer.c   9 Dec 2022 16:31:31 -
@@ -25,9 +25,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -95,11 +97,9 @@
 #define TIMER_FREQUENCY32768   /* 32kHz is used, 
selectable */
 #define MAX_TIMERS 2
 
-static struct evcount clk_count;
-static struct evcount stat_count;
-
 void dmtimer_attach(struct device *parent, struct device *self, void *args);
 int dmtimer_intr(void *frame);
+void dmtimer_reset_tisr(void);
 void dmtimer_wait(int reg);
 void dmtimer_cpu_initclocks(void);
 void dmtimer_delay(u_int);
@@ -117,6 +117,14 @@ static struct timecounter dmtimer_timeco
.tc_priv = NULL,
 };
 
+void dmtimer_rearm(void *, uint64_t);
+void dmtimer_trigger(void *);
+
+struct intrclock dmtimer_intrclock = {
+   .ic_rearm = dmtimer_rearm,
+   .ic_trigger = dmtimer_trigger
+};
+
 bus_space_handle_t dmtimer_ioh0;
 int dmtimer_irq = 0;
 
@@ -126,13 +134,8 @@ struct dmtimer_softc {
bus_space_handle_t  sc_ioh[MAX_TIMERS];
u_int32_t   sc_irq;
u_int32_t   sc_ticks_per_second;
-   u_int32_t   sc_ticks_per_intr;
-   u_int32_t   sc_ticks_err_cnt;
-   u_int32_t   sc_ticks_err_sum;
-   u_int32_t   sc_statvar;
-   u_int32_t   sc_statmin;
-   u_int32_t   sc_nexttickevent;
-   u_int32_t   sc_nextstatevent;
+   u_int64_t   sc_nsec_cycle_ratio;
+   u_int64_t   sc_nsec_max;
 };
 
 const struct cfattach  dmtimer_ca = {
@@ -208,82 +211,11 @@ dmtimer_attach(struct device *parent, st
printf(" rev %d.%d\n", (rev & DM_TIDR_MAJOR) >> 8, rev & DM_TIDR_MINOR);
 }
 
-/*
- * See comment in arm/xscale/i80321_clock.c
- *
- * Counter is count up, but with autoreload timers it is not possible
- * to detect how many interrupts passed while interrupts were blocked.
- * Also it is not possible to atomically add to the register.
- *
- * To work around this two timers are used, one is used as a reference
- * clock without reload, however we just disable the interrupt it
- * could generate.
- *
- * Internally this keeps track of when the next timer should fire
- * and based on that time and the current 

skeleton mwx(4) - MediaTek MT7921 driver

2022-12-09 Thread Claudio Jeker
Here is the start of mwx(4) a driver for the MediaTek MT7921 chip which
shipped for example in Lenovo AMD T14 Gen 2 laptops.
So far the firmware loading works reliably and also the various DMA ring
operate. It is possible to send commands and get answers. The problem
where I got stuck now for a while is that the scan command fails to scan
more than channel 1 and switching channel puts the device into a broken
state.

I kind of hit a wall and hope someone else would like to join and share
the pain. To enable the driver add 'mwx* at pci?' to your kernel config.

-- 
:wq Claudio

Index: files.pci
===
RCS file: /cvs/src/sys/dev/pci/files.pci,v
retrieving revision 1.359
diff -u -p -r1.359 files.pci
--- files.pci   31 Mar 2022 21:41:17 -  1.359
+++ files.pci   5 Apr 2022 06:44:51 -
@@ -850,5 +850,10 @@ file   dev/pci/igc_phy.c   igc
 attach com at pci with com_pci
 file   dev/pci/com_pci.c   com_pci
 
+# MediaTek MT7921E wifi
+device mwx: ifnet, wlan, firmload
+attach mwx at pci
+file   dev/pci/if_mwx.cmwx
+
 include "dev/pci/files.agp"
 include "dev/pci/drm/files.drm"
Index: if_mwx.c
===
RCS file: if_mwx.c
diff -N if_mwx.c
--- /dev/null   1 Jan 1970 00:00:00 -
+++ if_mwx.c9 Dec 2022 17:03:39 -
@@ -0,0 +1,3652 @@
+/*
+ * Copyright (c) 2022 Claudio Jeker 
+ * Copyright (c) 2021 MediaTek Inc.
+ * Copyright (c) 2021 Lorenzo Bianconi 
+ * Copyright (c) 2017 Stefan Sperling 
+ * Copyright (c) 2016 Felix Fietkau 
+ * Copyright (c) 2007-2010 Damien Bergamini 
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include "bpfilter.h"
+
+#include 
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+#include 
+
+#if NBPFILTER > 0
+#include 
+#endif
+#include 
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+#include 
+
+#include 
+
+static const struct pci_matchid mwx_devices[] = {
+   { PCI_VENDOR_MEDIATEK, PCI_PRODUCT_MEDIATEK_MT7921 },
+   { PCI_VENDOR_MEDIATEK, PCI_PRODUCT_MEDIATEK_MT7921K },
+};
+
+#define MWX_DEBUG  1
+
+#defineMT7921_ROM_PATCH"mt7961_1_2_rom_patch.bin"
+#defineMT7921_FIRMWARE_WM  "mt7961_1.bin"
+
+#if NBPFILTER > 0
+struct mwx_rx_radiotap_header {
+   struct ieee80211_radiotap_headerwr_ihdr;
+   uint64_twr_tsft;
+   uint8_t wr_flags;
+   uint8_t wr_rate;
+   uint16_twr_chan_freq;
+   uint16_twr_chan_flags;
+   int8_t  wr_dbm_antsignal;
+   int8_t  wr_dbm_antnoise;
+} __packed;
+
+#defineMWX_RX_RADIOTAP_PRESENT \
+   ((1 << IEEE80211_RADIOTAP_TSFT) |   \
+   (1 << IEEE80211_RADIOTAP_FLAGS) |   \
+   (1 << IEEE80211_RADIOTAP_RATE) |\
+   (1 << IEEE80211_RADIOTAP_CHANNEL) | \
+   (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |   \
+   (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE))
+
+struct mwx_tx_radiotap_header {
+   struct ieee80211_radiotap_headerwt_ihdr;
+   uint8_t wt_flags;
+   uint8_t wt_rate;
+   uint16_twt_chan_freq;
+   uint16_twt_chan_flags;
+} __packed;
+
+#defineMWX_TX_RADIOTAP_PRESENT \
+   ((1 << IEEE80211_RADIOTAP_FLAGS) |  \
+   (1 << IEEE80211_RADIOTAP_RATE) |\
+   (1 << IEEE80211_RADIOTAP_CHANNEL))
+
+#endif
+
+struct mwx_data {
+   struct mbuf *md_data;
+   bus_dmamap_t md_map;
+};
+
+struct mwx_queue {
+   uint32_tmq_regbase;
+   u_int   mq_count;
+   u_int   mq_prod;
+   u_int   mq_cons;
+
+   struct mt76_desc*mq_desc;
+   struct mwx_data *mq_data;
+
+   bus_dmamap_tmq_map;
+   bus_dma_segment_t   mq_seg;
+   int

Introduce `sb_state' and move SS_CANTSENDMORE to SBS_CANTSENDMORE

2022-12-09 Thread Vitaliy Makkoveev
This time, socket's buffer lock requires solock() to be held. I'm
working on standalone socket's buffer locking, and I want to commit some
bits. I mean SS_CANTSENDMORE and SS_CANTRCVMORE socket's state bits,
which I want to turn into per buffer state. The diff below introduces
per buffer `sb_state' and turns SS_CANTSENDMORE into SBS_CANTSENDMORE.
This bit will be processed on `so_snd' buffer only.

I want to move SS_CANTRCVMORE and SS_RCVATMARK bits with separate diff
to make the review easier and exclude possible so_rcv/so_snd mistypes.

Also, I don't want to adjust the remaining SS_* bits right now.

Index: sys/kern/sys_socket.c
===
RCS file: /cvs/src/sys/kern/sys_socket.c,v
retrieving revision 1.56
diff -u -p -r1.56 sys_socket.c
--- sys/kern/sys_socket.c   19 Nov 2022 14:26:39 -  1.56
+++ sys/kern/sys_socket.c   9 Dec 2022 16:39:25 -
@@ -151,7 +151,7 @@ soo_stat(struct file *fp, struct stat *u
solock(so);
if ((so->so_state & SS_CANTRCVMORE) == 0 || so->so_rcv.sb_cc != 0)
ub->st_mode |= S_IRUSR | S_IRGRP | S_IROTH;
-   if ((so->so_state & SS_CANTSENDMORE) == 0)
+   if ((so->so_snd.sb_state & SBS_CANTSENDMORE) == 0)
ub->st_mode |= S_IWUSR | S_IWGRP | S_IWOTH;
ub->st_uid = so->so_euid;
ub->st_gid = so->so_egid;
Index: sys/kern/uipc_socket.c
===
RCS file: /cvs/src/sys/kern/uipc_socket.c,v
retrieving revision 1.291
diff -u -p -r1.291 uipc_socket.c
--- sys/kern/uipc_socket.c  28 Nov 2022 21:39:28 -  1.291
+++ sys/kern/uipc_socket.c  9 Dec 2022 16:39:26 -
@@ -580,7 +580,7 @@ restart:
goto out;
so->so_state |= SS_ISSENDING;
do {
-   if (so->so_state & SS_CANTSENDMORE)
+   if (so->so_snd.sb_state & SBS_CANTSENDMORE)
snderr(EPIPE);
if (so->so_error) {
error = so->so_error;
@@ -1465,7 +1465,7 @@ somove(struct socket *so, int wait)
error = so->so_error;
goto release;
}
-   if (sosp->so_state & SS_CANTSENDMORE) {
+   if (sosp->so_snd.sb_state & SBS_CANTSENDMORE) {
error = EPIPE;
goto release;
}
@@ -1659,7 +1659,8 @@ somove(struct socket *so, int wait)
if (o) {
error = pru_send(sosp, m, NULL, NULL);
if (error) {
-   if (sosp->so_state & SS_CANTSENDMORE)
+   if (sosp->so_snd.sb_state &
+   SBS_CANTSENDMORE)
error = EPIPE;
m_freem(o);
goto release;
@@ -1676,7 +1677,7 @@ somove(struct socket *so, int wait)
*mtod(o, caddr_t) = *mtod(m, caddr_t);
error = pru_sendoob(sosp, o, NULL, NULL);
if (error) {
-   if (sosp->so_state & SS_CANTSENDMORE)
+   if (sosp->so_snd.sb_state & SBS_CANTSENDMORE)
error = EPIPE;
m_freem(m);
goto release;
@@ -1697,7 +1698,7 @@ somove(struct socket *so, int wait)
sosp->so_state &= ~SS_ISSENDING;
error = pru_send(sosp, m, NULL, NULL);
if (error) {
-   if (sosp->so_state & SS_CANTSENDMORE)
+   if (sosp->so_snd.sb_state & SBS_CANTSENDMORE)
error = EPIPE;
goto release;
}
@@ -1714,7 +1715,8 @@ somove(struct socket *so, int wait)
if (error)
so->so_error = error;
if (((so->so_state & SS_CANTRCVMORE) && so->so_rcv.sb_cc == 0) ||
-   (sosp->so_state & SS_CANTSENDMORE) || maxreached || error) {
+   (sosp->so_snd.sb_state & SBS_CANTSENDMORE) ||
+   maxreached || error) {
sounsplice(so, sosp, 0);
return (0);
}
@@ -1839,7 +1841,7 @@ sosetopt(struct socket *so, int level, i
switch (optname) {
 
case SO_SNDBUF:
-   if (so->so_state & SS_CANTSENDMORE)
+   if (so->so_snd.sb_state & SBS_CANTSENDMORE)
return (EINVAL);
if (sbcheckreserve(cnt, so->so_snd.sb_wat) ||
sbreserve(so, >so_snd, cnt))
@@ -2185,7 +2187,7 @@ filt_sowrite(struct knote *kn, long hint
soassertlocked(so);
 
kn->kn_data = sbspace(so, >so_snd);
-   if (so->so_state & SS_CANTSENDMORE) {
+   if (so->so_snd.sb_state & SBS_CANTSENDMORE) 

Re: dmtimer(4): switch to clockintr

2022-12-09 Thread Mark Kettenis
> Date: Fri, 9 Dec 2022 10:32:26 -0600
> From: Scott Cheloha 
> 
> dmtimer(4) is a third armv7 clock interrupt driver that needs to
> switch to clockintr.
> 
> - Remove dmtimer-specific clock interrupt scheduling bits and
>   randomized statclock bits.
> - Add dmtimer_reset_tisr().  We need to clear the pending interrupt
>   bits in multiple spots in exactly the same way, seems better to
>   write it once.
> - Wire up dmtimer_intrclock.
> 
> This is not compile-tested.  When we get it to compile, it then ought
> to survive a release build.  I don't know if that is practical,
> though.  Maybe machines with dmtimer(4) are not beefy enough to build
> a release?
> 
> In any case, my guess is that dmtimer(4) is somewhat rare.  Where can
> we find one?

The beaglebone has this one.  Those are fairly common.  Maybe ask
stuge as he hacks on these SoCs.  I think jsg@ has one as well.


> Index: sys/arch/arm/include/cpu.h
> ===
> RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
> retrieving revision 1.61
> diff -u -p -r1.61 cpu.h
> --- sys/arch/arm/include/cpu.h6 Jul 2021 09:34:06 -   1.61
> +++ sys/arch/arm/include/cpu.h9 Dec 2022 16:31:31 -
> @@ -149,6 +149,7 @@ void  arm32_vector_init(vaddr_t, int);
>   * Per-CPU information.  For now we assume one CPU.
>   */
>  
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -198,7 +199,7 @@ struct cpu_info {
>  #ifdef GPROF
>   struct gmonparam *ci_gmon;
>  #endif
> -
> + struct clockintr_queue  ci_queue;
>   charci_panicbuf[512];
>  };
>  
> Index: sys/arch/arm/include/_types.h
> ===
> RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
> retrieving revision 1.19
> diff -u -p -r1.19 _types.h
> --- sys/arch/arm/include/_types.h 5 Mar 2018 01:15:25 -   1.19
> +++ sys/arch/arm/include/_types.h 9 Dec 2022 16:31:31 -
> @@ -35,6 +35,8 @@
>  #ifndef _ARM__TYPES_H_
>  #define _ARM__TYPES_H_
>  
> +#define  __HAVE_CLOCKINTR
> +
>  #if defined(_KERNEL)
>  typedef struct label_t {
>   long val[11];
> Index: sys/arch/armv7/omap/dmtimer.c
> ===
> RCS file: /cvs/src/sys/arch/armv7/omap/dmtimer.c,v
> retrieving revision 1.15
> diff -u -p -r1.15 dmtimer.c
> --- sys/arch/armv7/omap/dmtimer.c 21 Feb 2022 10:57:58 -  1.15
> +++ sys/arch/armv7/omap/dmtimer.c 9 Dec 2022 16:31:31 -
> @@ -25,9 +25,11 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> @@ -95,11 +97,9 @@
>  #define TIMER_FREQUENCY  32768   /* 32kHz is used, 
> selectable */
>  #define MAX_TIMERS   2
>  
> -static struct evcount clk_count;
> -static struct evcount stat_count;
> -
>  void dmtimer_attach(struct device *parent, struct device *self, void *args);
>  int dmtimer_intr(void *frame);
> +void dmtimer_reset_tisr(void);
>  void dmtimer_wait(int reg);
>  void dmtimer_cpu_initclocks(void);
>  void dmtimer_delay(u_int);
> @@ -117,6 +117,14 @@ static struct timecounter dmtimer_timeco
>   .tc_priv = NULL,
>  };
>  
> +void dmtimer_rearm(void *, uint64_t);
> +void dmtimer_trigger(void *);
> +
> +struct intrclock dmtimer_intrclock = {
> + .ic_rearm = dmtimer_rearm,
> + .ic_trigger = dmtimer_trigger
> +};
> +
>  bus_space_handle_t dmtimer_ioh0;
>  int dmtimer_irq = 0;
>  
> @@ -126,13 +134,8 @@ struct dmtimer_softc {
>   bus_space_handle_t  sc_ioh[MAX_TIMERS];
>   u_int32_t   sc_irq;
>   u_int32_t   sc_ticks_per_second;
> - u_int32_t   sc_ticks_per_intr;
> - u_int32_t   sc_ticks_err_cnt;
> - u_int32_t   sc_ticks_err_sum;
> - u_int32_t   sc_statvar;
> - u_int32_t   sc_statmin;
> - u_int32_t   sc_nexttickevent;
> - u_int32_t   sc_nextstatevent;
> + u_int64_t   sc_nsec_cycle_ratio;
> + u_int64_t   sc_nsec_max;
>  };
>  
>  const struct cfattachdmtimer_ca = {
> @@ -208,82 +211,11 @@ dmtimer_attach(struct device *parent, st
>   printf(" rev %d.%d\n", (rev & DM_TIDR_MAJOR) >> 8, rev & DM_TIDR_MINOR);
>  }
>  
> -/*
> - * See comment in arm/xscale/i80321_clock.c
> - *
> - * Counter is count up, but with autoreload timers it is not possible
> - * to detect how many interrupts passed while interrupts were blocked.
> - * Also it is not possible to atomically add to the register.
> - *
> - * To work around this two timers are used, one is used as a reference
> - * clock without reload, however we just disable the interrupt it
> - * could generate.
> - *
> - * Internally this keeps track of when the next timer should fire
> - * and based on that time and the current value of the reference
> - * clock a 

dmtimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
dmtimer(4) is a third armv7 clock interrupt driver that needs to
switch to clockintr.

- Remove dmtimer-specific clock interrupt scheduling bits and
  randomized statclock bits.
- Add dmtimer_reset_tisr().  We need to clear the pending interrupt
  bits in multiple spots in exactly the same way, seems better to
  write it once.
- Wire up dmtimer_intrclock.

This is not compile-tested.  When we get it to compile, it then ought
to survive a release build.  I don't know if that is practical,
though.  Maybe machines with dmtimer(4) are not beefy enough to build
a release?

In any case, my guess is that dmtimer(4) is somewhat rare.  Where can
we find one?

Index: sys/arch/arm/include/cpu.h
===
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.61
diff -u -p -r1.61 cpu.h
--- sys/arch/arm/include/cpu.h  6 Jul 2021 09:34:06 -   1.61
+++ sys/arch/arm/include/cpu.h  9 Dec 2022 16:31:31 -
@@ -149,6 +149,7 @@ voidarm32_vector_init(vaddr_t, int);
  * Per-CPU information.  For now we assume one CPU.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -198,7 +199,7 @@ struct cpu_info {
 #ifdef GPROF
struct gmonparam *ci_gmon;
 #endif
-
+   struct clockintr_queue  ci_queue;
charci_panicbuf[512];
 };
 
Index: sys/arch/arm/include/_types.h
===
RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
retrieving revision 1.19
diff -u -p -r1.19 _types.h
--- sys/arch/arm/include/_types.h   5 Mar 2018 01:15:25 -   1.19
+++ sys/arch/arm/include/_types.h   9 Dec 2022 16:31:31 -
@@ -35,6 +35,8 @@
 #ifndef _ARM__TYPES_H_
 #define _ARM__TYPES_H_
 
+#define__HAVE_CLOCKINTR
+
 #if defined(_KERNEL)
 typedef struct label_t {
long val[11];
Index: sys/arch/armv7/omap/dmtimer.c
===
RCS file: /cvs/src/sys/arch/armv7/omap/dmtimer.c,v
retrieving revision 1.15
diff -u -p -r1.15 dmtimer.c
--- sys/arch/armv7/omap/dmtimer.c   21 Feb 2022 10:57:58 -  1.15
+++ sys/arch/armv7/omap/dmtimer.c   9 Dec 2022 16:31:31 -
@@ -25,9 +25,11 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -95,11 +97,9 @@
 #define TIMER_FREQUENCY32768   /* 32kHz is used, 
selectable */
 #define MAX_TIMERS 2
 
-static struct evcount clk_count;
-static struct evcount stat_count;
-
 void dmtimer_attach(struct device *parent, struct device *self, void *args);
 int dmtimer_intr(void *frame);
+void dmtimer_reset_tisr(void);
 void dmtimer_wait(int reg);
 void dmtimer_cpu_initclocks(void);
 void dmtimer_delay(u_int);
@@ -117,6 +117,14 @@ static struct timecounter dmtimer_timeco
.tc_priv = NULL,
 };
 
+void dmtimer_rearm(void *, uint64_t);
+void dmtimer_trigger(void *);
+
+struct intrclock dmtimer_intrclock = {
+   .ic_rearm = dmtimer_rearm,
+   .ic_trigger = dmtimer_trigger
+};
+
 bus_space_handle_t dmtimer_ioh0;
 int dmtimer_irq = 0;
 
@@ -126,13 +134,8 @@ struct dmtimer_softc {
bus_space_handle_t  sc_ioh[MAX_TIMERS];
u_int32_t   sc_irq;
u_int32_t   sc_ticks_per_second;
-   u_int32_t   sc_ticks_per_intr;
-   u_int32_t   sc_ticks_err_cnt;
-   u_int32_t   sc_ticks_err_sum;
-   u_int32_t   sc_statvar;
-   u_int32_t   sc_statmin;
-   u_int32_t   sc_nexttickevent;
-   u_int32_t   sc_nextstatevent;
+   u_int64_t   sc_nsec_cycle_ratio;
+   u_int64_t   sc_nsec_max;
 };
 
 const struct cfattach  dmtimer_ca = {
@@ -208,82 +211,11 @@ dmtimer_attach(struct device *parent, st
printf(" rev %d.%d\n", (rev & DM_TIDR_MAJOR) >> 8, rev & DM_TIDR_MINOR);
 }
 
-/*
- * See comment in arm/xscale/i80321_clock.c
- *
- * Counter is count up, but with autoreload timers it is not possible
- * to detect how many interrupts passed while interrupts were blocked.
- * Also it is not possible to atomically add to the register.
- *
- * To work around this two timers are used, one is used as a reference
- * clock without reload, however we just disable the interrupt it
- * could generate.
- *
- * Internally this keeps track of when the next timer should fire
- * and based on that time and the current value of the reference
- * clock a number is written into the timer count register to schedule
- * the next event.
- */
-
 int
 dmtimer_intr(void *frame)
 {
-   struct dmtimer_softc*sc = dmtimer_cd.cd_devs[1];
-   u_int32_t   now, r, nextevent;
-   int32_t duration;
-
-   now = bus_space_read_4(sc->sc_iot, sc->sc_ioh[1], DM_TCRR);
-
-   while ((int32_t) (sc->sc_nexttickevent - now) <= 0) {
-   

Re: audioctl: display variables periodically

2022-12-09 Thread Edd Barrett
On Fri, Dec 09, 2022 at 12:10:59PM +0100, Alexandre Ratchov wrote:
> -Display the number of bytes of silence inserted during play buffer
> -underruns since device started:
> +Once per second, display the number of bytes of silence inserted
> +during play buffer underruns since device started:

Would it read better as:

"Once per-second, display the number of bytes of silence inserted due to buffer
underruns (since the device started playback):"

And don't forget to update the usage message too :)

-- 
Best Regards
Edd Barrett

https://www.theunixzoo.co.uk



amptimer(4): switch to clockintr

2022-12-09 Thread Scott Cheloha
Next up for the armv7 clockintr switch: amptimer(4).

- Remove amptimer-specific clock interrupt scheduling bits and
  randomized statclock bits.
- Remove debug evcounts.  The interrupt's evcount counts all clock
  interrupts from now on.
- Remove unused USE_GTIMER_CMP pieces.
- Wire up amptimer_intrclock.

jca:You have a cubox with this device.  Does this compile?
If so, does it boot?

Index: sys/arch/arm/include/cpu.h
===
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.61
diff -u -p -r1.61 cpu.h
--- sys/arch/arm/include/cpu.h  6 Jul 2021 09:34:06 -   1.61
+++ sys/arch/arm/include/cpu.h  9 Dec 2022 15:58:22 -
@@ -149,6 +149,7 @@ voidarm32_vector_init(vaddr_t, int);
  * Per-CPU information.  For now we assume one CPU.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -198,7 +199,7 @@ struct cpu_info {
 #ifdef GPROF
struct gmonparam *ci_gmon;
 #endif
-
+   struct clockintr_queue  ci_queue;
charci_panicbuf[512];
 };
 
Index: sys/arch/arm/include/_types.h
===
RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
retrieving revision 1.19
diff -u -p -r1.19 _types.h
--- sys/arch/arm/include/_types.h   5 Mar 2018 01:15:25 -   1.19
+++ sys/arch/arm/include/_types.h   9 Dec 2022 15:58:22 -
@@ -35,6 +35,8 @@
 #ifndef _ARM__TYPES_H_
 #define _ARM__TYPES_H_
 
+#define__HAVE_CLOCKINTR
+
 #if defined(_KERNEL)
 typedef struct label_t {
long val[11];
Index: sys/arch/arm/cortex/amptimer.c
===
RCS file: /cvs/src/sys/arch/arm/cortex/amptimer.c,v
retrieving revision 1.14
diff -u -p -r1.14 amptimer.c
--- sys/arch/arm/cortex/amptimer.c  12 Mar 2022 14:40:41 -  1.14
+++ sys/arch/arm/cortex/amptimer.c  9 Dec 2022 15:58:22 -
@@ -17,8 +17,10 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -74,32 +76,25 @@ static struct timecounter amptimer_timec
.tc_user = 0,
 };
 
-#define MAX_ARM_CPUS   8
+void amptimer_rearm(void *, uint64_t);
+void amptimer_trigger(void *);
 
-struct amptimer_pcpu_softc {
-   uint64_tpc_nexttickevent;
-   uint64_tpc_nextstatevent;
-   u_int32_t   pc_ticks_err_sum;
+struct intrclock amptimer_intrclock = {
+   .ic_rearm = amptimer_rearm,
+   .ic_trigger = amptimer_trigger
 };
 
+#define MAX_ARM_CPUS   8
+
 struct amptimer_softc {
struct device   sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t  sc_ioh;
bus_space_handle_t  sc_pioh;
 
-   struct amptimer_pcpu_softc sc_pstat[MAX_ARM_CPUS];
-
-   u_int32_t   sc_ticks_err_cnt;
u_int32_t   sc_ticks_per_second;
-   u_int32_t   sc_ticks_per_intr;
-   u_int32_t   sc_statvar;
-   u_int32_t   sc_statmin;
-
-#ifdef AMPTIMER_DEBUG
-   struct evcount  sc_clk_count;
-   struct evcount  sc_stat_count;
-#endif
+   u_int64_t   sc_nsec_cycle_ratio;
+   u_int64_t   sc_nsec_max;
 };
 
 intamptimer_match(struct device *, void *, void *);
@@ -173,6 +168,9 @@ amptimer_attach(struct device *parent, s
panic("amptimer_attach: bus_space_map priv timer failed!");
 
sc->sc_ticks_per_second = amptimer_frequency;
+   sc->sc_nsec_cycle_ratio =
+   sc->sc_ticks_per_second * (1ULL << 32) / 10;
+   sc->sc_nsec_max = UINT64_MAX / sc->sc_nsec_cycle_ratio;
printf(": %d kHz\n", sc->sc_ticks_per_second / 1000);
 
sc->sc_ioh = ioh;
@@ -188,21 +186,10 @@ amptimer_attach(struct device *parent, s
/* enable global timer */
bus_space_write_4(sc->sc_iot, ioh, GTIMER_CTRL, GTIMER_CTRL_TIMER);
 
-#if defined(USE_GTIMER_CMP)
-
-   /* clear event */
-   bus_space_write_4(sc->sc_iot, sc->sc_ioh, GTIMER_STATUS, 1);
-#else
+   /* Disable private timer, clear event flag. */
bus_space_write_4(sc->sc_iot, sc->sc_pioh, PTIMER_CTRL, 0);
bus_space_write_4(sc->sc_iot, sc->sc_pioh, PTIMER_STATUS,
PTIMER_STATUS_EVENT);
-#endif
-
-
-#ifdef AMPTIMER_DEBUG
-   evcount_attach(>sc_clk_count, "clock", NULL);
-   evcount_attach(>sc_stat_count, "stat", NULL);
-#endif
 
/*
 * private timer and interrupts not enabled until
@@ -214,8 +201,9 @@ amptimer_attach(struct device *parent, s
 
amptimer_timecounter.tc_frequency = sc->sc_ticks_per_second;
amptimer_timecounter.tc_priv = sc;
-
tc_init(_timecounter);
+
+   amptimer_intrclock.ic_cookie = sc;
 }
 
 u_int
@@ -225,102 +213,49 @@ amptimer_get_timecount(struct timecounte
return bus_space_read_4(sc->sc_iot, sc->sc_ioh, GTIMER_CNT_LOW);
 }
 
-int

Re: agtimer(4/armv7): switch to clockintr

2022-12-09 Thread Scott Cheloha
On Thu, Dec 08, 2022 at 11:35:34AM +0100, Jeremie Courreges-Anglas wrote:
> On Wed, Dec 07 2022, Scott Cheloha  wrote:
> > ARMv7 has four interrupt clocks available.  I think it'll be easier to
> > review/test if we do the clockintr switch driver by driver instead of
> > all at once in a massive single email.  When all four driver patches
> > are confirmed to work, I'll commit them.
> >
> > Here's a patch to switch agtimer(4/armv7) to clockintr.
> >
> > - Remove agtimer-specific clock interrupt scheduling bits
> >   and randomized statclock bits.
> >
> > - Wire up agtimer_intrclock.
> >
> > I am looking for a tester to help me get it compiling,
> 
> Fails to build because of a signature mismatch for agtimer_trigger(),
> updated diff below.
> 
> > and then run it
> > through a kernel-release-upgrade cycle.
> 
> That's not what you're asking for, but no regression spotted on a cubox
> machine - which seems to use amptimer(4) according to dmesg.

Thanks miod@/jca@!

So right now are looking for a tester for the attached patch, which
*does* compile.

An armv7 machine with agtimer(4/armv7).

Index: sys/arch/arm/include/cpu.h
===
RCS file: /cvs/src/sys/arch/arm/include/cpu.h,v
retrieving revision 1.61
diff -u -p -r1.61 cpu.h
--- sys/arch/arm/include/cpu.h  6 Jul 2021 09:34:06 -   1.61
+++ sys/arch/arm/include/cpu.h  9 Dec 2022 15:35:11 -
@@ -149,6 +149,7 @@ voidarm32_vector_init(vaddr_t, int);
  * Per-CPU information.  For now we assume one CPU.
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -198,7 +199,7 @@ struct cpu_info {
 #ifdef GPROF
struct gmonparam *ci_gmon;
 #endif
-
+   struct clockintr_queue  ci_queue;
charci_panicbuf[512];
 };
 
Index: sys/arch/arm/include/_types.h
===
RCS file: /cvs/src/sys/arch/arm/include/_types.h,v
retrieving revision 1.19
diff -u -p -r1.19 _types.h
--- sys/arch/arm/include/_types.h   5 Mar 2018 01:15:25 -   1.19
+++ sys/arch/arm/include/_types.h   9 Dec 2022 15:35:11 -
@@ -35,6 +35,8 @@
 #ifndef _ARM__TYPES_H_
 #define _ARM__TYPES_H_
 
+#define__HAVE_CLOCKINTR
+
 #if defined(_KERNEL)
 typedef struct label_t {
long val[11];
Index: sys/arch/arm/cortex/agtimer.c
===
RCS file: /cvs/src/sys/arch/arm/cortex/agtimer.c,v
retrieving revision 1.15
diff -u -p -r1.15 agtimer.c
--- sys/arch/arm/cortex/agtimer.c   12 Mar 2022 14:40:41 -  1.15
+++ sys/arch/arm/cortex/agtimer.c   9 Dec 2022 15:35:11 -
@@ -18,8 +18,10 @@
 
 #include 
 #include 
+#include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -51,28 +53,12 @@ static struct timecounter agtimer_timeco
.tc_priv = NULL,
 };
 
-struct agtimer_pcpu_softc {
-   uint64_tpc_nexttickevent;
-   uint64_tpc_nextstatevent;
-   u_int32_t   pc_ticks_err_sum;
-};
-
 struct agtimer_softc {
struct device   sc_dev;
int sc_node;
-
-   struct agtimer_pcpu_softc sc_pstat[MAXCPUS];
-
-   u_int32_t   sc_ticks_err_cnt;
u_int32_t   sc_ticks_per_second;
-   u_int32_t   sc_ticks_per_intr;
-   u_int32_t   sc_statvar;
-   u_int32_t   sc_statmin;
-
-#ifdef AMPTIMER_DEBUG
-   struct evcount  sc_clk_count;
-   struct evcount  sc_stat_count;
-#endif
+   uint64_tsc_nsec_cycle_ratio;
+   uint64_tsc_nsec_max;
 };
 
 intagtimer_match(struct device *, void *, void *);
@@ -93,6 +79,14 @@ struct cfdriver agtimer_cd = {
NULL, "agtimer", DV_DULL
 };
 
+void agtimer_rearm(void *, uint64_t);
+void agtimer_trigger(void *);
+
+struct intrclock agtimer_intrclock = {
+   .ic_rearm = agtimer_rearm,
+   .ic_trigger = agtimer_trigger
+};
+
 uint64_t
 agtimer_readcnt64(void)
 {
@@ -155,16 +149,13 @@ agtimer_attach(struct device *parent, st
agtimer_frequency =
OF_getpropint(sc->sc_node, "clock-frequency", agtimer_frequency);
sc->sc_ticks_per_second = agtimer_frequency;
-
+   sc->sc_nsec_cycle_ratio =
+   sc->sc_ticks_per_second * (1ULL << 32) / 10;
+   sc->sc_nsec_max = UINT64_MAX / sc->sc_nsec_cycle_ratio;
printf(": %d kHz\n", sc->sc_ticks_per_second / 1000);
 
/* XXX: disable user access */
 
-#ifdef AMPTIMER_DEBUG
-   evcount_attach(>sc_clk_count, "clock", NULL);
-   evcount_attach(>sc_stat_count, "stat", NULL);
-#endif
-
/*
 * private timer and interrupts not enabled until
 * timer configures
@@ -175,8 +166,9 @@ agtimer_attach(struct device *parent, st
 
agtimer_timecounter.tc_frequency = sc->sc_ticks_per_second;
agtimer_timecounter.tc_priv = sc;
-

asr: increase MAXTOKEN to 128 and documentation

2022-12-09 Thread Alvar Penning
Hi everyone,

When recently working on a project involving lots of aliases per line
in the /etc/hosts file, I occurred a bug that only the first ten names
per line were resolvable.

The origin is found in libc's asr MAXTOKEN constant, which had a rather
small value of 10. To my knowledge it is used only in
getaddrinfo_async.c and gethostnamadr_async.c for /etc/hosts entries.

A small patch, which I was able to test successfully, increments this
value to 128 and documents the behavior. Happy to receive feedback.

Best,
Alvar

diff --git lib/libc/asr/asr_private.h lib/libc/asr/asr_private.h
index 64f044f12d1..442d569b44b 100644
--- lib/libc/asr/asr_private.h
+++ lib/libc/asr/asr_private.h
@@ -257,7 +257,7 @@ struct asr_query {
}sa;
int  flags;
} ni;
-#define MAXTOKEN 10
+#define MAXTOKEN 128
} as;
 
 };
diff --git lib/libc/net/gethostbyname.3 lib/libc/net/gethostbyname.3
index 06170c3c1a7..35c6ac53863 100644
--- lib/libc/net/gethostbyname.3
+++ lib/libc/net/gethostbyname.3
@@ -269,3 +269,12 @@ YP does not support any address families other than
 .Dv AF_INET
 and uses
 the traditional database format.
+.Pp
+Only up to
+.Dv MAXTOKEN
+host or network names and aliases per line
+will be read from the
+.Pa /etc/hosts
+file
+.Pq currently 128 .
+Later names will be ignored.
diff --git share/man/man5/hosts.5 share/man/man5/hosts.5
index 8b3b7b699a8..4fad521f2c6 100644
--- share/man/man5/hosts.5
+++ share/man/man5/hosts.5
@@ -113,3 +113,9 @@ are limited to
 characters
 .Pq currently 1024 .
 Longer lines will be ignored.
+.Pp
+There might be up to
+.Dv MAXTOKEN
+host or network names and aliases per line
+.Pq currently 128 .
+Later names will be ignored.



bgpctl switch ometric to timespec

2022-12-09 Thread Claudio Jeker
cheloha@ switched the bgpctl code to use struct timespec and a monotonic
clock. Adjust the ometric code to use a timespec internally so that there
is no need to convert from timespec to timeval.

-- 
:wq Claudio

Index: ometric.c
===
RCS file: /cvs/src/usr.sbin/bgpctl/ometric.c,v
retrieving revision 1.7
diff -u -p -r1.7 ometric.c
--- ometric.c   6 Dec 2022 17:38:41 -   1.7
+++ ometric.c   9 Dec 2022 11:52:29 -
@@ -43,7 +43,7 @@ struct olabels {
 enum ovalue_type {
OVT_INTEGER,
OVT_DOUBLE,
-   OVT_TIMEVAL,
+   OVT_TIMESPEC,
 };
 
 struct ovalue {
@@ -52,7 +52,7 @@ struct ovalue {
union {
unsigned long long  i;
double  f;
-   struct timeval  tv;
+   struct timespec ts;
}value;
enum ovalue_type valtype;
 };
@@ -316,9 +316,9 @@ ometric_output_value(FILE *out, const st
return fprintf(out, "%llu", ov->value.i);
case OVT_DOUBLE:
return fprintf(out, "%g", ov->value.f);
-   case OVT_TIMEVAL:
-   return fprintf(out, "%lld.%06ld",
-   (long long)ov->value.tv.tv_sec, (long)ov->value.tv.tv_usec);
+   case OVT_TIMESPEC:
+   return fprintf(out, "%lld.%09ld",
+   (long long)ov->value.ts.tv_sec, ov->value.ts.tv_nsec);
}
return -1;
 }
@@ -430,10 +430,10 @@ ometric_set_float(struct ometric *om, do
 }
 
 /*
- * Set an timeval value with label ol. ol can be NULL.
+ * Set an timespec value with label ol. ol can be NULL.
  */
 void
-ometric_set_timeval(struct ometric *om, const struct timeval *tv,
+ometric_set_timespec(struct ometric *om, const struct timespec *ts,
 struct olabels *ol)
 {
struct ovalue *ov;
@@ -444,8 +444,8 @@ ometric_set_timeval(struct ometric *om, 
if ((ov = malloc(sizeof(*ov))) == NULL)
err(1, NULL);
 
-   ov->value.tv = *tv;
-   ov->valtype = OVT_TIMEVAL;
+   ov->value.ts = *ts;
+   ov->valtype = OVT_TIMESPEC;
ov->labels = olabels_ref(ol);
 
STAILQ_INSERT_TAIL(>vals, ov, entry);
@@ -512,12 +512,12 @@ ometric_set_int_with_labels(struct ometr
 }
 
 void
-ometric_set_timeval_with_labels(struct ometric *om, struct timeval *tv,
+ometric_set_timespec_with_labels(struct ometric *om, struct timespec *ts,
 const char **keys, const char **values, struct olabels *ol)
 {
struct olabels *extra;
 
extra = olabels_add_extras(ol, keys, values);
-   ometric_set_timeval(om, tv, extra);
+   ometric_set_timespec(om, ts, extra);
olabels_free(extra);
 }
Index: ometric.h
===
RCS file: /cvs/src/usr.sbin/bgpctl/ometric.h,v
retrieving revision 1.4
diff -u -p -r1.4 ometric.h
--- ometric.h   6 Dec 2022 11:27:58 -   1.4
+++ ometric.h   9 Dec 2022 11:49:11 -
@@ -41,13 +41,13 @@ int  ometric_output_all(FILE *);
 /* functions to set gauge and counter metrics */
 void   ometric_set_int(struct ometric *, uint64_t, struct olabels *);
 void   ometric_set_float(struct ometric *, double, struct olabels *);
-void   ometric_set_timeval(struct ometric *, const struct timeval *,
+void   ometric_set_timespec(struct ometric *, const struct timespec *,
struct olabels *);
 void   ometric_set_info(struct ometric *, const char **, const char **,
struct olabels *); 
 void   ometric_set_state(struct ometric *, const char *, struct olabels *); 
 void   ometric_set_int_with_labels(struct ometric *, uint64_t, const char **,
const char **, struct olabels *);
-void   ometric_set_timeval_with_labels(struct ometric *, struct timeval *,
+void   ometric_set_timespec_with_labels(struct ometric *, struct timespec *,
const char **, const char **, struct olabels *);
 #define OKV(...)   (const char *[]){ __VA_ARGS__, NULL }
Index: output_ometric.c
===
RCS file: /cvs/src/usr.sbin/bgpctl/output_ometric.c,v
retrieving revision 1.9
diff -u -p -r1.9 output_ometric.c
--- output_ometric.c8 Dec 2022 17:24:39 -   1.9
+++ output_ometric.c9 Dec 2022 11:51:10 -
@@ -322,13 +322,11 @@ static void
 ometric_tail(void)
 {
struct timespec elapsed_time;
-   struct timeval tv;
 
clock_gettime(CLOCK_MONOTONIC, _time);
timespecsub(_time, _time, _time);
-   TIMESPEC_TO_TIMEVAL(, _time);
 
-   ometric_set_timeval(bgpd_scrape_time, , NULL);
+   ometric_set_timespec(bgpd_scrape_time, _time, NULL);
ometric_output_all(stdout);
 
ometric_free_all();



audioctl: display variables periodically

2022-12-09 Thread Alexandre Ratchov
This diff adds an option to display variables periodically. Basically
it replaces this usage:

while sleep 1; do audioctl play.errors; done

by

audioctl -w 1 play.errors

The purpose of above audioctl commands is to debug underruns, so we
don't want to fork a new process and reopen the device. This would
trigger longer kernel code-paths and may cause additional underruns
than the ones being investigated.

OK?

Index: audioctl.8
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.8,v
retrieving revision 1.4
diff -u -p -r1.4 audioctl.8
--- audioctl.8  23 Apr 2020 00:16:59 -  1.4
+++ audioctl.8  9 Dec 2022 10:57:05 -
@@ -37,6 +37,7 @@
 .Op Fl f Ar file
 .Nm audioctl
 .Op Fl n
+.Op Fl w wait
 .Op Fl f Ar file
 .Ar name ...
 .Nm audioctl
@@ -59,6 +60,12 @@ The default is
 Suppress printing of the variable name.
 .It Fl q
 Suppress all output when setting a variable.
+.It Fl w Ar wait
+Pause
+.Ar wait
+seconds between each display.
+.Nm
+will display variables until it is interrupted.
 .It Ar name Ns = Ns Ar value
 Attempt to set the specified variable
 .Ar name
@@ -130,10 +137,10 @@ audio control devices
 audio devices
 .El
 .Sh EXAMPLES
-Display the number of bytes of silence inserted during play buffer
-underruns since device started:
+Once per second, display the number of bytes of silence inserted
+during play buffer underruns since device started:
 .Bd -literal -offset indent
-# audioctl play.errors
+# audioctl -w 1 play.errors
 .Ed
 .Pp
 Use signed 24-bit samples and 44100Hz sample rate:
Index: audioctl.c
===
RCS file: /cvs/src/usr.bin/audioctl/audioctl.c,v
retrieving revision 1.43
diff -u -p -r1.43 audioctl.c
--- audioctl.c  12 Jul 2021 15:09:19 -  1.43
+++ audioctl.c  9 Dec 2022 10:57:05 -
@@ -43,6 +43,7 @@ struct field {
 #define STR2
 #define ENC3
int type;
+   int show;
int set;
 } fields[] = {
{"name",,NULL,   STR},
@@ -67,7 +68,7 @@ const char usagestr[] =
"   audioctl [-n] [-f file] name ...\n"
"   audioctl [-nq] [-f file] name=value ...\n";
 
-int fd, show_names = 1, quiet = 0;
+int fd, show_names = 1, quiet = 0, period = 0;
 
 /*
  * parse encoding string (examples: s8, u8, s16, s16le, s24be ...)
@@ -198,20 +199,9 @@ audio_main(int argc, char **argv)
char *lhs, *rhs;
int set = 0;
 
-   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
-   err(1, "AUDIO_GETSTATUS");
-   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
-   err(1, "AUDIO_GETDEV");
-   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
-   err(1, "AUDIO_GETPAR");
-   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
-   err(1, "AUDIO_GETPOS");
if (argc == 0) {
-   for (f = fields; f->name != NULL; f++) {
-   printf("%s=", f->name);
-   print_field(f, f->raddr);
-   printf("\n");
-   }
+   for (f = fields; f->name != NULL; f++)
+   f->show = 1;
}
AUDIO_INITPAR();
for (; argc > 0; argc--, argv++) {
@@ -231,15 +221,38 @@ audio_main(int argc, char **argv)
parse_field(f, f->waddr, rhs);
f->set = 1;
set = 1;
-   } else {
+   } else
+   f->show = 1;
+   }
+
+   if (set && period)
+   errx(1, "Can't set variables periodically");
+
+   while (1) {
+   if (ioctl(fd, AUDIO_GETSTATUS, ) == -1)
+   err(1, "AUDIO_GETSTATUS");
+   if (ioctl(fd, AUDIO_GETDEV, ) == -1)
+   err(1, "AUDIO_GETDEV");
+   if (ioctl(fd, AUDIO_GETPAR, ) == -1)
+   err(1, "AUDIO_GETPAR");
+   if (ioctl(fd, AUDIO_GETPOS, ) == -1)
+   err(1, "AUDIO_GETPOS");
+   for (f = fields; f->name != NULL; f++) {
+   if (!f->show)
+   continue;
if (show_names)
printf("%s=", f->name);
print_field(f, f->raddr);
printf("\n");
}
+   if (period == 0)
+   break;
+   sleep(period);
}
+
if (!set)
return;
+
if (ioctl(fd, AUDIO_SETPAR, ) == -1)
err(1, "AUDIO_SETPAR");
if (ioctl(fd, AUDIO_GETPAR, ) == -1)
@@ -261,9 +274,10 @@ int
 main(int argc, char **argv)
 {
char *path = "/dev/audioctl0";
+   const char *errstr;
int c;
 
-   while ((c = getopt(argc, argv, "anf:q")) != -1) {
+   while ((c = getopt(argc, argv, "anf:qw:")) != -1) {
switch (c) {
case 'a':