Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-10-07 Thread Jordan Hargrave
Ok updated the new changes.

On Mon, Oct 05, 2020 at 09:54:02PM +0200, Mark Kettenis wrote:
> > Date: Thu, 17 Sep 2020 20:54:51 -0500
> > From: Jordan Hargrave 
> > Cc: ma...@peereboom.org, kette...@openbsd.org, tech@openbsd.org,
> > d...@openbsd.org, j...@openbsd.org
> > Content-Type: text/plain; charset=us-ascii
> > Content-Disposition: inline
> > 
> > Ok made more changes
> > 
> > > 
> > > Should be handled by that activate function as well.
> > >
> 
> So there are quite a few style issues.  I can point them out to you,
> or I could fix them after this is committed, which is probably more
> efficient.
> 
> Also, there seems to be lot of debug code left in here that should be
> removed or at least hidden before this gets committed.
> 
> > 
> > diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
> > index 1d6397391..a69c72c26 100644
> > --- a/sys/arch/amd64/conf/GENERIC
> > +++ b/sys/arch/amd64/conf/GENERIC
> > @@ -45,6 +45,7 @@ acpibtn*  at acpi?
> >  acpicpu*   at acpi?
> >  acpicmos*  at acpi?
> >  acpidock*  at acpi?
> > +acpidmar0  at acpi?
> >  acpiec*at acpi?
> >  acpipci*   at acpi?
> >  acpiprt*   at acpi?
> > diff --git a/sys/arch/amd64/include/pci_machdep.h 
> > b/sys/arch/amd64/include/pci_machdep.h
> > index bc295cc22..ea09f1abc 100644
> > --- a/sys/arch/amd64/include/pci_machdep.h
> > +++ b/sys/arch/amd64/include/pci_machdep.h
> > @@ -91,7 +91,12 @@ void 
> > *pci_intr_establish_cpu(pci_chipset_tag_t, pci_intr_handle_t,
> > int, struct cpu_info *,
> > int (*)(void *), void *, const char *);
> >  void   pci_intr_disestablish(pci_chipset_tag_t, void *);
> > +#if NACPIDMAR > 0
> > +intpci_probe_device_hook(pci_chipset_tag_t,
> > +   struct pci_attach_args *);
> > +#else
> >  #definepci_probe_device_hook(c, a) (0)
> > +#endif
> 
> This is probably a bad idea.  You don't include "acpidmar.h" in this
> file, and doing so is probaly undesireable.  But that means the
> definition of the hook function depends on whether the file that
> includes this does that or not.
> 
> Better just unconditionally provide the prototype and use a #if
> NACPIDMAR > 0 in the implementation.
>

Ok changed to that method

> > +#include "acpidmar.h"
> > +#include "amd_iommu.h"
> > +
> > +//#define IOMMU_DEBUG
> 
> No C++-style comments please.  Make this an #undef or use /* */.
> 
> > +
> > +#ifdef IOMMU_DEBUG
> > +#define dprintf(x...) printf(x)
> > +#else
> > +#define dprintf(x...)
> > +#endif
> > +
> > +#ifdef DDB
> > +intacpidmar_ddb = 0;
> > +#endif
> > +
> > +intintel_iommu_gfx_mapped = 0;
> 
> Unused variable.
> 
> > +intforce_cm = 1;
> 
> Rename to "acpidmar_force_cm"?
> 
> > +
> > +void showahci(void *);
> 
> Unused prototype.
> 
> > +
> > +/* Page Table Entry per domain */
> > +struct iommu_softc;
> > +
> > +static inline int
> > +mksid(int b, int d, int f)
> > +{
> > +   return (b << 8) + (d << 3) + f;
> > +}
> > +
> > +static inline int
> > +sid_devfn(int sid)
> > +{
> > +   return sid & 0xff;
> > +}
> > +
> > +static inline int
> > +sid_bus(int sid)
> > +{
> > +   return (sid >> 8) & 0xff;
> > +}
> > +
> > +static inline int
> > +sid_dev(int sid)
> > +{
> > +   return (sid >> 3) & 0x1f;
> > +}
> > +
> > +static inline int
> > +sid_fun(int sid)
> > +{
> > +   return (sid >> 0) & 0x7;
> > +}
> > +
> > +/* Alias mapping */
> > +#define SID_INVALID 0x8000L
> > +static uint32_t sid_flag[65536];
> > +
> > +struct domain_dev {
> > +   int sid;
> > +   int sec;
> > +   int sub;
> > +   TAILQ_ENTRY(domain_dev) link;
> > +};
> > +
> > +struct domain {
> > +   struct iommu_softc  *iommu;
> > +   int did;
> > +   int gaw;
> > +   struct pte_entry*pte;
> > +   paddr_t ptep;
> > +   struct bus_dma_tag  dmat;
> > +   int flag;
> > +
> > +   struct mutexexlck;
> > +   charexname[32];
> > +   struct 

Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-10-04 Thread Jordan Hargrave
Ping... still need more eyes on this

This is the IOMMU code for VT-d and AMD Vi implementation
It overrides the DMA Tag for each device and assigns it to a
protected domain

On Thu, Sep 17, 2020 at 08:54:51PM -0500, Jordan Hargrave wrote:
> Ok made more changes
> 
> On Mon, Sep 14, 2020 at 08:19:18PM +0200, Mark Kettenis wrote:
> > > Date: Tue, 8 Sep 2020 21:43:39 -0500
> > > From: Jordan Hargrave 
> > > 
> > > Made changes for the iommu_readq -> iommu_read_8 and also now
> > > dynamically allocate the hwdte for AMD IOMMU.
> > 
> > Some more bits...
> > 
> > > On Fri, Sep 04, 2020 at 09:17:18PM +0200, Mark Kettenis wrote:
> > > > > Date: Fri, 4 Sep 2020 00:50:44 -0500
> > > > > From: Jordan Hargrave 
> > > > 
> > > > A few hints below...
> > > > 
> > > > > > > +


> 
> diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
> index 1d6397391..a69c72c26 100644
> --- a/sys/arch/amd64/conf/GENERIC
> +++ b/sys/arch/amd64/conf/GENERIC
> @@ -45,6 +45,7 @@ acpibtn*at acpi?
>  acpicpu* at acpi?
>  acpicmos*at acpi?
>  acpidock*at acpi?
> +acpidmar0at acpi?
>  acpiec*  at acpi?
>  acpipci* at acpi?
>  acpiprt* at acpi?
> diff --git a/sys/arch/amd64/include/pci_machdep.h 
> b/sys/arch/amd64/include/pci_machdep.h
> index bc295cc22..ea09f1abc 100644
> --- a/sys/arch/amd64/include/pci_machdep.h
> +++ b/sys/arch/amd64/include/pci_machdep.h
> @@ -91,7 +91,12 @@ void   
> *pci_intr_establish_cpu(pci_chipset_tag_t, pci_intr_handle_t,
>   int, struct cpu_info *,
>   int (*)(void *), void *, const char *);
>  void pci_intr_disestablish(pci_chipset_tag_t, void *);
> +#if NACPIDMAR > 0
> +int  pci_probe_device_hook(pci_chipset_tag_t,
> + struct pci_attach_args *);
> +#else
>  #define  pci_probe_device_hook(c, a) (0)
> +#endif
>  
>  void pci_dev_postattach(struct device *, struct 
> pci_attach_args *);
>  
> diff --git a/sys/arch/amd64/pci/pci_machdep.c 
> b/sys/arch/amd64/pci/pci_machdep.c
> index cf4e835de..d590c3514 100644
> --- a/sys/arch/amd64/pci/pci_machdep.c
> +++ b/sys/arch/amd64/pci/pci_machdep.c
> @@ -89,6 +89,11 @@
>  #include 
>  #endif
>  
> +#include "acpi.h"
> +#if NACPIDMAR > 0
> +#include 
> +#endif
> +
>  /*
>   * Memory Mapped Configuration space access.
>   *
> @@ -797,7 +802,15 @@ pci_init_extents(void)
>   }
>  }
>  
> -#include "acpi.h"
> +#if NACPIDMAR > 0
> +int
> +pci_probe_device_hook(pci_chipset_tag_t pc, struct pci_attach_args *pa)
> +{
> + acpidmar_pci_hook(pc, pa);
> + return 0;
> +}
> +#endif
> +
>  #if NACPI > 0
>  void acpi_pci_match(struct device *, struct pci_attach_args *);
>  pcireg_t acpi_pci_min_powerstate(pci_chipset_tag_t, pcitag_t);
> diff --git a/sys/dev/acpi/acpidmar.c b/sys/dev/acpi/acpidmar.c
> new file mode 100644
> index 0..4519abc26
> --- /dev/null
> +++ b/sys/dev/acpi/acpidmar.c
> @@ -0,0 +1,3041 @@
> +/*
> + * Copyright (c) 2015 Jordan Hargrave 
> + *
> + * Permission to use, copy, modify, and distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "ioapic.h"
> +
> +#include "acpidmar.h"
> +#include "amd_iommu.h"
> +
> +//#define IOMMU_DEBUG
> +
> +#ifdef IOMMU_DEBUG
&

Re: PATCH: Add vmmpci device for passthrough PCI

2020-10-04 Thread Jordan Hargrave
Ping.  Can anyone review this?


From: Jordan Hargrave 
Sent: Tuesday, September 15, 2020 12:54 PM
To: tech@openbsd.org ; jor...@openbsd.org 
; kette...@openbsd.org 
Subject: PATCH: Add vmmpci device for passthrough PCI

This adds a placeholder vmmpci device that will be used for VMD passthrough PCI.

Normally the device will fail to attach unless the PCI domain:bus.dev.func has
been registered with vmmpci_add.  When the device is registered, it will detach
any existing PCI device and reload as vmmpci.  It also attaches an interrupt 
handler
and keeps a running counter of triggered interrupts. VMD will use the counter to
issue commands through to the guest.

diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 2c49f91a1..a69c72c26 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -108,6 +109,7 @@ ksmn*   at pci? # AMD K17 temperature 
sensor
 amas*   at pci? disable # AMD memory configuration
 pchtemp* at pci?# Intel C610 termperature sensor
 ccp*at pci? # AMD Cryptographic Co-processor
+vmmpci* at pci?# VMM Placeholder

 # National Semiconductor LM7[89] and compatible hardware monitors
 lm0 at isa? port 0x290
diff --git a/sys/arch/amd64/conf/files.amd64 b/sys/arch/amd64/conf/files.amd64
index 7a5d40bf4..74c7fe5a9 100644
--- a/sys/arch/amd64/conf/files.amd64
+++ b/sys/arch/amd64/conf/files.amd64
@@ -132,6 +132,10 @@ device pchb: pcibus, agpbus
 attach  pchb at pci
 filearch/amd64/pci/pchb.c   pchb

+device vmmpci
+attach vmmpci at pci
+file   arch/amd64/pci/vmmpci.c vmmpci
+
 # AMAS AMD memory address switch
 device  amas
 attach  amas at pci
diff --git a/sys/arch/amd64/include/vmmpci.h b/sys/arch/amd64/include/vmmpci.h
new file mode 100644
index 0..e012194df
--- /dev/null
+++ b/sys/arch/amd64/include/vmmpci.h
@@ -0,0 +1,24 @@
+/* $OpenBSD: vmmvar.h,v 1.70 2020/04/08 07:39:48 pd Exp $  */
+/*
+ * Copyright (c) 2020 Jordan Hargrave 
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+#ifndef _VMMPCI_H_
+#define _VMMPCI_H_
+
+int vmmpci_find(int, pcitag_t);
+int vmmpci_add(int, pcitag_t, int);
+int vmmpci_pending(int, pcitag_t, uint32_t *);
+
+#endif
diff --git a/sys/arch/amd64/pci/vmmpci.c b/sys/arch/amd64/pci/vmmpci.c
new file mode 100644
index 0..a99efb502
--- /dev/null
+++ b/sys/arch/amd64/pci/vmmpci.c
@@ -0,0 +1,186 @@
+/* $OpenBSD: pcib.c,v 1.6 2013/05/30 16:15:01 deraadt Exp $*/
+/* $NetBSD: pcib.c,v 1.6 1997/06/06 23:29:16 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1996 Jordan Hargrave
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+struct vmmpci_softc {
+   struct devicesc_dev;
+   void*sc_ih;
+
+   int sc_domain;
+   pci_chipset_tag_t   sc_pc;
+   pcitag_tsc_tag;
+
+   uint32_t pending;// pending interrupt 
count
+};
+
+#define VP_VALID   0x8000
+
+/* Keep track of registered devices */
+struct vmmpci_dev {
+   int vp_flags;
+   int vp_domain;
+   pcitag_tvp_tag;
+};
+
+intvmmpci_match(struct device *, void *, void *);
+void   vmmpci_attach(struct device *, struct device *, void *);
+void   vmmpci_callback(struct device *);
+intvmmpci_print(void *,

Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-09-17 Thread Jordan Hargrave
Ok made more changes

On Mon, Sep 14, 2020 at 08:19:18PM +0200, Mark Kettenis wrote:
> > Date: Tue, 8 Sep 2020 21:43:39 -0500
> > From: Jordan Hargrave 
> > 
> > Made changes for the iommu_readq -> iommu_read_8 and also now
> > dynamically allocate the hwdte for AMD IOMMU.
> 
> Some more bits...
> 
> > On Fri, Sep 04, 2020 at 09:17:18PM +0200, Mark Kettenis wrote:
> > > > Date: Fri, 4 Sep 2020 00:50:44 -0500
> > > > From: Jordan Hargrave 
> > > 
> > > A few hints below...
> > > 
> > > > > > +
> > > > > > +/* Page Table Entry per domain */
> > > > > > +static struct ivhd_dte hwdte[65536] __aligned(PAGE_SIZE);
> > > > > > +
> > > > > > +/* Alias mapping */
> > > > > > +#define SID_INVALID 0x8000L
> > > > > > +static uint32_t sid_flag[65536];
> > > > > 
> > > > > Can we avoid having these large arrays, or at least allocate them
> > > > > dynamically?  That would also avoid the explicit alignment which is
> > > > > somewhat nasty since it affects the entire kernel.
> > > > 
> > > > OK. But the hwdte does need the 2M area to be all contiguous but it is 
> > > > not
> > > > needed for DMAR/Intel.  You *can* have up to 8 different device table 
> > > > entries
> > > > though to split up the area.
> > > 
> > > The appropriate interface to use in this context is
> > > bus_dmamem_alloc(9).  You can specify alignment, and if you set nsegs
> > > to 1, you will get memory that is physicaly contiguous.
> > > 
> > > To map the memory into kernel address space you'll need create a map
> > > using bus_dmamap_create(9) and map it using bus_dmamem_map(9).  Then
> > > instead of using pmap_extract(9) you use bus_dmamap_load_raw(9) which
> > > then populates the physical addresses.
> > > 
> > > Many of the drivers written by dlg@ define convenience functions to do
> > > all these steps, although interestingly enough he tends to use
> > > bus_dmamap_load(9) instead of bus_dmamap_load_raw(9) which is
> > > sub-optimal.
> > > 
> > > > > > +
> > > > > > +struct domain_dev {
> > > > > > +   int sid;
> > > > > > +   int sec;
> > > > > > +   int sub;
> > > > > > +   TAILQ_ENTRY(domain_dev) link;
> > > > > > +};
> > > > > > +
> > > > > > +struct domain {
> > > > > > +   struct iommu_softc  *iommu;
> > > > > > +   int did;
> > > > > > +   int gaw;
> > > > > > +   struct pte_entry*pte;
> > > > > > +   paddr_t ptep;
> > > > > > +   struct bus_dma_tag  dmat;
> > > > > > +   int flag;
> > > > > > +
> > > > > > +   struct mutexexlck;
> > > > > > +   charexname[32];
> > > > > > +   struct extent   *iovamap;
> > > > > > +   TAILQ_HEAD(,domain_dev) devices;
> > > > > > +   TAILQ_ENTRY(domain) link;
> > > > > > +};
> > > > > > +
> > > > > > +#define DOM_DEBUG 0x1
> > > > > > +#define DOM_NOMAP 0x2
> > > > > > +
> > > > > > +struct dmar_devlist {
> > > > > > +   int type;
> > > > > > +   int bus;
> > > > > > +   int ndp;
> > > > > > +   struct acpidmar_devpath *dp;
> > > > > > +   TAILQ_ENTRY(dmar_devlist)   link;
> > > > > > +};
> > > > > > +
> > > > > > +TAILQ_HEAD(devlist_head, dmar_devlist);
> > > > > > +
> > > > > > +struct ivhd_devlist {
> > > > > > +   int start_id;
> > > > > > +   int end_id;
> > > > > > +   int cfg;
> > > > > > +   TAILQ_ENTRY(ivhd_devlist)   link;
> > > > > > +};
> > > > > > +
> > > > > > +struct rmrr_softc {
> > > > > > +   TAILQ_EN

Re: PATCH: Add vmmpci device for passthrough PCI

2020-09-17 Thread Jordan Hargrave
Ping. Any replies or commeents on this?

On Tue, Sep 15, 2020 at 12:54:49PM -0500, Jordan Hargrave wrote:
> This adds a placeholder vmmpci device that will be used for VMD passthrough 
> PCI.
> 
> Normally the device will fail to attach unless the PCI domain:bus.dev.func has
> been registered with vmmpci_add.  When the device is registered, it will 
> detach
> any existing PCI device and reload as vmmpci.  It also attaches an interrupt 
> handler
> and keeps a running counter of triggered interrupts. VMD will use the counter 
> to
> issue commands through to the guest.
> 
> diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
> index 2c49f91a1..a69c72c26 100644
> --- a/sys/arch/amd64/conf/GENERIC
> +++ b/sys/arch/amd64/conf/GENERIC
> @@ -108,6 +109,7 @@ ksmn* at pci? # AMD K17 temperature 
> sensor
>  amas*at pci? disable # AMD memory configuration
>  pchtemp* at pci? # Intel C610 termperature sensor
>  ccp* at pci? # AMD Cryptographic Co-processor
> +vmmpci* at pci?  # VMM Placeholder
>  
>  # National Semiconductor LM7[89] and compatible hardware monitors
>  lm0  at isa? port 0x290
> diff --git a/sys/arch/amd64/conf/files.amd64 b/sys/arch/amd64/conf/files.amd64
> index 7a5d40bf4..74c7fe5a9 100644
> --- a/sys/arch/amd64/conf/files.amd64
> +++ b/sys/arch/amd64/conf/files.amd64
> @@ -132,6 +132,10 @@ device   pchb: pcibus, agpbus
>  attach   pchb at pci
>  file arch/amd64/pci/pchb.c   pchb
>  
> +device vmmpci
> +attach vmmpci at pci
> +file   arch/amd64/pci/vmmpci.c   vmmpci
> +
>  # AMAS AMD memory address switch
>  device   amas
>  attach   amas at pci
> diff --git a/sys/arch/amd64/include/vmmpci.h b/sys/arch/amd64/include/vmmpci.h
> new file mode 100644
> index 0..e012194df
> --- /dev/null
> +++ b/sys/arch/amd64/include/vmmpci.h
> @@ -0,0 +1,24 @@
> +/*   $OpenBSD: vmmvar.h,v 1.70 2020/04/08 07:39:48 pd Exp $  */
> +/*
> + * Copyright (c) 2020 Jordan Hargrave 
> + *
> + * Permission to use, copy, modify, and distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +#ifndef _VMMPCI_H_
> +#define _VMMPCI_H_
> +
> +int vmmpci_find(int, pcitag_t);
> +int vmmpci_add(int, pcitag_t, int);
> +int vmmpci_pending(int, pcitag_t, uint32_t *);
> +
> +#endif
> diff --git a/sys/arch/amd64/pci/vmmpci.c b/sys/arch/amd64/pci/vmmpci.c
> new file mode 100644
> index 0..a99efb502
> --- /dev/null
> +++ b/sys/arch/amd64/pci/vmmpci.c
> @@ -0,0 +1,186 @@
> +/*   $OpenBSD: pcib.c,v 1.6 2013/05/30 16:15:01 deraadt Exp $*/
> +/*   $NetBSD: pcib.c,v 1.6 1997/06/06 23:29:16 thorpej Exp $ */
> +
> +/*-
> + * Copyright (c) 1996 Jordan Hargrave
> + *
> + * Permission to use, copy, modify, and distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +
> +#include 
> +
> +#include 
> +#include 
> +
> +struct vmmpci_softc {
> + struct device   sc_dev;
> + void*sc_ih;
> +
> + int sc_domain;
> + pci_chipset_tag_t   sc_pc;
> + pcitag_tsc_tag;
> +
> + uint32_tpending;// pending i

PATCH: Add vmmpci device for passthrough PCI

2020-09-15 Thread Jordan Hargrave
This adds a placeholder vmmpci device that will be used for VMD passthrough PCI.

Normally the device will fail to attach unless the PCI domain:bus.dev.func has
been registered with vmmpci_add.  When the device is registered, it will detach
any existing PCI device and reload as vmmpci.  It also attaches an interrupt 
handler
and keeps a running counter of triggered interrupts. VMD will use the counter to
issue commands through to the guest.

diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 2c49f91a1..a69c72c26 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -108,6 +109,7 @@ ksmn*   at pci? # AMD K17 temperature 
sensor
 amas*  at pci? disable # AMD memory configuration
 pchtemp* at pci?   # Intel C610 termperature sensor
 ccp*   at pci? # AMD Cryptographic Co-processor
+vmmpci* at pci?# VMM Placeholder
 
 # National Semiconductor LM7[89] and compatible hardware monitors
 lm0at isa? port 0x290
diff --git a/sys/arch/amd64/conf/files.amd64 b/sys/arch/amd64/conf/files.amd64
index 7a5d40bf4..74c7fe5a9 100644
--- a/sys/arch/amd64/conf/files.amd64
+++ b/sys/arch/amd64/conf/files.amd64
@@ -132,6 +132,10 @@ device pchb: pcibus, agpbus
 attach pchb at pci
 file   arch/amd64/pci/pchb.c   pchb
 
+device vmmpci
+attach vmmpci at pci
+file   arch/amd64/pci/vmmpci.c vmmpci
+
 # AMAS AMD memory address switch
 device amas
 attach amas at pci
diff --git a/sys/arch/amd64/include/vmmpci.h b/sys/arch/amd64/include/vmmpci.h
new file mode 100644
index 0..e012194df
--- /dev/null
+++ b/sys/arch/amd64/include/vmmpci.h
@@ -0,0 +1,24 @@
+/* $OpenBSD: vmmvar.h,v 1.70 2020/04/08 07:39:48 pd Exp $  */
+/*
+ * Copyright (c) 2020 Jordan Hargrave 
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+#ifndef _VMMPCI_H_
+#define _VMMPCI_H_
+
+int vmmpci_find(int, pcitag_t);
+int vmmpci_add(int, pcitag_t, int);
+int vmmpci_pending(int, pcitag_t, uint32_t *);
+
+#endif
diff --git a/sys/arch/amd64/pci/vmmpci.c b/sys/arch/amd64/pci/vmmpci.c
new file mode 100644
index 0..a99efb502
--- /dev/null
+++ b/sys/arch/amd64/pci/vmmpci.c
@@ -0,0 +1,186 @@
+/* $OpenBSD: pcib.c,v 1.6 2013/05/30 16:15:01 deraadt Exp $*/
+/* $NetBSD: pcib.c,v 1.6 1997/06/06 23:29:16 thorpej Exp $ */
+
+/*-
+ * Copyright (c) 1996 Jordan Hargrave
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+
+struct vmmpci_softc {
+   struct device   sc_dev;
+   void*sc_ih;
+
+   int sc_domain;
+   pci_chipset_tag_t   sc_pc;
+   pcitag_tsc_tag;
+
+   uint32_tpending;// pending interrupt 
count
+};
+
+#define VP_VALID   0x8000
+
+/* Keep track of registered devices */
+struct vmmpci_dev {
+   int vp_flags;
+   int vp_domain;
+   pcitag_tvp_tag;
+};
+
+intvmmpci_match(struct device *, void *, void *);
+void   vmmpci_attach(struct device *, struct device *, void *);
+void   vmmpci_callback(struct device *);
+intvmmpci_print(void *, const char *);
+intvmmpci_intr(void *arg);
+
+struct cfattach vmmpci_ca = {
+   sizeof(struct vmmpci_softc), vmmpci_match, vmmpci_attach
+};
+
+struct cfdriver vmmpci_cd = {
+   NULL, "vmmpci", DV_DULL
+};
+
+#define MAXVMMPCI 4
+
+struc

PATCH: Add ACPI IVHD_EXT structure to acpireg.h

2020-09-15 Thread Jordan Hargrave
This patch adds a couple of entries for AMD IOMMU structure definitions in ACPI

Index: acpireg.h
===
RCS file: /cvs/src/sys/dev/acpi/acpireg.h,v
retrieving revision 1.45
diff -u -p -r1.45 acpireg.h
--- acpireg.h   28 Aug 2019 22:39:09 -  1.45
+++ acpireg.h   15 Sep 2020 06:29:50 -
@@ -623,6 +623,9 @@ struct acpi_ivmd {
 struct acpi_ivhd {
uint8_t type;
uint8_t flags;
+#define IVHD_PPRSUP(1L << 7)
+#define IVHD_PREFSUP   (1L << 6)
+#define IVHD_COHERENT  (1L << 5)
 #define IVHD_IOTLB (1L << 4)
 #define IVHD_ISOC  (1L << 3)
 #define IVHD_RESPASSPW (1L << 2)
@@ -638,13 +641,28 @@ struct acpi_ivhd {
 #define IVHD_UNITID_MASK   0x1F
 #define IVHD_MSINUM_SHIFT  0
 #define IVHD_MSINUM_MASK   0x1F
-   uint32_treserved;
+   uint32_tfeature;
+} __packed;
+
+struct acpi_ivhd_ext {
+   uint8_t type;
+   uint8_t flags;
+   uint16_tlength;
+   uint16_tdevid;
+   uint16_tcap;
+   uint64_taddress;
+   uint16_tsegment;
+   uint16_tinfo;
+   uint32_tattrib;
+   uint64_tefr;
+   uint8_t reserved[8];
 } __packed;
 
 union acpi_ivrs_entry {
struct {
uint8_t type;
 #define IVRS_IVHD  0x10
+#define IVRS_IVHD_EXT  0x11
 #define IVRS_IVMD_ALL  0x20
 #define IVRS_IVMD_SPECIFIED0x21
 #define IVRS_IVMD_RANGE0x22
@@ -652,6 +670,7 @@ union acpi_ivrs_entry {
uint16_tlength;
} __packed;
struct acpi_ivhdivhd;
+   struct acpi_ivhd_extivhd_ext;
struct acpi_ivmdivmd;
 } __packed;
 



PATCH: Add cookie argument to pci_add_device/pci_add_bar for vmd, needed for PCI passthrough

2020-09-11 Thread Jordan Hargrave
This patch adds an extra size/cookie argument to pci_add_device and pci_add_bar.
Changes required for implementing passthrough PCI.

diff --git a/usr.sbin/vmd/pci.c b/usr.sbin/vmd/pci.c
index 954235eb6..47a133b9a 100644
--- a/usr.sbin/vmd/pci.c
+++ b/usr.sbin/vmd/pci.c
@@ -39,6 +39,26 @@ extern char *__progname;
 const uint8_t pci_pic_irqs[PCI_MAX_PIC_IRQS] = {3, 5, 6, 7, 9, 10, 11, 12,
 14, 15};
 
+/*
+ * pci_mkbar
+ *
+ * Calculates BAR address is valid
+ * Returns allocated address and updates next address
+ * Returns zero if address is out of range
+ */
+static uint64_t
+pci_mkbar(uint64_t *base, uint32_t size, uint64_t maxbase)
+{
+   uint64_t mask = size - 1;
+   uint64_t cbase;
+
+   if (*base + size >= maxbase)
+   return (0);
+   cbase = *base;
+   *base = (*base + size + mask) & ~mask;
+   return cbase;
+}
+
 /*
  * pci_add_bar
  *
@@ -58,9 +78,10 @@ const uint8_t pci_pic_irqs[PCI_MAX_PIC_IRQS] = {3, 5, 6, 7, 
9, 10, 11, 12,
  * Returns 0 if the BAR was added successfully, 1 otherwise.
  */
 int
-pci_add_bar(uint8_t id, uint32_t type, void *barfn, void *cookie)
+pci_add_bar(uint8_t id, uint32_t type, uint32_t size, void *barfn, void 
*cookie)
 {
uint8_t bar_reg_idx, bar_ct;
+   uint32_t base;
 
/* Check id */
if (id >= pci.pci_dev_ct)
@@ -74,34 +95,35 @@ pci_add_bar(uint8_t id, uint32_t type, void *barfn, void 
*cookie)
/* Compute BAR address and add */
bar_reg_idx = (PCI_MAPREG_START + (bar_ct * 4)) / 4;
if (type == PCI_MAPREG_TYPE_MEM) {
-   if (pci.pci_next_mmio_bar >= VMM_PCI_MMIO_BAR_END)
+   base = pci_mkbar(_next_mmio_bar, size, 
VMM_PCI_MMIO_BAR_END);
+   if (base == 0)
return (1);
 
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
-   PCI_MAPREG_MEM_ADDR(pci.pci_next_mmio_bar);
-   pci.pci_next_mmio_bar += VMM_PCI_MMIO_BAR_SIZE;
+   PCI_MAPREG_MEM_ADDR(base);
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_MMIO;
-   pci.pci_devices[id].pd_barsize[bar_ct] = VMM_PCI_MMIO_BAR_SIZE;
+   pci.pci_devices[id].pd_barsize[bar_ct] = size;
pci.pci_devices[id].pd_bar_ct++;
} else if (type == PCI_MAPREG_TYPE_IO) {
-   if (pci.pci_next_io_bar >= VMM_PCI_IO_BAR_END)
+   base = pci_mkbar(_next_io_bar, size, 
VMM_PCI_IO_BAR_END);
+   if (base == 0)
return (1);
 
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
-   PCI_MAPREG_IO_ADDR(pci.pci_next_io_bar) |
+   PCI_MAPREG_IO_ADDR(base) |
PCI_MAPREG_TYPE_IO;
-   pci.pci_next_io_bar += VMM_PCI_IO_BAR_SIZE;
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
-   DPRINTF("%s: adding pci bar cookie for dev %d bar %d = %p",
-   __progname, id, bar_ct, cookie);
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_IO;
-   pci.pci_devices[id].pd_barsize[bar_ct] = VMM_PCI_IO_BAR_SIZE;
+   pci.pci_devices[id].pd_barsize[bar_ct] = size;
pci.pci_devices[id].pd_bar_ct++;
}
 
+   log_info("%s: PCI_ADDBAR(%d, %d, %x, %x)", __progname,
+   bar_ct, type, pci.pci_devices[id].pd_cfg_space[bar_reg_idx], 
size);
+
return (0);
 }
 
@@ -165,8 +187,10 @@ pci_get_dev_irq(uint8_t id)
 int
 pci_add_device(uint8_t *id, uint16_t vid, uint16_t pid, uint8_t class,
 uint8_t subclass, uint16_t subsys_vid, uint16_t subsys_id,
-uint8_t irq_needed, pci_cs_fn_t csfunc)
+uint8_t irq_needed, pci_cs_fn_t csfunc, void *cookie)
 {
+   log_info("%s: add_pci: %x.%x.%x", __progname, vid, pid, class);
+
/* Exceeded max devices? */
if (pci.pci_dev_ct >= PCI_CONFIG_MAX_DEV)
return (1);
@@ -186,6 +210,7 @@ pci_add_device(uint8_t *id, uint16_t vid, uint16_t pid, 
uint8_t class,
pci.pci_devices[*id].pd_subsys_id = subsys_id;
 
pci.pci_devices[*id].pd_csfunc = csfunc;
+   pci.pci_devices[*id].pd_cookie = cookie;
 
if (irq_needed) {
pci.pci_devices[*id].pd_irq =
@@ -219,7 +244,7 @@ pci_init(void)
 
if (pci_add_device(, PCI_VENDOR_OPENBSD, PCI_PRODUCT_OPENBSD_PCHB,
PCI_CLASS_BRIDGE, PCI_SUBCLASS_BRIDGE_HOST,
-   PCI_VENDOR_OPENBSD, 0, 0, NULL)) {
+   PCI_VENDOR_OPENBSD, 0, 0, NULL, NULL)) {
log_warnx("%s: can't add PCI host bridge", __progname);
return;
}
@@ -264,6 +289,8 @@ pci_handle_io(struct vm_run_params *vrp)
 
for (i = 0 ; i < pci.pci_dev_ct ; i++) {
for (j = 0 ; j < 

Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-09-08 Thread Jordan Hargrave
Made changes for the iommu_readq -> iommu_read_8 and also now dynamically 
allocate
the hwdte for AMD IOMMU.

On Fri, Sep 04, 2020 at 09:17:18PM +0200, Mark Kettenis wrote:
> > Date: Fri, 4 Sep 2020 00:50:44 -0500
> > From: Jordan Hargrave 
> 
> A few hints below...
> 
> > > > +
> > > > +/* Page Table Entry per domain */
> > > > +static struct ivhd_dte hwdte[65536] __aligned(PAGE_SIZE);
> > > > +
> > > > +/* Alias mapping */
> > > > +#define SID_INVALID 0x8000L
> > > > +static uint32_t sid_flag[65536];
> > > 
> > > Can we avoid having these large arrays, or at least allocate them
> > > dynamically?  That would also avoid the explicit alignment which is
> > > somewhat nasty since it affects the entire kernel.
> > 
> > OK. But the hwdte does need the 2M area to be all contiguous but it is not
> > needed for DMAR/Intel.  You *can* have up to 8 different device table 
> > entries
> > though to split up the area.
> 
> The appropriate interface to use in this context is
> bus_dmamem_alloc(9).  You can specify alignment, and if you set nsegs
> to 1, you will get memory that is physicaly contiguous.
> 
> To map the memory into kernel address space you'll need create a map
> using bus_dmamap_create(9) and map it using bus_dmamem_map(9).  Then
> instead of using pmap_extract(9) you use bus_dmamap_load_raw(9) which
> then populates the physical addresses.
> 
> Many of the drivers written by dlg@ define convenience functions to do
> all these steps, although interestingly enough he tends to use
> bus_dmamap_load(9) instead of bus_dmamap_load_raw(9) which is
> sub-optimal.
> 
> > > > +
> > > > +struct domain_dev {
> > > > +   int sid;
> > > > +   int sec;
> > > > +   int sub;
> > > > +   TAILQ_ENTRY(domain_dev) link;
> > > > +};
> > > > +
> > > > +struct domain {
> > > > +   struct iommu_softc  *iommu;
> > > > +   int did;
> > > > +   int gaw;
> > > > +   struct pte_entry*pte;
> > > > +   paddr_t ptep;
> > > > +   struct bus_dma_tag  dmat;
> > > > +   int flag;
> > > > +
> > > > +   struct mutexexlck;
> > > > +   charexname[32];
> > > > +   struct extent   *iovamap;
> > > > +   TAILQ_HEAD(,domain_dev) devices;
> > > > +   TAILQ_ENTRY(domain) link;
> > > > +};
> > > > +
> > > > +#define DOM_DEBUG 0x1
> > > > +#define DOM_NOMAP 0x2
> > > > +
> > > > +struct dmar_devlist {
> > > > +   int type;
> > > > +   int bus;
> > > > +   int ndp;
> > > > +   struct acpidmar_devpath *dp;
> > > > +   TAILQ_ENTRY(dmar_devlist)   link;
> > > > +};
> > > > +
> > > > +TAILQ_HEAD(devlist_head, dmar_devlist);
> > > > +
> > > > +struct ivhd_devlist {
> > > > +   int start_id;
> > > > +   int end_id;
> > > > +   int cfg;
> > > > +   TAILQ_ENTRY(ivhd_devlist)   link;
> > > > +};
> > > > +
> > > > +struct rmrr_softc {
> > > > +   TAILQ_ENTRY(rmrr_softc) link;
> > > > +   struct devlist_head devices;
> > > > +   int segment;
> > > > +   uint64_tstart;
> > > > +   uint64_tend;
> > > > +};
> > > > +
> > > > +struct atsr_softc {
> > > > +   TAILQ_ENTRY(atsr_softc) link;
> > > > +   struct devlist_head devices;
> > > > +   int segment;
> > > > +   int flags;
> > > > +};
> > > > +
> > > > +struct iommu_pic {
> > > > +   struct pic  pic;
> > > > +   struct iommu_softc  *iommu;
> > > > +};
> > > > +
> > > > +#define IOMMU_FLAGS_CATCHALL   0x1
> > > > +#define IOMMU_FLAGS_BAD0x2
&

PATCH: Add helper vm_find_vcpu function to VMD

2020-09-08 Thread Jordan Hargrave
>From cba617464c71f4d4e4a34728f117ca92145f746f Mon Sep 17 00:00:00 2001
From: Jordan Hargrave 
Date: Tue, 18 Aug 2020 15:46:36 -0500
Subject: [PATCH 1/4] Add helper vm_find_vcpu function for VMM

---
 sys/arch/amd64/amd64/vmm.c | 63 --
 1 file changed, 33 insertions(+), 30 deletions(-)

diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c
index 84fcb23a5..f6d51737e 100644
--- a/sys/arch/amd64/amd64/vmm.c
+++ b/sys/arch/amd64/amd64/vmm.c
@@ -558,6 +558,34 @@ vmmclose(dev_t dev, int flag, int mode, struct proc *p)
return 0;
 }
 
+/*
+ * vm_find_vcpu
+ *
+ * Lookup VMM VCPU by ID number
+ *
+ * Parameters:
+ *  vm: vm structure
+ *  id: index id of vcpu
+ *
+ * Returns pointer to vcpu structure if successful, NULL otherwise
+ */
+static struct vcpu *
+vm_find_vcpu(struct vm *vm, uint32_t id)
+{
+   struct vcpu *vcpu;
+
+   if (vm == NULL)
+   return NULL;
+   rw_enter_read(>vm_vcpu_lock);
+   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
+   if (vcpu->vc_id == id)
+   break;
+   }
+   rw_exit_read(>vm_vcpu_lock);
+   return vcpu;
+}
+
+
 /*
  * vm_resetcpu
  *
@@ -591,12 +619,7 @@ vm_resetcpu(struct vm_resetcpu_params *vrp)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vrp->vrp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vrp->vrp_vcpu_id);
 
if (vcpu == NULL) {
DPRINTF("%s: vcpu id %u of vm %u not found\n", __func__,
@@ -657,12 +680,7 @@ vm_intr_pending(struct vm_intr_params *vip)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vip->vip_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vip->vip_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -722,12 +740,7 @@ vm_rwvmparams(struct vm_rwvmparams_params *vpp, int dir) {
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vpp->vpp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vpp->vpp_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -786,12 +799,7 @@ vm_rwregs(struct vm_rwregs_params *vrwp, int dir)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vrwp->vrwp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vrwp->vrwp_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -858,12 +866,7 @@ vm_mprotect_ept(struct vm_mprotect_ept_params *vmep)
return (ret);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vmep->vmep_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vmep->vmep_vcpu_id);
 
if (vcpu == NULL) {
DPRINTF("%s: vcpu id %u of vm %u not found\n", __func__,
-- 
2.26.2



Re: PATCH: Fix PCI Config Space union size on VMM

2020-09-07 Thread Jordan Hargrave
This code fixes the pci device union for accessing PCI config space >= 0x40

Running pcidump -xxx in a virtual machine would return garbage data due to 
union overlap

On Mon, Sep 07, 2020 at 05:52:55PM -0500, Jordan Hargrave wrote:
> Index: pci.h
> ===
> RCS file: /cvs/src/usr.sbin/vmd/pci.h,v
> retrieving revision 1.7
> diff -u -p -u -r1.7 pci.h
> --- pci.h 17 Sep 2017 23:07:56 -  1.7
> +++ pci.h 7 Sep 2020 22:48:09 -
> @@ -32,43 +32,44 @@ typedef int (*pci_iobar_fn_t)(int dir, u
>  void *, uint8_t);
>  typedef int (*pci_mmiobar_fn_t)(int dir, uint32_t ofs, uint32_t *data);
>  
> -union pci_dev {
> - uint32_t pd_cfg_space[PCI_CONFIG_SPACE_SIZE / 4];
>  
> - struct {
> - uint16_t pd_vid;
> - uint16_t pd_did;
> - uint16_t pd_cmd;
> - uint16_t pd_status;
> - uint8_t pd_rev;
> - uint8_t pd_prog_if;
> - uint8_t pd_subclass;
> - uint8_t pd_class;
> - uint8_t pd_cache_size;
> - uint8_t pd_lat_timer;
> - uint8_t pd_header_type;
> - uint8_t pd_bist;
> - uint32_t pd_bar[PCI_MAX_BARS];
> - uint32_t pd_cardbus_cis;
> - uint16_t pd_subsys_vid;
> - uint16_t pd_subsys_id;
> - uint32_t pd_exp_rom_addr;
> - uint8_t pd_cap;
> - uint32_t pd_reserved0 : 24;
> - uint32_t pd_reserved1;
> - uint8_t pd_irq;
> - uint8_t pd_int;
> - uint8_t pd_min_grant;
> - uint8_t pd_max_grant;
> +struct pci_dev {
> + union {
> + uint32_t pd_cfg_space[PCI_CONFIG_SPACE_SIZE / 4];
> + struct {
> + uint16_t pd_vid;
> + uint16_t pd_did;
> + uint16_t pd_cmd;
> + uint16_t pd_status;
> + uint8_t pd_rev;
> + uint8_t pd_prog_if;
> + uint8_t pd_subclass;
> + uint8_t pd_class;
> + uint8_t pd_cache_size;
> + uint8_t pd_lat_timer;
> + uint8_t pd_header_type;
> + uint8_t pd_bist;
> + uint32_t pd_bar[PCI_MAX_BARS];
> + uint32_t pd_cardbus_cis;
> + uint16_t pd_subsys_vid;
> + uint16_t pd_subsys_id;
> + uint32_t pd_exp_rom_addr;
> + uint8_t pd_cap;
> + uint32_t pd_reserved0 : 24;
> + uint32_t pd_reserved1;
> + uint8_t pd_irq;
> + uint8_t pd_int;
> + uint8_t pd_min_grant;
> + uint8_t pd_max_grant;
> + } __packed;
> + };
> + uint8_t pd_bar_ct;
> + pci_cs_fn_t pd_csfunc;
>  
> - uint8_t pd_bar_ct;
> - pci_cs_fn_t pd_csfunc;
> -
> - uint8_t pd_bartype[PCI_MAX_BARS];
> - uint32_t pd_barsize[PCI_MAX_BARS];
> - void *pd_barfunc[PCI_MAX_BARS];
> - void *pd_bar_cookie[PCI_MAX_BARS];
> - } __packed;
> + uint8_t pd_bartype[PCI_MAX_BARS];
> + uint32_t pd_barsize[PCI_MAX_BARS];
> + void *pd_barfunc[PCI_MAX_BARS];
> + void *pd_bar_cookie[PCI_MAX_BARS];
>  };
>  
>  struct pci {
> @@ -79,7 +80,7 @@ struct pci {
>   uint32_t pci_addr_reg;
>   uint32_t pci_data_reg;
>  
> - union pci_dev pci_devices[PCI_CONFIG_MAX_DEV];
> + struct pci_dev pci_devices[PCI_CONFIG_MAX_DEV];
>  };
>  
>  void pci_handle_address_reg(struct vm_run_params *);
> 



PATCH: Fix PCI Config Space union size on VMM

2020-09-07 Thread Jordan Hargrave
Index: pci.h
===
RCS file: /cvs/src/usr.sbin/vmd/pci.h,v
retrieving revision 1.7
diff -u -p -u -r1.7 pci.h
--- pci.h   17 Sep 2017 23:07:56 -  1.7
+++ pci.h   7 Sep 2020 22:48:09 -
@@ -32,43 +32,44 @@ typedef int (*pci_iobar_fn_t)(int dir, u
 void *, uint8_t);
 typedef int (*pci_mmiobar_fn_t)(int dir, uint32_t ofs, uint32_t *data);
 
-union pci_dev {
-   uint32_t pd_cfg_space[PCI_CONFIG_SPACE_SIZE / 4];
 
-   struct {
-   uint16_t pd_vid;
-   uint16_t pd_did;
-   uint16_t pd_cmd;
-   uint16_t pd_status;
-   uint8_t pd_rev;
-   uint8_t pd_prog_if;
-   uint8_t pd_subclass;
-   uint8_t pd_class;
-   uint8_t pd_cache_size;
-   uint8_t pd_lat_timer;
-   uint8_t pd_header_type;
-   uint8_t pd_bist;
-   uint32_t pd_bar[PCI_MAX_BARS];
-   uint32_t pd_cardbus_cis;
-   uint16_t pd_subsys_vid;
-   uint16_t pd_subsys_id;
-   uint32_t pd_exp_rom_addr;
-   uint8_t pd_cap;
-   uint32_t pd_reserved0 : 24;
-   uint32_t pd_reserved1;
-   uint8_t pd_irq;
-   uint8_t pd_int;
-   uint8_t pd_min_grant;
-   uint8_t pd_max_grant;
+struct pci_dev {
+   union {
+   uint32_t pd_cfg_space[PCI_CONFIG_SPACE_SIZE / 4];
+   struct {
+   uint16_t pd_vid;
+   uint16_t pd_did;
+   uint16_t pd_cmd;
+   uint16_t pd_status;
+   uint8_t pd_rev;
+   uint8_t pd_prog_if;
+   uint8_t pd_subclass;
+   uint8_t pd_class;
+   uint8_t pd_cache_size;
+   uint8_t pd_lat_timer;
+   uint8_t pd_header_type;
+   uint8_t pd_bist;
+   uint32_t pd_bar[PCI_MAX_BARS];
+   uint32_t pd_cardbus_cis;
+   uint16_t pd_subsys_vid;
+   uint16_t pd_subsys_id;
+   uint32_t pd_exp_rom_addr;
+   uint8_t pd_cap;
+   uint32_t pd_reserved0 : 24;
+   uint32_t pd_reserved1;
+   uint8_t pd_irq;
+   uint8_t pd_int;
+   uint8_t pd_min_grant;
+   uint8_t pd_max_grant;
+   } __packed;
+   };
+   uint8_t pd_bar_ct;
+   pci_cs_fn_t pd_csfunc;
 
-   uint8_t pd_bar_ct;
-   pci_cs_fn_t pd_csfunc;
-
-   uint8_t pd_bartype[PCI_MAX_BARS];
-   uint32_t pd_barsize[PCI_MAX_BARS];
-   void *pd_barfunc[PCI_MAX_BARS];
-   void *pd_bar_cookie[PCI_MAX_BARS];
-   } __packed;
+   uint8_t pd_bartype[PCI_MAX_BARS];
+   uint32_t pd_barsize[PCI_MAX_BARS];
+   void *pd_barfunc[PCI_MAX_BARS];
+   void *pd_bar_cookie[PCI_MAX_BARS];
 };
 
 struct pci {
@@ -79,7 +80,7 @@ struct pci {
uint32_t pci_addr_reg;
uint32_t pci_data_reg;
 
-   union pci_dev pci_devices[PCI_CONFIG_MAX_DEV];
+   struct pci_dev pci_devices[PCI_CONFIG_MAX_DEV];
 };
 
 void pci_handle_address_reg(struct vm_run_params *);



Re: [PATCH] Add common PCIE capability list

2020-09-07 Thread Jordan Hargrave


Attaching the full diff

On Mon, Sep 07, 2020 at 01:09:12PM -0500, Jordan Hargrave wrote:
> On Thu, Sep 03, 2020 at 08:37:56PM +0200, Mark Kettenis wrote:
> > > Date: Wed, 2 Sep 2020 15:19:55 +1000
> > > From: Jonathan Gray 
> > > 
> > > On Tue, Sep 01, 2020 at 11:44:03PM -0500, Jordan Hargrave wrote:
> > > > This patch adds a common function for scanning PCIE Express Capability 
> > > > list
> > > > The PCIE Capability list starts at 0x100 in extended PCI configuration 
> > > > space.
> > > 
> > > This seems to only handle extended capabilities?
> > > Something like pcie_get_ext_capability() would be a better name.
> > 
> > I think it should be pci_get_ext_capability() which follows the
> > pattern set by pci_get_ht_capability().
> > 
> > > 
> > > It is 'PCI Express' not 'PCIExpress'
> > > 
> > > 'ofs & 3' test doesn't make sense when PCI_PCIE_ECAP_NEXT() always
> > > masks those bits.
> > > 
> > > > 
> > > > ---
> > > >  sys/dev/pci/pci.c| 28 
> > > >  sys/dev/pci/pcivar.h |  2 ++
> > > >  2 files changed, 30 insertions(+)
> > > > 
> > > > diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
> > > > index bf75f875e..8f9a5ef7a 100644
> > > > --- a/sys/dev/pci/pci.c
> > > > +++ b/sys/dev/pci/pci.c
> > > > @@ -677,6 +677,34 @@ pci_get_ht_capability(pci_chipset_tag_t pc, 
> > > > pcitag_t tag, int capid,
> > > > return (0);
> > > >  }
> > > >  
> > > > +int
> > > > +pcie_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
> > > > +int *offset, pcireg_t *value)
> > > > +{
> > > > +   pcireg_t reg;
> > > > +   unsigned int ofs;
> > > > +
> > > > +   /* Make sure we support PCIExpress device */
> > 
> > PCI Express like jsg@ already mentioned.  Add a full stop at the end
> > of the sentence.
> > 
> > > > +   if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) 
> > > > == 0)
> > > > +   return (0);
> > > > +   /* Scan PCIExpress capabilities */
> > 
> > Drop this comment and replace with a blank line such that it matches
> > pci_get_ht_capability().
> > 
> > > > +   ofs = PCI_PCIE_ECAP;
> > > > +   while (ofs != 0) {
> > > > +   if ((ofs & 3) || (ofs < PCI_PCIE_ECAP))
> > > > +   return (0);
> > 
> > Make this check #ifdef DIAGNOSTIC like pci_get_ht_capability() doesn.
> > Dropping the (ofs & 3) bit is indeed a good idea.
> > 
> > > > +   reg = pci_conf_read(pc, tag, ofs);
> > > > +   if (PCI_PCIE_ECAP_ID(reg) == capid) {
> > > > +   if (offset)
> > > > +   *offset = ofs;
> > > > +   if (value)
> > > > +   *value = reg;
> > > > +   return (1);
> > > > +   }
> > > > +   ofs = PCI_PCIE_ECAP_NEXT(reg);
> > > > +   }
> > 
> > Blank line here please.
> > 
> > > > +   return (0);
> > > > +}
> > > > +
> > > >  uint16_t
> > > >  pci_requester_id(pci_chipset_tag_t pc, pcitag_t tag)
> > > >  {
> > > > diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
> > > > index bdfe0404f..0376ba992 100644
> > > > --- a/sys/dev/pci/pcivar.h
> > > > +++ b/sys/dev/pci/pcivar.h
> > > > @@ -233,6 +233,8 @@ int pci_io_find(pci_chipset_tag_t, pcitag_t, int, 
> > > > bus_addr_t *,
> > > >  intpci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
> > > > bus_size_t *, int *);
> > > >  
> > > > +intpcie_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > > > +   int *, pcireg_t *);
> > > >  intpci_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > > > int *, pcireg_t *);
> > > >  intpci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int,
> > > > -- 
> > > > 2.26.2
> > > > 
> > > > 
> > > 
> > > 
> diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
> index 8f9a5ef7a..f649b3e79 100644
> --- a

Re: [PATCH] Add common PCIE capability list

2020-09-07 Thread Jordan Hargrave
On Thu, Sep 03, 2020 at 08:37:56PM +0200, Mark Kettenis wrote:
> > Date: Wed, 2 Sep 2020 15:19:55 +1000
> > From: Jonathan Gray 
> > 
> > On Tue, Sep 01, 2020 at 11:44:03PM -0500, Jordan Hargrave wrote:
> > > This patch adds a common function for scanning PCIE Express Capability 
> > > list
> > > The PCIE Capability list starts at 0x100 in extended PCI configuration 
> > > space.
> > 
> > This seems to only handle extended capabilities?
> > Something like pcie_get_ext_capability() would be a better name.
> 
> I think it should be pci_get_ext_capability() which follows the
> pattern set by pci_get_ht_capability().
> 
> > 
> > It is 'PCI Express' not 'PCIExpress'
> > 
> > 'ofs & 3' test doesn't make sense when PCI_PCIE_ECAP_NEXT() always
> > masks those bits.
> > 
> > > 
> > > ---
> > >  sys/dev/pci/pci.c| 28 
> > >  sys/dev/pci/pcivar.h |  2 ++
> > >  2 files changed, 30 insertions(+)
> > > 
> > > diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
> > > index bf75f875e..8f9a5ef7a 100644
> > > --- a/sys/dev/pci/pci.c
> > > +++ b/sys/dev/pci/pci.c
> > > @@ -677,6 +677,34 @@ pci_get_ht_capability(pci_chipset_tag_t pc, pcitag_t 
> > > tag, int capid,
> > >   return (0);
> > >  }
> > >  
> > > +int
> > > +pcie_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
> > > +int *offset, pcireg_t *value)
> > > +{
> > > + pcireg_t reg;
> > > + unsigned int ofs;
> > > +
> > > + /* Make sure we support PCIExpress device */
> 
> PCI Express like jsg@ already mentioned.  Add a full stop at the end
> of the sentence.
> 
> > > + if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) == 0)
> > > + return (0);
> > > + /* Scan PCIExpress capabilities */
> 
> Drop this comment and replace with a blank line such that it matches
> pci_get_ht_capability().
> 
> > > + ofs = PCI_PCIE_ECAP;
> > > + while (ofs != 0) {
> > > + if ((ofs & 3) || (ofs < PCI_PCIE_ECAP))
> > > + return (0);
> 
> Make this check #ifdef DIAGNOSTIC like pci_get_ht_capability() doesn.
> Dropping the (ofs & 3) bit is indeed a good idea.
> 
> > > + reg = pci_conf_read(pc, tag, ofs);
> > > + if (PCI_PCIE_ECAP_ID(reg) == capid) {
> > > + if (offset)
> > > + *offset = ofs;
> > > + if (value)
> > > + *value = reg;
> > > + return (1);
> > > + }
> > > + ofs = PCI_PCIE_ECAP_NEXT(reg);
> > > + }
> 
> Blank line here please.
> 
> > > + return (0);
> > > +}
> > > +
> > >  uint16_t
> > >  pci_requester_id(pci_chipset_tag_t pc, pcitag_t tag)
> > >  {
> > > diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
> > > index bdfe0404f..0376ba992 100644
> > > --- a/sys/dev/pci/pcivar.h
> > > +++ b/sys/dev/pci/pcivar.h
> > > @@ -233,6 +233,8 @@ int   pci_io_find(pci_chipset_tag_t, pcitag_t, int, 
> > > bus_addr_t *,
> > >  int  pci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
> > >   bus_size_t *, int *);
> > >  
> > > +int  pcie_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > > + int *, pcireg_t *);
> > >  int  pci_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > >   int *, pcireg_t *);
> > >  int  pci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int,
> > > -- 
> > > 2.26.2
> > > 
> > > 
> > 
> > 
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index 8f9a5ef7a..f649b3e79 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -678,20 +678,22 @@ pci_get_ht_capability(pci_chipset_tag_t pc, pcitag_t tag, 
int capid,
 }
 
 int
-pcie_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
+pci_get_ext_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
 int *offset, pcireg_t *value)
 {
pcireg_t reg;
unsigned int ofs;
 
-   /* Make sure we support PCIExpress device */
+   /* Make sure we support PCI Express device */
if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) == 0)
return (0);
-   /* Scan PCIExpress capabilities */
+   /* Scan PCI Express capabilities */
ofs = PCI_PCIE_ECAP;
while (ofs != 0) {
+#ifdef DIAGNOSTIC
if ((ofs &a

Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-09-03 Thread Jordan Hargrave
On Thu, Sep 03, 2020 at 09:06:59PM +0200, Mark Kettenis wrote:
> > Date: Tue, 1 Sep 2020 17:20:19 -0500
> > From: Jordan Hargrave 
> > 
> > [PATCH] Add IOMMU support for Intel VT-d and AMD Vi
> > 
> > This hooks each pci device and overrides bus_dmamap_xxx to issue
> > remap of DMA requests to virtual DMA space.  It protects devices
> > from issuing I/O requests to memory in the system that is outside
> > the requested DMA space.
> > ---
> >  sys/arch/amd64/conf/GENERIC  |1 +
> >  sys/arch/amd64/conf/RAMDISK  |1 +
> >  sys/arch/amd64/conf/RAMDISK_CD   |1 +
> >  sys/arch/amd64/include/pci_machdep.h |3 +-
> >  sys/arch/amd64/pci/pci_machdep.c |   15 +-
> >  sys/dev/acpi/acpi.c  |5 +
> >  sys/dev/acpi/acpidmar.c  | 2988 ++
> >  sys/dev/acpi/acpidmar.h  |  534 +
> >  sys/dev/acpi/acpireg.h   |   21 +-
> >  sys/dev/acpi/amd_iommu.h |  358 +++
> >  sys/dev/acpi/files.acpi  |5 +
> >  sys/dev/pci/pci.c|   28 +
> >  sys/dev/pci/pcivar.h |2 +
> >  13 files changed, 3959 insertions(+), 3 deletions(-)
> >  create mode 100644 sys/dev/acpi/acpidmar.c
> >  create mode 100644 sys/dev/acpi/acpidmar.h
> >  create mode 100644 sys/dev/acpi/amd_iommu.h
> 
> This needs some further cleanup and style love.  But let's leave that
> alone for now.
> 
> How much of this code is really shared between DMAR and IVRS?  It
> would be nice to split it out between those two if we can avoid code
> duplication.
>

Yes that could be possible, and have a common iommu attach function?
I wrote that Intel code like 5 years ago... then kinda bolted the
AMD stuff on top last year.

> iommu_writel(), iommu_readl(), iommu_writeq() etc., are a bit too
> Linuxy; iommu_write_4(), iommu_read_4(), iommu_write_8() would be
> better names.

Fair enough
> 
> I don't fully grasp why you need acpidmar_intr_establish().  I can see
> that MSI interrupts from devices behind the IOMMU need to go through
> the IOMMU since they're essentially memory transaction.  But your code
> seems to only deal with the IOMMU's error interrupt.  Does the IOMMU
> interrupt itself go through the IOMMU as well?
> 
The Intel interrupt is a bit weird. It's not on a PCI device, so
pci_map_msi or something similar doesn't work.  There isn't a vector
number or anything that's provided in the DMAR structure.  So I went
with what Linux was doing for establishing the fault handler IRQ.

> Why do you need to explicitly call acpidmar_sw()?  Naively I would
> think that you need to call this fairly late, but you call it before
> config_suspend_all(DVACT_SUSPEND) happens.  Is there a reason why this
> can't happen as part of normal config_suspend_all(DVACT_SUSPEND)
> processing?

I haven't looked at the suspend/resume in a long while. I did have it
working on Intel at one point, but only one system worked and years ago.
Suspend/Resume doesn't even work at all on my current laptops, even without
these patches.
> 
> I think the way you use pci_probe_device_hook() is fine.
> 
> What is the point of having function that start with an underscore?
> Feels like another Linux-ism to me...
> 
> A few more random things in the code below...
> 
> 
> > diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
> > index 2c49f91a1..1eda12bc9 100644
> > --- a/sys/arch/amd64/conf/GENERIC
> > +++ b/sys/arch/amd64/conf/GENERIC
> > @@ -45,6 +45,7 @@ acpibtn*  at acpi?
> >  acpicpu*   at acpi?
> >  acpicmos*  at acpi?
> >  acpidock*  at acpi?
> > +acpidmar0  at acpi?
> >  acpiec*at acpi?
> >  acpipci*   at acpi?
> >  acpiprt*   at acpi?
> > diff --git a/sys/arch/amd64/conf/RAMDISK b/sys/arch/amd64/conf/RAMDISK
> > index 10148add1..7ab48f32e 100644
> > --- a/sys/arch/amd64/conf/RAMDISK
> > +++ b/sys/arch/amd64/conf/RAMDISK
> > @@ -34,6 +34,7 @@ acpipci*  at acpi?
> >  acpiprt*   at acpi?
> >  acpimadt0  at acpi?
> >  #acpitz*   at acpi?
> > +acpidmar*  at acpi? disable
> >  
> >  mpbios0at bios0
> >  
> > diff --git a/sys/arch/amd64/conf/RAMDISK_CD b/sys/arch/amd64/conf/RAMDISK_CD
> > index 91022751e..82a24e210 100644
> > --- a/sys/arch/amd64/conf/RAMDISK_CD
> > +++ b/sys/arch/amd64/conf/RAMDISK_CD
> > @@ -48,6 +48,7 @@ sdhc* at acpi?
> >  acpihve*   at acpi?
> >  chvgpio*at acpi?
> >  glkgpio*   at acpi?
> > +acpidmar*  at acpi? disable
> >  
> >  mpbios0at bios0
> >  
> > di

Re: [PATCH] Add common PCIE capability list

2020-09-02 Thread Jordan Hargrave
On Wed, Sep 02, 2020 at 03:19:55PM +1000, Jonathan Gray wrote:
> On Tue, Sep 01, 2020 at 11:44:03PM -0500, Jordan Hargrave wrote:
> > This patch adds a common function for scanning PCIE Express Capability list
> > The PCIE Capability list starts at 0x100 in extended PCI configuration 
> > space.
> 
> This seems to only handle extended capabilities?
> Something like pcie_get_ext_capability() would be a better name.
> 
> It is 'PCI Express' not 'PCIExpress'
> 
> 'ofs & 3' test doesn't make sense when PCI_PCIE_ECAP_NEXT() always
> masks those bits.
>

  Ok fixed below...
  
> > 
> > ---
> >  sys/dev/pci/pci.c| 28 
> >  sys/dev/pci/pcivar.h |  2 ++
> >  2 files changed, 30 insertions(+)
> > 
> > diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
> > index bf75f875e..8f9a5ef7a 100644
> > --- a/sys/dev/pci/pci.c
> > +++ b/sys/dev/pci/pci.c
> > @@ -677,6 +677,34 @@ pci_get_ht_capability(pci_chipset_tag_t pc, pcitag_t 
> > tag, int capid,
> > return (0);
> >  }
> >  
> > +int
> > +pcie_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
> > +int *offset, pcireg_t *value)
> > +{
> > +   pcireg_t reg;
> > +   unsigned int ofs;
> > +
> > +   /* Make sure we support PCIExpress device */
> > +   if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) == 0)
> > +   return (0);
> > +   /* Scan PCIExpress capabilities */
> > +   ofs = PCI_PCIE_ECAP;
> > +   while (ofs != 0) {
> > +   if ((ofs & 3) || (ofs < PCI_PCIE_ECAP))
> > +   return (0);
> > +   reg = pci_conf_read(pc, tag, ofs);
> > +   if (PCI_PCIE_ECAP_ID(reg) == capid) {
> > +   if (offset)
> > +   *offset = ofs;
> > +   if (value)
> > +   *value = reg;
> > +   return (1);
> > +   }
> > +   ofs = PCI_PCIE_ECAP_NEXT(reg);
> > +   }
> > +   return (0);
> > +}
> > +
> >  uint16_t
> >  pci_requester_id(pci_chipset_tag_t pc, pcitag_t tag)
> >  {
> > diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
> > index bdfe0404f..0376ba992 100644
> > --- a/sys/dev/pci/pcivar.h
> > +++ b/sys/dev/pci/pcivar.h
> > @@ -233,6 +233,8 @@ int pci_io_find(pci_chipset_tag_t, pcitag_t, int, 
> > bus_addr_t *,
> >  intpci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
> > bus_size_t *, int *);
> >  
> > +intpcie_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > +   int *, pcireg_t *);
> >  intpci_get_capability(pci_chipset_tag_t, pcitag_t, int,
> > int *, pcireg_t *);
> >  intpci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int,
> > -- 
> > 2.26.2
> > 
> > 
diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index bf75f875e..56a85453a 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -677,6 +677,34 @@ pci_get_ht_capability(pci_chipset_tag_t pc, pcitag_t tag, 
int capid,
return (0);
 }
 
+int
+pci_get_ext_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
+int *offset, pcireg_t *value)
+{
+   pcireg_t reg;
+   unsigned int ofs;
+
+   /* Make sure we support PCI Express device */
+   if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) == 0)
+   return (0);
+   /* Scan PCI Express capabilities */
+   ofs = PCI_PCIE_ECAP;
+   while (ofs != 0) {
+   if (ofs < PCI_PCIE_ECAP)
+   return (0);
+   reg = pci_conf_read(pc, tag, ofs);
+   if (PCI_PCIE_ECAP_ID(reg) == capid) {
+   if (offset)
+   *offset = ofs;
+   if (value)
+   *value = reg;
+   return (1);
+   }
+   ofs = PCI_PCIE_ECAP_NEXT(reg);
+   }
+   return (0);
+}
+
 uint16_t
 pci_requester_id(pci_chipset_tag_t pc, pcitag_t tag)
 {
diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
index bdfe0404f..1a19996f5 100644
--- a/sys/dev/pci/pcivar.h
+++ b/sys/dev/pci/pcivar.h
@@ -237,6 +237,8 @@ int pci_get_capability(pci_chipset_tag_t, pcitag_t, int,
int *, pcireg_t *);
 intpci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int,
int *, pcireg_t *);
+intpci_get_ext_capability(pci_chipset_tag_t, pcitag_t, int,
+   int *, pcireg_t *);
 
 struct msix_vector;
 



Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-09-01 Thread Jordan Hargrave
Oh good catch thanks. Weird, it does compile!


From: Daniel Dickman 
Sent: Tuesday, September 1, 2020 11:23 PM
To: Jordan Hargrave 
Cc: tech@openbsd.org 
Subject: Re: [PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

> [PATCH] Add IOMMU support for Intel VT-d and AMD Vi
>
> This hooks each pci device and overrides bus_dmamap_xxx to issue
> remap of DMA requests to virtual DMA space.  It protects devices
> from issuing I/O requests to memory in the system that is outside
> the requested DMA space.

Hi Jordan, thanks for working on this. I would like to see iommu
support...

> + uint64_tefr;
> + uint8_t reserved[8];
> +} __packd;

...that being said, is the above a typo?


[PATCH] Add common PCIE capability list

2020-09-01 Thread Jordan Hargrave
This patch adds a common function for scanning PCIE Express Capability list
The PCIE Capability list starts at 0x100 in extended PCI configuration space.

---
 sys/dev/pci/pci.c| 28 
 sys/dev/pci/pcivar.h |  2 ++
 2 files changed, 30 insertions(+)

diff --git a/sys/dev/pci/pci.c b/sys/dev/pci/pci.c
index bf75f875e..8f9a5ef7a 100644
--- a/sys/dev/pci/pci.c
+++ b/sys/dev/pci/pci.c
@@ -677,6 +677,34 @@ pci_get_ht_capability(pci_chipset_tag_t pc, pcitag_t tag, 
int capid,
return (0);
 }
 
+int
+pcie_get_capability(pci_chipset_tag_t pc, pcitag_t tag, int capid,
+int *offset, pcireg_t *value)
+{
+   pcireg_t reg;
+   unsigned int ofs;
+
+   /* Make sure we support PCIExpress device */
+   if (pci_get_capability(pc, tag, PCI_CAP_PCIEXPRESS, NULL, NULL) == 0)
+   return (0);
+   /* Scan PCIExpress capabilities */
+   ofs = PCI_PCIE_ECAP;
+   while (ofs != 0) {
+   if ((ofs & 3) || (ofs < PCI_PCIE_ECAP))
+   return (0);
+   reg = pci_conf_read(pc, tag, ofs);
+   if (PCI_PCIE_ECAP_ID(reg) == capid) {
+   if (offset)
+   *offset = ofs;
+   if (value)
+   *value = reg;
+   return (1);
+   }
+   ofs = PCI_PCIE_ECAP_NEXT(reg);
+   }
+   return (0);
+}
+
 uint16_t
 pci_requester_id(pci_chipset_tag_t pc, pcitag_t tag)
 {
diff --git a/sys/dev/pci/pcivar.h b/sys/dev/pci/pcivar.h
index bdfe0404f..0376ba992 100644
--- a/sys/dev/pci/pcivar.h
+++ b/sys/dev/pci/pcivar.h
@@ -233,6 +233,8 @@ int pci_io_find(pci_chipset_tag_t, pcitag_t, int, 
bus_addr_t *,
 intpci_mem_find(pci_chipset_tag_t, pcitag_t, int, bus_addr_t *,
bus_size_t *, int *);
 
+intpcie_get_capability(pci_chipset_tag_t, pcitag_t, int,
+   int *, pcireg_t *);
 intpci_get_capability(pci_chipset_tag_t, pcitag_t, int,
int *, pcireg_t *);
 intpci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int,
-- 
2.26.2



[PATCH] Add IOMMU support for Intel VT-d and AMD-Vi

2020-09-01 Thread Jordan Hargrave
[PATCH] Add IOMMU support for Intel VT-d and AMD Vi

This hooks each pci device and overrides bus_dmamap_xxx to issue
remap of DMA requests to virtual DMA space.  It protects devices
from issuing I/O requests to memory in the system that is outside
the requested DMA space.
---
 sys/arch/amd64/conf/GENERIC  |1 +
 sys/arch/amd64/conf/RAMDISK  |1 +
 sys/arch/amd64/conf/RAMDISK_CD   |1 +
 sys/arch/amd64/include/pci_machdep.h |3 +-
 sys/arch/amd64/pci/pci_machdep.c |   15 +-
 sys/dev/acpi/acpi.c  |5 +
 sys/dev/acpi/acpidmar.c  | 2988 ++
 sys/dev/acpi/acpidmar.h  |  534 +
 sys/dev/acpi/acpireg.h   |   21 +-
 sys/dev/acpi/amd_iommu.h |  358 +++
 sys/dev/acpi/files.acpi  |5 +
 sys/dev/pci/pci.c|   28 +
 sys/dev/pci/pcivar.h |2 +
 13 files changed, 3959 insertions(+), 3 deletions(-)
 create mode 100644 sys/dev/acpi/acpidmar.c
 create mode 100644 sys/dev/acpi/acpidmar.h
 create mode 100644 sys/dev/acpi/amd_iommu.h

diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 2c49f91a1..1eda12bc9 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -45,6 +45,7 @@ acpibtn*  at acpi?
 acpicpu*   at acpi?
 acpicmos*  at acpi?
 acpidock*  at acpi?
+acpidmar0  at acpi?
 acpiec*at acpi?
 acpipci*   at acpi?
 acpiprt*   at acpi?
diff --git a/sys/arch/amd64/conf/RAMDISK b/sys/arch/amd64/conf/RAMDISK
index 10148add1..7ab48f32e 100644
--- a/sys/arch/amd64/conf/RAMDISK
+++ b/sys/arch/amd64/conf/RAMDISK
@@ -34,6 +34,7 @@ acpipci*  at acpi?
 acpiprt*   at acpi?
 acpimadt0  at acpi?
 #acpitz*   at acpi?
+acpidmar*  at acpi? disable
 
 mpbios0at bios0
 
diff --git a/sys/arch/amd64/conf/RAMDISK_CD b/sys/arch/amd64/conf/RAMDISK_CD
index 91022751e..82a24e210 100644
--- a/sys/arch/amd64/conf/RAMDISK_CD
+++ b/sys/arch/amd64/conf/RAMDISK_CD
@@ -48,6 +48,7 @@ sdhc* at acpi?
 acpihve*   at acpi?
 chvgpio*at acpi?
 glkgpio*   at acpi?
+acpidmar*  at acpi? disable
 
 mpbios0at bios0
 
diff --git a/sys/arch/amd64/include/pci_machdep.h 
b/sys/arch/amd64/include/pci_machdep.h
index bc295cc22..c725bdc73 100644
--- a/sys/arch/amd64/include/pci_machdep.h
+++ b/sys/arch/amd64/include/pci_machdep.h
@@ -91,7 +91,8 @@ void  *pci_intr_establish_cpu(pci_chipset_tag_t, 
pci_intr_handle_t,
int, struct cpu_info *,
int (*)(void *), void *, const char *);
 void   pci_intr_disestablish(pci_chipset_tag_t, void *);
-#definepci_probe_device_hook(c, a) (0)
+intpci_probe_device_hook(pci_chipset_tag_t,
+   struct pci_attach_args *);
 
 void   pci_dev_postattach(struct device *, struct pci_attach_args *);
 
diff --git a/sys/arch/amd64/pci/pci_machdep.c b/sys/arch/amd64/pci/pci_machdep.c
index cf4e835de..b700946a4 100644
--- a/sys/arch/amd64/pci/pci_machdep.c
+++ b/sys/arch/amd64/pci/pci_machdep.c
@@ -89,6 +89,11 @@
 #include 
 #endif
 
+#include "acpi.h"
+#if NACPI > 0
+#include 
+#endif
+
 /*
  * Memory Mapped Configuration space access.
  *
@@ -797,7 +802,15 @@ pci_init_extents(void)
}
 }
 
-#include "acpi.h"
+int
+pci_probe_device_hook(pci_chipset_tag_t pc, struct pci_attach_args *pa)
+{
+#if NACPI > 0
+   acpidmar_pci_hook(pc, pa);
+#endif
+   return 0;
+}
+
 #if NACPI > 0
 void acpi_pci_match(struct device *, struct pci_attach_args *);
 pcireg_t acpi_pci_min_powerstate(pci_chipset_tag_t, pcitag_t);
diff --git a/sys/dev/acpi/acpi.c b/sys/dev/acpi/acpi.c
index a6239198e..ea11483ad 100644
--- a/sys/dev/acpi/acpi.c
+++ b/sys/dev/acpi/acpi.c
@@ -49,6 +49,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #include 
@@ -2448,6 +2449,8 @@ acpi_sleep_pm(struct acpi_softc *sc, int state)
sc->sc_fadt->pm2_cnt_blk && sc->sc_fadt->pm2_cnt_len)
acpi_write_pmreg(sc, ACPIREG_PM2_CNT, 0, ACPI_PM2_ARB_DIS);
 
+   acpidmar_sw(DVACT_SUSPEND);
+
/* Write SLP_TYPx values */
rega = acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, 0);
regb = acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, 0);
@@ -2483,6 +2486,8 @@ acpi_resume_pm(struct acpi_softc *sc, int fromstate)
 {
uint16_t rega, regb, en;
 
+   acpidmar_sw(DVACT_RESUME);
+
/* Write SLP_TYPx values */
rega = acpi_read_pmreg(sc, ACPIREG_PM1A_CNT, 0);
regb = acpi_read_pmreg(sc, ACPIREG_PM1B_CNT, 0);
diff --git a/sys/dev/acpi/acpidmar.c b/sys/dev/acpi/acpidmar.c
new file mode 100644
index 0..48506e1b1
--- /dev/null
+++ b/sys/dev/acpi/acpidmar.c
@@ -0,0 +1,2988 @@
+/*
+ * Copyright (c) 2015 Jordan Hargrave 
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is here

PATCH: Add support for 64-bit MMIO to VMM

2020-08-21 Thread Jordan Hargrave
This patch is part of the PCI Passthrough VMM changes.

This adds support for registering 64-bit MMIO regions and properly handles
calculating BAR size for variable-lenth MMIO/IO regions.

Verification via pcidump -v

---
 usr.sbin/vmd/pci.c | 69 +-
 1 file changed, 38 insertions(+), 31 deletions(-)

diff --git a/usr.sbin/vmd/pci.c b/usr.sbin/vmd/pci.c
index 4ce393237..d2c9f8805 100644
--- a/usr.sbin/vmd/pci.c
+++ b/usr.sbin/vmd/pci.c
@@ -42,17 +42,17 @@ const uint8_t pci_pic_irqs[PCI_MAX_PIC_IRQS] = {3, 5, 6, 7, 
9, 10, 11, 12,
 /*
  * pci_mkbar
  *
- * Calculates BAR address given a size and alignment.
+ * Calculates BAR address is valid
  * Returns allocated address and updates next address
  * Returns zero if address is out of range
  */
 static uint64_t
-pci_mkbar(uint64_t *base, uint32_t size, uint32_t align, uint64_t maxbase)
+pci_mkbar(uint64_t *base, uint32_t size, uint64_t maxbase)
 {
uint64_t mask = size - 1;
uint64_t cbase;
 
-   if (*base >= maxbase)
+   if (*base + size >= maxbase)
return (0);
cbase = *base;
*base = (*base + size + mask) & ~mask;
@@ -92,8 +92,22 @@ pci_add_bar(uint8_t id, uint32_t type, uint32_t size, void 
*barfn, void *cookie)
 
/* Compute BAR address and add */
bar_reg_idx = (PCI_MAPREG_START + (bar_ct * 4)) / 4;
-   if (type == PCI_MAPREG_TYPE_MEM) {
-   base = pci_mkbar(_next_mmio_bar, size, 4096, 
VMM_PCI_MMIO_BAR_END);
+   if (type == (PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT)) {
+   base = pci_mkbar(_next_mmio_bar, size, 
VMM_PCI_MMIO_BAR_END);
+   if (base == 0)
+   return (1);
+
+   pci.pci_devices[id].pd_cfg_space[bar_reg_idx] = 
+   PCI_MAPREG_MEM_ADDR(base) | PCI_MAPREG_MEM_TYPE_64BIT;
+   pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
+   pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
+   pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_MMIO;
+   pci.pci_devices[id].pd_barsize[bar_ct] = size;
+   pci.pci_devices[id].pd_bartype[bar_ct+1] = PCI_BAR_TYPE_MMIO;
+   pci.pci_devices[id].pd_barsize[bar_ct+1] = 0;
+   pci.pci_devices[id].pd_bar_ct+=2;
+   } else if (type == PCI_MAPREG_TYPE_MEM) {
+   base = pci_mkbar(_next_mmio_bar, size, 
VMM_PCI_MMIO_BAR_END);
if (base == 0)
return (1);
 
@@ -105,7 +119,7 @@ pci_add_bar(uint8_t id, uint32_t type, uint32_t size, void 
*barfn, void *cookie)
pci.pci_devices[id].pd_barsize[bar_ct] = size;
pci.pci_devices[id].pd_bar_ct++;
} else if (type == PCI_MAPREG_TYPE_IO) {
-   base = pci_mkbar(_next_io_bar, size, 4, 
VMM_PCI_IO_BAR_END);
+   base = pci_mkbar(_next_io_bar, size, 
VMM_PCI_IO_BAR_END);
if (base == 0)
return (1);
 
@@ -284,6 +298,8 @@ pci_handle_io(struct vm_run_params *vrp)
 
for (i = 0 ; i < pci.pci_dev_ct ; i++) {
for (j = 0 ; j < pci.pci_devices[i].pd_bar_ct; j++) {
+   if (pci.pci_devices[i].pd_bartype[j] != PCI_BAR_TYPE_IO)
+   continue;
b_lo = PCI_MAPREG_IO_ADDR(pci.pci_devices[i].pd_bar[j]);
b_hi = b_lo + VMM_PCI_IO_BAR_SIZE;
if (reg >= b_lo && reg < b_hi) {
@@ -326,6 +342,7 @@ pci_handle_data_reg(struct vm_run_params *vrp)
 {
struct vm_exit *vei = vrp->vrp_exit;
uint8_t b, d, f, o, baridx, ofs, sz;
+   uint32_t barval, barsize, bartype;
int ret;
pci_cs_fn_t csfunc;
 
@@ -350,7 +367,7 @@ pci_handle_data_reg(struct vm_run_params *vrp)
 
csfunc = pci.pci_devices[d].pd_csfunc;
if (csfunc != NULL) {
-   ret = csfunc(vei->vei.vei_dir, (o / 4), sz, >vei.vei_data, 
pci.pci_devices[d].pd_cookie);
+   ret = csfunc(vei->vei.vei_dir, o, sz, >vei.vei_data, 
pci.pci_devices[d].pd_cookie);
if (ret)
log_warnx("cfg space access function failed for "
"pci device %d", d);
@@ -368,31 +385,21 @@ pci_handle_data_reg(struct vm_run_params *vrp)
 * value in the address register.
 */
if (vei->vei.vei_dir == VEI_DIR_OUT) {
-   if ((o >= 0x10 && o <= 0x24) &&
-   vei->vei.vei_data == 0x) {
-   /*
-* Compute BAR index:
-* o = 0x10 -> baridx = 0
-* o = 0x14 -> baridx = 1
-* o = 0x18 -> baridx = 2
-* o = 0x1c -> baridx = 3
-* o = 0x20 -> baridx = 4
-* o = 0x24 -> baridx = 5
-*/
-   baridx = (o / 4) - 4;
-

[PATCH] Add helper vm_find_vcpu function for VMM

2020-08-18 Thread Jordan Hargrave
---
 sys/arch/amd64/amd64/vmm.c | 63 --
 1 file changed, 33 insertions(+), 30 deletions(-)

diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c
index 84fcb23a5..f6d51737e 100644
--- a/sys/arch/amd64/amd64/vmm.c
+++ b/sys/arch/amd64/amd64/vmm.c
@@ -558,6 +558,34 @@ vmmclose(dev_t dev, int flag, int mode, struct proc *p)
return 0;
 }
 
+/*
+ * vm_find_vcpu
+ *
+ * Lookup VMM VCPU by ID number
+ *
+ * Parameters:
+ *  vm: vm structure
+ *  id: index id of vcpu
+ *
+ * Returns pointer to vcpu structure if successful, NULL otherwise
+ */
+static struct vcpu *
+vm_find_vcpu(struct vm *vm, uint32_t id)
+{
+   struct vcpu *vcpu;
+
+   if (vm == NULL)
+   return NULL;
+   rw_enter_read(>vm_vcpu_lock);
+   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
+   if (vcpu->vc_id == id)
+   break;
+   }
+   rw_exit_read(>vm_vcpu_lock);
+   return vcpu;
+}
+
+
 /*
  * vm_resetcpu
  *
@@ -591,12 +619,7 @@ vm_resetcpu(struct vm_resetcpu_params *vrp)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vrp->vrp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vrp->vrp_vcpu_id);
 
if (vcpu == NULL) {
DPRINTF("%s: vcpu id %u of vm %u not found\n", __func__,
@@ -657,12 +680,7 @@ vm_intr_pending(struct vm_intr_params *vip)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vip->vip_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vip->vip_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -722,12 +740,7 @@ vm_rwvmparams(struct vm_rwvmparams_params *vpp, int dir) {
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vpp->vpp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vpp->vpp_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -786,12 +799,7 @@ vm_rwregs(struct vm_rwregs_params *vrwp, int dir)
return (error);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vrwp->vrwp_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vrwp->vrwp_vcpu_id);
rw_exit_read(_softc->vm_lock);
 
if (vcpu == NULL)
@@ -858,12 +866,7 @@ vm_mprotect_ept(struct vm_mprotect_ept_params *vmep)
return (ret);
}
 
-   rw_enter_read(>vm_vcpu_lock);
-   SLIST_FOREACH(vcpu, >vm_vcpu_list, vc_vcpu_link) {
-   if (vcpu->vc_id == vmep->vmep_vcpu_id)
-   break;
-   }
-   rw_exit_read(>vm_vcpu_lock);
+   vcpu = vm_find_vcpu(vm, vmep->vmep_vcpu_id);
 
if (vcpu == NULL) {
DPRINTF("%s: vcpu id %u of vm %u not found\n", __func__,
-- 
2.26.2



PATCH: VMD fixes for PCI Config Space and BAR Allocation [passthrough PCI support]

2020-08-18 Thread Jordan Hargrave
This is the first patch for adding PCI passthrough support to VMD.  
I am splitting up the necessary changes into smaller patches.

This code fixes the pci device union for accessing PCI config space >= 0x40
pcidump -xxx would return garbage data due to union overlap

pci_add_bar now requires specifying the BAR area size to allocate

Extra cookie argument added to pci_add_device

---
 usr.sbin/vmd/pci.c| 50 +++
 usr.sbin/vmd/pci.h| 80 ++-
 usr.sbin/vmd/virtio.c | 25 +++---
 3 files changed, 89 insertions(+), 66 deletions(-)

diff --git a/usr.sbin/vmd/pci.c b/usr.sbin/vmd/pci.c
index 954235eb6..4ce393237 100644
--- a/usr.sbin/vmd/pci.c
+++ b/usr.sbin/vmd/pci.c
@@ -39,28 +39,47 @@ extern char *__progname;
 const uint8_t pci_pic_irqs[PCI_MAX_PIC_IRQS] = {3, 5, 6, 7, 9, 10, 11, 12,
 14, 15};
 
+/*
+ * pci_mkbar
+ *
+ * Calculates BAR address given a size and alignment.
+ * Returns allocated address and updates next address
+ * Returns zero if address is out of range
+ */
+static uint64_t
+pci_mkbar(uint64_t *base, uint32_t size, uint32_t align, uint64_t maxbase)
+{
+   uint64_t mask = size - 1;
+   uint64_t cbase;
+
+   if (*base >= maxbase)
+   return (0);
+   cbase = *base;
+   *base = (*base + size + mask) & ~mask;
+   return cbase;
+}
+
 /*
  * pci_add_bar
  *
  * Adds a BAR for the PCI device 'id'. On access, 'barfn' will be
  * called, and passed 'cookie' as an identifier.
  *
- * BARs are fixed size, meaning all I/O BARs requested have the
- * same size and all MMIO BARs have the same size.
- *
  * Parameters:
  *  id: PCI device to add the BAR to (local count, eg if id == 4,
  *  this BAR is to be added to the VM's 5th PCI device)
  *  type: type of the BAR to add (PCI_MAPREG_TYPE_xxx)
+ *  size: Size of BAR area
  *  barfn: callback function invoked on BAR access
  *  cookie: cookie passed to barfn on access
  *
  * Returns 0 if the BAR was added successfully, 1 otherwise.
  */
 int
-pci_add_bar(uint8_t id, uint32_t type, void *barfn, void *cookie)
+pci_add_bar(uint8_t id, uint32_t type, uint32_t size, void *barfn, void 
*cookie)
 {
uint8_t bar_reg_idx, bar_ct;
+   uint64_t base = 0;
 
/* Check id */
if (id >= pci.pci_dev_ct)
@@ -74,31 +93,31 @@ pci_add_bar(uint8_t id, uint32_t type, void *barfn, void 
*cookie)
/* Compute BAR address and add */
bar_reg_idx = (PCI_MAPREG_START + (bar_ct * 4)) / 4;
if (type == PCI_MAPREG_TYPE_MEM) {
-   if (pci.pci_next_mmio_bar >= VMM_PCI_MMIO_BAR_END)
+   base = pci_mkbar(_next_mmio_bar, size, 4096, 
VMM_PCI_MMIO_BAR_END);
+   if (base == 0)
return (1);
 
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
-   PCI_MAPREG_MEM_ADDR(pci.pci_next_mmio_bar);
-   pci.pci_next_mmio_bar += VMM_PCI_MMIO_BAR_SIZE;
+   PCI_MAPREG_MEM_ADDR(base);
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_MMIO;
-   pci.pci_devices[id].pd_barsize[bar_ct] = VMM_PCI_MMIO_BAR_SIZE;
+   pci.pci_devices[id].pd_barsize[bar_ct] = size;
pci.pci_devices[id].pd_bar_ct++;
} else if (type == PCI_MAPREG_TYPE_IO) {
-   if (pci.pci_next_io_bar >= VMM_PCI_IO_BAR_END)
+   base = pci_mkbar(_next_io_bar, size, 4, 
VMM_PCI_IO_BAR_END);
+   if (base == 0)
return (1);
 
pci.pci_devices[id].pd_cfg_space[bar_reg_idx] =
-   PCI_MAPREG_IO_ADDR(pci.pci_next_io_bar) |
+   PCI_MAPREG_IO_ADDR(base) |
PCI_MAPREG_TYPE_IO;
-   pci.pci_next_io_bar += VMM_PCI_IO_BAR_SIZE;
pci.pci_devices[id].pd_barfunc[bar_ct] = barfn;
pci.pci_devices[id].pd_bar_cookie[bar_ct] = cookie;
DPRINTF("%s: adding pci bar cookie for dev %d bar %d = %p",
__progname, id, bar_ct, cookie);
pci.pci_devices[id].pd_bartype[bar_ct] = PCI_BAR_TYPE_IO;
-   pci.pci_devices[id].pd_barsize[bar_ct] = VMM_PCI_IO_BAR_SIZE;
+   pci.pci_devices[id].pd_barsize[bar_ct] = size;
pci.pci_devices[id].pd_bar_ct++;
}
 
@@ -165,7 +184,7 @@ pci_get_dev_irq(uint8_t id)
 int
 pci_add_device(uint8_t *id, uint16_t vid, uint16_t pid, uint8_t class,
 uint8_t subclass, uint16_t subsys_vid, uint16_t subsys_id,
-uint8_t irq_needed, pci_cs_fn_t csfunc)
+uint8_t irq_needed, pci_cs_fn_t csfunc, void *cookie)
 {
/* Exceeded max devices? */
if (pci.pci_dev_ct >= PCI_CONFIG_MAX_DEV)
@@ -186,6 +205,7 @@ pci_add_device(uint8_t *id, uint16_t vid, uint16_t pid, 
uint8_t class,
pci.pci_devices[*id].pd_subsys_id 

[PATCH 2] Add support for Passthrough PCI to VMM

2020-08-11 Thread Jordan Hargrave
This patch adds support to VMM to support passthrough PCI. I have tested
this on both Intel/AMD boxes, it requires the DMAR/IOMMU diff patch.

It has worked so far with re0 network devices and azalia sound but would
like more eyes and testing on this as well.

In order to build this you need to copy the arch/amd64/include/vmmvar.h to
/usr/include/machine and rebuild usr.sbin/vmd and usr.sbin/vmm

usage:
vmctl start -c -d  -p  vm1

The device should now show up in the pci scan of the guest, normal
dumppci functions should work. Interrupts are still a bit of a hack
if anyone has a better idea on how to implement this.


---
 sys/arch/amd64/amd64/conf.c  |   2 +-
 sys/arch/amd64/amd64/vmm.c   | 357 +---
 sys/arch/amd64/include/vmmvar.h  |  58 
 sys/arch/amd64/pci/pci_machdep.c |   3 +
 sys/dev/pci/pci.c|  21 ++
 sys/sys/pciio.h  |   2 +
 usr.sbin/vmctl/main.c|  37 ++-
 usr.sbin/vmctl/vmctl.c   |   7 +-
 usr.sbin/vmctl/vmctl.h   |   6 +-
 usr.sbin/vmd/Makefile|   2 +-
 usr.sbin/vmd/control.c   |   2 +
 usr.sbin/vmd/pci.c   | 549 ---
 usr.sbin/vmd/pci.h   |  34 +-
 usr.sbin/vmd/virtio.c|  25 +-
 usr.sbin/vmd/vm.c| 167 +-
 usr.sbin/vmd/vmd.c   |   2 +
 usr.sbin/vmd/vmm.c   |   2 +
 usr.sbin/vmd/vmm.h   |  14 +
 18 files changed, 1147 insertions(+), 143 deletions(-)

diff --git a/sys/arch/amd64/amd64/conf.c b/sys/arch/amd64/amd64/conf.c
index ece073225..ad10a38a1 100644
--- a/sys/arch/amd64/amd64/conf.c
+++ b/sys/arch/amd64/amd64/conf.c
@@ -103,7 +103,7 @@ int nblkdev = nitems(bdevsw);
(dev_type_write((*))) enodev, \
 dev_init(c,n,ioctl), \
(dev_type_stop((*))) enodev, 0, seltrue, \
-   (dev_type_mmap((*))) enodev, 0, 0, seltrue_kqfilter }
+   dev_init(c,n,mmap) }
 
 #definemmread  mmrw
 #definemmwrite mmrw
diff --git a/sys/arch/amd64/amd64/vmm.c b/sys/arch/amd64/amd64/vmm.c
index 84fcb23a5..43ec3d9ac 100644
--- a/sys/arch/amd64/amd64/vmm.c
+++ b/sys/arch/amd64/amd64/vmm.c
@@ -41,10 +41,17 @@
 #include 
 #include 
 
+#include 
+#include 
+#include 
+
 /* #define VMM_DEBUG */
 
 void *l1tf_flush_region;
 
+extern void *_iommu_domain(int segment, int bus, int dev, int func, int *id);
+extern void  _iommu_map(void *dom, vaddr_t va, bus_addr_t pa, bus_size_t len);
+
 #ifdef VMM_DEBUG
 #define DPRINTF(x...)  do { printf(x); } while(0)
 #else
@@ -114,6 +121,7 @@ void vmm_attach(struct device *, struct device *, void *);
 int vmmopen(dev_t, int, int, struct proc *);
 int vmmioctl(dev_t, u_long, caddr_t, int, struct proc *);
 int vmmclose(dev_t, int, int, struct proc *);
+paddr_t vap(dev_t dev, off_t off, int prot);
 int vmm_start(void);
 int vmm_stop(void);
 size_t vm_create_check_mem_ranges(struct vm_create_params *);
@@ -127,6 +135,7 @@ int vm_rwregs(struct vm_rwregs_params *, int);
 int vm_mprotect_ept(struct vm_mprotect_ept_params *);
 int vm_rwvmparams(struct vm_rwvmparams_params *, int);
 int vm_find(uint32_t, struct vm **);
+struct vcpu *vm_find_vcpu(struct vm *, uint32_t);
 int vcpu_readregs_vmx(struct vcpu *, uint64_t, struct vcpu_reg_state *);
 int vcpu_readregs_svm(struct vcpu *, uint64_t, struct vcpu_reg_state *);
 int vcpu_writeregs_vmx(struct vcpu *, uint64_t, int, struct vcpu_reg_state *);
@@ -303,6 +312,247 @@ extern struct gate_descriptor *idt;
 #define CR_CLTS2
 #define CR_LMSW3
 
+int vm_pciio(struct vm_pciio *ptd);
+int vm_pio(struct vm_pio *pio);
+int vm_getbar(struct vm_barinfo *bi);
+int vm_getintr(struct vm_getintr *mi);
+
+struct vppt {
+   pci_chipset_tag_t pc;
+   pcitag_t  tag;
+   pci_intr_handle_t ih;
+   uint32_t  pending;
+   void  *cookie;
+   TAILQ_ENTRY(vppt) next;
+};
+TAILQ_HEAD(,vppt) vppts = TAILQ_HEAD_INITIALIZER(vppts);
+
+void vmm_mapintr(pci_chipset_tag_t pc, struct pci_attach_args *pa)
+{
+   int bus, dev, fun;
+   struct vppt *ppt;
+
+   TAILQ_FOREACH(ppt, , next) {
+   if (ppt->pc == pc && ppt->tag == pa->pa_tag)
+   return;
+   }
+   ppt = malloc(sizeof(*ppt), M_DEVBUF, M_ZERO | M_WAITOK);
+   if (!ppt)
+   return;
+   ppt->pc = pc;
+   ppt->tag = pa->pa_tag;
+   pci_decompose_tag(pc, pa->pa_tag, , , );
+   if (pci_intr_map_msi(pa, >ih) || pci_intr_map(pa, >ih)) {
+   printf("Couldn't map %d/%d/%d\n", bus, dev, fun);
+   free(ppt, M_DEVBUF, sizeof(*ppt));
+   return;
+   }
+   printf("Mapped %d/%d/%d intr %d/%d\n", bus, dev, fun, ppt->ih.line, 
ppt->ih.pin);
+   TAILQ_INSERT_TAIL(, ppt, next);
+}
+
+int vm_pciio(struct vm_pciio *ptd)
+{
+   pci_chipset_tag_t pc = NULL;
+   pcitag_t tag;
+
+   if (ptd->reg & 3)
+   return EINVAL;
+   tag = pci_make_tag(pc, 

Re: [PATCHv2]: VT-D DMA support for PCI devices

2015-08-11 Thread Jordan Hargrave
New version, based from amd64 5.7 release

The BIOS is supposed to mark any regions used by devices under its control (eg 
USB) in the Reserved Memory Range (RMRR).
Some (many?) BIOS get this wrong so we mark the entire e820 reserved area 
containing the RMRR region as unusable DMA, 
otherwise DMAR faults will occur when an IOMMU is enabled before BIOS handoff 
occurs.

Suspend/Resume is also not yet working... this DMAR device needs to be 
suspended after PCI devices and resumed before DMA I/O occurs.

 From: jordan_hargr...@hotmail.com
 To: tech@openbsd.org
 Subject: [PATCH]: VT-D DMA support for PCI devices
 Date: Thu, 23 Jul 2015 16:39:36 +
 
 Below you'll find a patch that adds vt-d support
 (https://software.intel.com/en-us/blogs/2009/06/25/understanding-vt-d-intel-virtualization-technology-for-directed-io).
 Being able to restrict where devices perform DMA is a pretty big security
 benefit.  This code works on several machines but isn't quite completed yet.
 For example it doesn't handle drm correctly yet (it bypasses it for now).  It
 also needs a lot of testing on different hardware to determine its actual
 state.  The time has however come to share this with the community to gauge
 interest and getting some testing.  Suspend/resume is also only working on 
 some
 machines and needs more testing.  I think the acpidmar devices need to be one 
 of the
 last devices suspended/first resumed.
  
 This code was developed under contract from Company 0 for the Bitrig project.
 Code was developed on OpenBSD because that is where I have most experience. I
 sincerely hope this code can be imported into both trees.

diff --git a/sys/arch/amd64/conf/GENERIC b/sys/arch/amd64/conf/GENERIC
index 7e9ce16..dc6a828 100644
--- a/sys/arch/amd64/conf/GENERIC
+++ b/sys/arch/amd64/conf/GENERIC
@@ -60,6 +60,7 @@ acpivideo*at acpi?
 acpivout*at acpivideo?
 acpipwrres*at acpi?
 aibs*at acpi?
+acpidmar0at acpi?
 
 mpbios0at bios0
 
diff --git a/sys/dev/acpi/acpidmar.c b/sys/dev/acpi/acpidmar.c
new file mode 100755
index 000..29baf46
--- /dev/null
+++ b/sys/dev/acpi/acpidmar.c
@@ -0,0 +1,1943 @@
+/*
+ * Copyright (c) 2015 Jordan Hargrave jordan_hargr...@hotmail.com
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/kernel.h
+#include sys/device.h
+#include sys/malloc.h
+#include sys/queue.h
+#include sys/types.h
+#include sys/mbuf.h
+#include sys/proc.h
+
+#include uvm/uvm_extern.h
+
+#include machine/apicvar.h
+#include machine/cpuvar.h
+#include machine/bus.h
+
+#include dev/acpi/acpireg.h
+#include dev/acpi/acpivar.h
+#include dev/acpi/acpidev.h
+#include dev/acpi/amltypes.h
+#include dev/acpi/dsdt.h
+
+#include uvm/uvm_extern.h
+
+#include machine/i8259.h
+#include machine/i82093reg.h
+#include machine/i82093var.h
+#include machine/i82489reg.h
+#include machine/i82489var.h
+
+#include machine/mpbiosvar.h
+
+#include dev/pci/pcireg.h
+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/ppbreg.h
+
+#include ioapic.h
+
+#include acpidmar.h
+
+#define dprintf(x...)
+
+int intel_iommu_gfx_mapped = 0;
+
+/* Page Table Entry per domain */
+struct iommu_softc;
+
+static inline int
+mksid(int b, int d, int f)
+{
+return (b  8) + (d  3) + f;
+}
+
+static inline int
+sid_devfn(int sid)
+{
+return sid  0xff;
+}
+
+static inline int
+sid_bus(int sid)
+{
+return (sid 8)  0xff;
+}
+
+static inline int
+sid_dev(int sid)
+{
+return (sid 3)  0x1f;
+}
+
+static inline int
+sid_fun(int sid)
+{
+return (sid 0)  0x7;
+}
+
+struct domain_dev {
+intsid;
+TAILQ_ENTRY(domain_dev)link;
+};
+
+struct domain {
+struct iommu_softc*iommu;
+intdid;
+intgaw;
+struct pte_entry*pte;
+paddr_tptep;
+struct bus_dma_tagdmat;
+intflag;
+
+charexname[32];
+struct extent*iovamap;
+TAILQ_HEAD(,domain_dev)devices;
+TAILQ_ENTRY(domain)link;
+};
+
+struct dmar_devlist {
+inttype;
+intbus;
+intndp;
+struct acpidmar_devpath*dp;
+TAILQ_ENTRY(dmar_devlist)link;
+};
+
+TAILQ_HEAD(devlist_head, dmar_devlist);
+
+struct

[PATCH]: VT-D DMA support for PCI devices

2015-07-23 Thread Jordan Hargrave
Below you'll find a patch that adds vt-d support
(https://software.intel.com/en-us/blogs/2009/06/25/understanding-vt-d-intel-virtualization-technology-for-directed-io).
Being able to restrict where devices perform DMA is a pretty big security
benefit.  This code works on several machines but isn't quite completed yet.
For example it doesn't handle drm correctly yet (it bypasses it for now).  It
also needs a lot of testing on different hardware to determine its actual
state.  The time has however come to share this with the community to gauge
interest and getting some testing.  Suspend/resume is also only working on some
machines and needs more testing.  I think the acpidmar devices need to be one 
of the
last devices suspended/first resumed.
 
This code was developed under contract from Company 0 for the Bitrig project.
Code was developed on OpenBSD because that is where I have most experience. I
sincerely hope this code can be imported into both trees.

Index: arch/amd64/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/amd64/conf/GENERIC,v
retrieving revision 1.391
diff -u -p -u -p -r1.391 GENERIC
--- arch/amd64/conf/GENERIC 21 Jul 2015 03:38:22 -  1.391
+++ arch/amd64/conf/GENERIC 22 Jul 2015 20:24:49 -
@@ -52,6 +52,7 @@ acpiec*   at acpi?
 acpiprt*   at acpi?
 acpitz*at acpi?
 acpimadt0  at acpi?
+acpidmar0  at acpi?
 acpimcfg*  at acpi?
 acpiasus*  at acpi?
 acpisony*  at acpi?
Index: arch/amd64/include/pci_machdep.h
===
RCS file: /cvs/src/sys/arch/amd64/include/pci_machdep.h,v
retrieving revision 1.23
diff -u -p -u -p -r1.23 pci_machdep.h
--- arch/amd64/include/pci_machdep.h17 Jul 2015 22:42:09 -  1.23
+++ arch/amd64/include/pci_machdep.h22 Jul 2015 20:24:49 -
@@ -90,7 +90,8 @@ void  *pci_intr_establish(pci_chipset_ta
 void   pci_intr_disestablish(pci_chipset_tag_t, void *);
 void   pci_decompose_tag(pci_chipset_tag_t, pcitag_t,
int *, int *, int *);
-#definepci_probe_device_hook(c, a) (0)
+intpci_probe_device_hook(pci_chipset_tag_t,
+   struct pci_attach_args *);
 
 void   pci_dev_postattach(struct device *, struct pci_attach_args *);
 
Index: arch/amd64/pci/pci_machdep.c
===
RCS file: /cvs/src/sys/arch/amd64/pci/pci_machdep.c,v
retrieving revision 1.62
diff -u -p -u -p -r1.62 pci_machdep.c
--- arch/amd64/pci/pci_machdep.c14 Mar 2015 03:38:46 -  1.62
+++ arch/amd64/pci/pci_machdep.c22 Jul 2015 20:24:49 -
@@ -147,6 +147,15 @@ struct bus_dma_tag pci_bus_dma_tag = {
_bus_dmamem_mmap,
 };
 
+extern void acpidmar_pci_hook(pci_chipset_tag_t, struct pci_attach_args *);
+
+int
+pci_probe_device_hook(pci_chipset_tag_t pc, struct pci_attach_args *pa)
+{
+   acpidmar_pci_hook(pc, pa);
+   return (0);
+}
+
 void
 pci_attach_hook(struct device *parent, struct device *self,
 struct pcibus_attach_args *pba)
Index: dev/acpi/acpidmar.c
===
RCS file: dev/acpi/acpidmar.c
diff -N dev/acpi/acpidmar.c
--- /dev/null   1 Jan 1970 00:00:00 -
+++ dev/acpi/acpidmar.c 22 Jul 2015 20:25:36 -
@@ -0,0 +1,1872 @@
+/*
+ * Copyright (c) 2015 Jordan Hargrave jordan_hargr...@hotmail.com
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/kernel.h
+#include sys/device.h
+#include sys/malloc.h
+#include sys/queue.h
+#include sys/types.h
+#include sys/mbuf.h
+#include sys/proc.h
+
+#include uvm/uvm_extern.h
+
+#include machine/apicvar.h
+#include machine/cpuvar.h
+#include machine/bus.h
+
+#include dev/acpi/acpireg.h
+#include dev/acpi/acpivar.h
+#include dev/acpi/acpidev.h
+#include dev/acpi/amltypes.h
+#include dev/acpi/dsdt.h
+
+#include uvm/uvm_extern.h
+
+#include machine/i8259.h
+#include machine/i82093reg.h
+#include machine/i82093var.h
+#include machine/i82489reg.h
+#include machine/i82489var.h
+
+#include machine/mpbiosvar.h
+
+#include dev/pci/pcireg.h
+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h

Re: aml: Fix integer types to be unsigned

2012-04-01 Thread Jordan Hargrave
you will need to fix AMLOP_ONES as well. It does a (char)opcode typecast,
which would be 0xff not 0x... if using uint64.

amlop_match, amlop_wait, amlop_acquire, amlop_condref all will need to return
AML_ONES or AML_TRUE

 Date: Sun, 1 Apr 2012 10:45:55 +0300
 From: p...@irofti.net
 To: o...@drijf.net
 CC: tech@openbsd.org; kette...@openbsd.org; chas...@skynet.be;
jor...@openbsd.org
 Subject: Re: aml: Fix integer types to be unsigned

 On Sat, Mar 31, 2012 at 05:33:33PM +0200, Otto Moerbeek wrote:
  On Sat, Mar 31, 2012 at 01:47:18AM +0300, Paul Irofti wrote:
 
   After the report from a few weeks ago I went ahead and fixed most (if
   not all) of the signed integer usages in the AML parser.
  
   Please have a look at this diff, test it thoroughly and comment/okay
it.
 
  Some comments inline.
 
   +_aml_setvalue(struct aml_value *lhs, int type, u_int64_t ival, const
void *bval)
{
 memset(lhs-_, 0x0, sizeof(lhs-_));
  
   @@ -923,7 +920,7 @@ _aml_setvalue(struct aml_value *lhs, int
 memcpy(lhs-v_buffer, bval, ival);
 break;
 case AML_OBJTYPE_STRING:
   - if (ival == -1)
   + if ((signed)ival == -1)
 
  Very a-typical way of doing this. Better cast the constant to the
  target type, that's the comon idiom. (signed) is a shorthand for
  (signed int) and not (the signed variant of the type). It is very
  uncommon to use it.

 Yes, I had some issues with casting on the other side (which is what I
 tried first). Yes, I know now, that (signed) expands to (signed int).
 Well I think I knew that in the passed but the brain cells holding that
 information must've quit and moved on to a smarter brain.

 So the solution, I think, will be to check against (0x..ff)
 constants and stop casting.

 The problem here was that I got values in ival that were
 32-bit and also 64-bit versions of -1.



Re: aml: Fix integer types to be unsigned

2012-03-31 Thread Jordan Hargrave
Strings are always called with -1 (to pull the size-field from strlen itself)
for creation.  So technically that could be any large constant as well.

 To: o...@drijf.net
 CC: tech@openbsd.org; kette...@openbsd.org; chas...@skynet.be;
jor...@openbsd.org
 Subject: Re: aml: Fix integer types to be unsigned
 Date: Sat, 31 Mar 2012 09:49:22 -0600
 From: dera...@cvs.openbsd.org

   +_aml_setvalue(struct aml_value *lhs, int type, u_int64_t ival, const
void *bval)
{
 memset(lhs-_, 0x0, sizeof(lhs-_));
  
   @@ -923,7 +920,7 @@ _aml_setvalue(struct aml_value *lhs, int
 memcpy(lhs-v_buffer, bval, ival);
 break;
 case AML_OBJTYPE_STRING:
   - if (ival == -1)
   + if ((signed)ival == -1)
 
  Very a-typical way of doing this. Better cast the constant to the
  target type, that's the comon idiom. (signed) is a shorthand for
  (signed int) and not (the signed variant of the type). It is very
  uncommon to use it.

 I've discussed this with Paul a bit.

 The problem he's dealing with is the aml size field, which is still
 an int.  There's some other fields which are int64_t.

 These are either one step up the call chain, or fetched way way earlier.

 Some of those fields have to change size, but it requires an extensive
 audit.

 If there is going to be interpretation of int to long, or unsigned to
 signed, it has to be be done in the caller.



ACPI patch: Fix CondRef target

2011-06-01 Thread Jordan Hargrave
This patch fixes CondRef store to empty target seen on Dell E4310 and
some HP systems.  Please test and send dmesg output.

Index: dsdt.c
===
RCS file: /cvs/src/sys/dev/acpi/dsdt.c,v
retrieving revision 1.185
diff -u -p -b -r1.185 dsdt.c
--- dsdt.c  22 Apr 2011 18:22:01 -  1.185
+++ dsdt.c  2 Jun 2011 04:15:27 -
@@ -244,7 +244,7 @@ struct aml_opcode aml_table[] = {
{ AMLOP_INDEX,  Index,tir,  },
{ AMLOP_DEREFOF,DerefOf,  t,},
{ AMLOP_REFOF,  RefOf,S,},
-   { AMLOP_CONDREFOF,  CondRef,  SS,   },
+   { AMLOP_CONDREFOF,  CondRef,  Sr,   },
 
{ AMLOP_LOADTABLE,  LoadTable,tt },
{ AMLOP_STALL,  Stall,i,},
@@ -3536,11 +3536,14 @@ aml_parse(struct aml_scope *scope, int r
/* CondRef: rr = I */
ival = 0;
if (opargs[0]-node != NULL) {
+   printf(condref: %s %p\n, 
aml_nodename(opargs[0]-node), opargs[1]);
+   
/* Create Object Reference */
-   opargs[2] = aml_allocvalue(AML_OBJTYPE_OBJREF, opcode,
+   rv = aml_allocvalue(AML_OBJTYPE_OBJREF, opcode,
opargs[0]);
aml_addref(opargs[0], CondRef);
-   aml_store(scope, opargs[1], 0, opargs[2]);
+   aml_store(scope, opargs[1], 0, rv);
+   aml_delref(rv, 0);
 
/* Mark that we found it */
ival = -1;



PATCH: ACPI aml dereference diff

2011-04-22 Thread Jordan Hargrave
This diff creates a common aml_dereference function, please test on as many 
systems as possible and send dmesg

Index: acpiprt.c
===
RCS file: /cvs/src/sys/dev/acpi/acpiprt.c,v
retrieving revision 1.43
diff -u -p -b -r1.43 acpiprt.c
--- acpiprt.c   3 Aug 2010 22:54:12 -   1.43
+++ acpiprt.c   22 Apr 2011 18:28:57 -
@@ -237,25 +237,10 @@ acpiprt_prt_add(struct acpiprt_softc *sc
return;
}
 
-   pp = v-v_package[2];
-   if (pp-type == AML_OBJTYPE_STRING) {
-   node = aml_searchrel(sc-sc_devnode, pp-v_string);
-   if (node == NULL) {
+   pp = aml_dereference(sc-sc_devnode, v-v_package[2]);
+   if (pp == NULL) {
printf(Invalid device\n);
return;
-   }
-   pp = node-value;
-   }
-   if (pp-type == AML_OBJTYPE_NAMEREF) {
-   node = aml_searchrel(sc-sc_devnode, pp-v_nameref);
-   if (node == NULL) {
-   printf(Invalid device\n);
-   return;
-   }
-   pp = node-value;
-   }
-   if (pp-type == AML_OBJTYPE_OBJREF) {
-   pp = pp-v_objref.ref;
}
if (pp-type == AML_OBJTYPE_DEVICE) {
node = pp-node;
Index: acpitz.c
===
RCS file: /cvs/src/sys/dev/acpi/acpitz.c,v
retrieving revision 1.42
diff -u -p -b -r1.42 acpitz.c
--- acpitz.c7 Apr 2011 20:16:19 -   1.42
+++ acpitz.c22 Apr 2011 18:28:57 -
@@ -239,7 +239,6 @@ acpitz_attach(struct device *parent, str
 int
 acpitz_setfan(struct acpitz_softc *sc, int i, char *method)
 {
-   struct aml_node *node;
struct aml_valueres1, *ref;
charname[8];
int rv = 1, x, y;
@@ -267,20 +266,12 @@ acpitz_setfan(struct acpitz_softc *sc, i
continue;
}
for (y = 0; y  res1.length; y++) {
-   ref = res1.v_package[y];
-   if (ref-type == AML_OBJTYPE_STRING) {
-   node = aml_searchrel(sc-sc_devnode,
-   ref-v_string);
-   if (node == NULL) {
+   ref = aml_dereference(sc-sc_devnode, 
res1.v_package[y]);
+   if (ref == NULL) {
printf(%s: %s[%d.%d] _PRO
 not a valid device\n,
DEVNAME(sc), name, x, y);
continue;
-   }
-   ref = node-value;
-   }
-   if (ref-type == AML_OBJTYPE_OBJREF) {
-   ref = ref-v_objref.ref;
}
if (ref-type != AML_OBJTYPE_DEVICE 
ref-type != AML_OBJTYPE_POWERRSRC) {
Index: dsdt.c
===
RCS file: /cvs/src/sys/dev/acpi/dsdt.c,v
retrieving revision 1.185
diff -u -p -b -r1.185 dsdt.c
--- dsdt.c  22 Apr 2011 18:22:01 -  1.185
+++ dsdt.c  22 Apr 2011 18:28:59 -
@@ -1810,6 +1810,27 @@ aml_findscope(struct aml_scope *scope, i
 }
 
 struct aml_value *
+aml_dereference(struct aml_node *node, struct aml_value *val)
+{
+   printf(deref: %s %x\n, aml_nodename(node), val-type);
+   if (val-type == AML_OBJTYPE_STRING) {
+   node = aml_searchrel(node, val-v_string);
+   if (node == NULL)
+   return NULL;
+   val = node-value;
+   }
+   if (val-type == AML_OBJTYPE_NAMEREF) {
+   node = aml_searchrel(node, val-v_string);
+   if (node == NULL)
+   return NULL;
+   val = node-value;
+   }
+   while (val-type == AML_OBJTYPE_OBJREF)
+   val = val-v_objref.ref;
+   return val;
+}
+
+struct aml_value *
 aml_getstack(struct aml_scope *scope, int opcode)
 {
struct aml_value *sp;
Index: dsdt.h
===
RCS file: /cvs/src/sys/dev/acpi/dsdt.h,v
retrieving revision 1.58
diff -u -p -b -r1.58 dsdt.h
--- dsdt.h  18 Apr 2011 00:40:26 -  1.58
+++ dsdt.h  22 Apr 2011 18:28:59 -
@@ -46,6 +46,7 @@ int64_t   aml_val2int(struct aml_value *
 struct aml_node*aml_searchname(struct aml_node *, const void 
*);
 struct aml_node*aml_searchrel(struct aml_node *, const void *);
 
+struct aml_value   *aml_dereference(struct aml_node *, struct aml_value *);
 struct aml_value   *aml_getstack(struct aml_scope *, int);
 struct aml_value   *aml_allocvalue(int, 

Re: New acpi challenges! New Dell XPS blows up in acpivideo!

2011-01-09 Thread Jordan Hargrave
It looks like there is a new L06 bios for the L401X, can you try this?

 Date: Wed, 22 Dec 2010 16:08:54 -0500
 From: kwesterb...@rogers.com
 To: tech@openbsd.org
 CC: jor...@openbsd.org; mlar...@openbsd.org; ma...@openbsd.org;
kette...@openbsd.org
 Subject: New acpi challenges! New Dell XPS blows up in acpivideo!

 Got a new Dell XPS 401 laptop today and booted amd64 -current bsd.mp
 off of a usb stick. It immediately blew up in acpi. bsd.rd did not
 blow up.

 There seems to be a minor (i.e. non ddb causing) issue prior to
 acpivideo:

 acpiec0 at acpi0
 acpicpu0 at acpi0acpi0: unable to load \\_PR_.CSDT
 : PSS
 acpicpu1 at acpi0: PSS


 Hand transcribed:

 usual dmesg -- see below
 acpivideo at acpi0: GFX0
   0x801d6788 cnt:01 stk: 00 objref: 0x801c3c08
   index: 0 opcode: Cond Ref
 [\HDOS] 0x801c3c08 cnt: 04 stk: 00 method: 08
 Could not convert 101 to 1
 6a58 Called: \_SB_.PCI0.GFX0._DOS
   arg0: 0x801d1a08 cnt: 01 stk: 00 integer: 4
 6a5c Called: \_SB_.PCI0.GFX0._DOS
   arg0: 0x801d1a08 cnt: 01 stk: 00 integer: 4
 panic: aml_die aml_xconvert:2052

 ddb{0} trace
 _aml_die
 aml_xconvert
 aml_xstore
 aml_xparse
 aml_xeval
 aml_evalnode
 acpivideo_set_policy
 acpivideo_attach
 config_attach
 acpi_foundvideo
 aml_found_node
 aml_found_node
 aml_found_node
 aml_found_node
 aml_found_node
 acpi_attach
 config_attach
 bios_attach
 config_attach
 mainbus_attach
 config_attach
 cpu_configure
 main

 Disabling acpivideo via ukc makes bsd.mp boot.

 tar of acpidump files attached.

 Note that the NVidia 425M is only recognized because I added that
 to pcidevs.

  Ken

 OpenBSD 4.8-current (GENERIC.MP) #3: Wed Dec 22 12:37:54 EST 2010
 r...@tbay.westerback.ca:/usr/src/sys/arch/amd64/compile/GENERIC.MP
 real mem = 3151962112 (3005MB)
 avail mem = 3054088192 (2912MB)
 User Kernel Config
 UKC disable acpivido\^H \^Hep\^H \^Ho
 351 acpivideo* disabled
 UKC quit
 Continuing...
 mainbus0 at root
 bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xeb6d0 (56 entries)
 bios0: vendor Dell Inc. version A04 date 10/15/2010
 bios0: Dell Inc. XPS L401X
 acpi0 at bios0: rev 3
 acpi0: sleep states S0 S1 S3 S4 S5
 acpi0: tables DSDT FACP APIC SSDT MCFG SLIC HPET OSFR SSDT
 acpi0: wakeup devices P0P1(S3) P0P2(S3) P0P3(S3) P0P4(S3) P0P5(S3) BR20(S3)
EUSB(S4) USB0(S3) USB1(S3) USB2(S3) USB3(S3) USBE(S4) USB4(S3) USB5(S3)
USB6(S3) PEX0(S3) PEX1(S3) PEX2(S3) PEX3(S3) PEX4(S3) PEX5(S3) PEX6(S3)
PEX7(S3) SLPB(S0) LID0(S3)
 acpitimer0 at acpi0: 3579545 Hz, 24 bits
 acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
 cpu0 at mainbus0: apid 0 (boot processor)
 cpu0: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1862.26 MHz
 cpu0:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu0: 256KB 64b/line 8-way L2 cache
 cpu0: apic clock running at 132MHz
 cpu1 at mainbus0: apid 2 (application processor)
 cpu1: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu1:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu1: 256KB 64b/line 8-way L2 cache
 cpu2 at mainbus0: apid 4 (application processor)
 cpu2: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu2:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu2: 256KB 64b/line 8-way L2 cache
 cpu3 at mainbus0: apid 6 (application processor)
 cpu3: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu3:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu3: 256KB 64b/line 8-way L2 cache
 cpu4 at mainbus0: apid 1 (application processor)
 cpu4: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu4:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu4: 256KB 64b/line 8-way L2 cache
 cpu5 at mainbus0: apid 3 (application processor)
 cpu5: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu5:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu5: 256KB 64b/line 8-way L2 cache
 cpu6 at mainbus0: apid 5 (application processor)
 cpu6: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
 cpu6:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS

Re: New acpi challenges! New Dell XPS blows up in acpivideo!

2010-12-22 Thread Jordan Hargrave
Bad AML. Looks like it is trying to do an AML Load of a memory block, and that
is failing.
Usually that's because the checksum is incorrect.  Look at dsdt.c:aml_load()
and put printf's at both goto fails', to see what is failing.

Not much I can do about it now as I am in Palau. :)

-jordan

 Date: Wed, 22 Dec 2010 18:04:06 -0600
 From: sl...@peereboom.us
 To: kwesterb...@rogers.com
 CC: tech@openbsd.org; jor...@openbsd.org; mlar...@openbsd.org;
ma...@openbsd.org; kette...@openbsd.org
 Subject: Re: New acpi challenges! New Dell XPS blows up in acpivideo!

 don't forget to send the amldump

 On Wed, Dec 22, 2010 at 04:08:54PM -0500, Kenneth R Westerback wrote:
  Got a new Dell XPS 401 laptop today and booted amd64 -current bsd.mp
  off of a usb stick. It immediately blew up in acpi. bsd.rd did not
  blow up.
 
  There seems to be a minor (i.e. non ddb causing) issue prior to
  acpivideo:
 
  acpiec0 at acpi0
  acpicpu0 at acpi0acpi0: unable to load \\_PR_.CSDT
  : PSS
  acpicpu1 at acpi0: PSS
 
 
  Hand transcribed:
 
  usual dmesg -- see below
  acpivideo at acpi0: GFX0
  0x801d6788 cnt:01 stk: 00 objref: 0x801c3c08
  index: 0 opcode: Cond Ref
  [\HDOS] 0x801c3c08 cnt: 04 stk: 00 method: 08
  Could not convert 101 to 1
  6a58 Called: \_SB_.PCI0.GFX0._DOS
  arg0: 0x801d1a08 cnt: 01 stk: 00 integer: 4
  6a5c Called: \_SB_.PCI0.GFX0._DOS
  arg0: 0x801d1a08 cnt: 01 stk: 00 integer: 4
  panic: aml_die aml_xconvert:2052
 
  ddb{0} trace
  _aml_die
  aml_xconvert
  aml_xstore
  aml_xparse
  aml_xeval
  aml_evalnode
  acpivideo_set_policy
  acpivideo_attach
  config_attach
  acpi_foundvideo
  aml_found_node
  aml_found_node
  aml_found_node
  aml_found_node
  aml_found_node
  acpi_attach
  config_attach
  bios_attach
  config_attach
  mainbus_attach
  config_attach
  cpu_configure
  main
 
  Disabling acpivideo via ukc makes bsd.mp boot.
 
  tar of acpidump files attached.
 
  Note that the NVidia 425M is only recognized because I added that
  to pcidevs.
 
   Ken
 
  OpenBSD 4.8-current (GENERIC.MP) #3: Wed Dec 22 12:37:54 EST 2010
  r...@tbay.westerback.ca:/usr/src/sys/arch/amd64/compile/GENERIC.MP
  real mem = 3151962112 (3005MB)
  avail mem = 3054088192 (2912MB)
  User Kernel Config
  UKC disable acpivido\^H \^Hep\^H \^Ho
  351 acpivideo* disabled
  UKC quit
  Continuing...
  mainbus0 at root
  bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xeb6d0 (56 entries)
  bios0: vendor Dell Inc. version A04 date 10/15/2010
  bios0: Dell Inc. XPS L401X
  acpi0 at bios0: rev 3
  acpi0: sleep states S0 S1 S3 S4 S5
  acpi0: tables DSDT FACP APIC SSDT MCFG SLIC HPET OSFR SSDT
  acpi0: wakeup devices P0P1(S3) P0P2(S3) P0P3(S3) P0P4(S3) P0P5(S3)
BR20(S3) EUSB(S4) USB0(S3) USB1(S3) USB2(S3) USB3(S3) USBE(S4) USB4(S3)
USB5(S3) USB6(S3) PEX0(S3) PEX1(S3) PEX2(S3) PEX3(S3) PEX4(S3) PEX5(S3)
PEX6(S3) PEX7(S3) SLPB(S0) LID0(S3)
  acpitimer0 at acpi0: 3579545 Hz, 24 bits
  acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
  cpu0 at mainbus0: apid 0 (boot processor)
  cpu0: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1862.26 MHz
  cpu0:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
  cpu0: 256KB 64b/line 8-way L2 cache
  cpu0: apic clock running at 132MHz
  cpu1 at mainbus0: apid 2 (application processor)
  cpu1: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
  cpu1:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
  cpu1: 256KB 64b/line 8-way L2 cache
  cpu2 at mainbus0: apid 4 (application processor)
  cpu2: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
  cpu2:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
  cpu2: 256KB 64b/line 8-way L2 cache
  cpu3 at mainbus0: apid 6 (application processor)
  cpu3: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
  cpu3:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
  cpu3: 256KB 64b/line 8-way L2 cache
  cpu4 at mainbus0: apid 1 (application processor)
  cpu4: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
  cpu4:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,SMX,EST,TM2,S
SSE3,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
  cpu4: 256KB 64b/line 8-way L2 cache
  cpu5 at mainbus0: apid 3 (application processor)
  cpu5: Intel(R) Core(TM) i7 CPU Q 840 @ 1.87GHz, 1861.99 MHz
  cpu5:

ACPI: Early acpiec initialization diff

2010-07-23 Thread Jordan Hargrave
This patch will allow acpiec to initialize earlier if a ECDT table is
found.  This fixes a lockup if booting on some Thinkpads while docked.

You can tell if your system supports ECDT by scanning the ACPI tables
line in dmesg.  There should be a line like this:
acpi0: tables DSDT FACP SSDT ECDT TCPA APIC MCFG HPET SLIC BOOT ASF! SSDT SSDT 
SSDT SSDT

ECDT will be one of the entries if the early initialization is supported.

If scanning dmesg, acpiec0 will now also initialize earlier (near acpitimer
and acpimadt) instead of after acpiprt. 

Index: acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.187
diff -u -p -u -p -b -r1.187 acpi.c
--- acpi.c  22 Jul 2010 14:19:47 -  1.187
+++ acpi.c  23 Jul 2010 19:55:29 -
@@ -2123,6 +2123,10 @@ acpi_foundec(struct aml_node *node, void
if (strcmp(dev, ACPI_DEV_ECD))
return 0;
 
+   /* Check if we're already attached */
+   if (sc-sc_ec  sc-sc_ec-sc_devnode == node-parent)
+   return 0;
+
memset(aaa, 0, sizeof(aaa));
aaa.aaa_iot = sc-sc_iot;
aaa.aaa_memt = sc-sc_memt;
Index: acpiec.c
===
RCS file: /cvs/src/sys/dev/acpi/acpiec.c,v
retrieving revision 1.32
diff -u -p -u -p -b -r1.32 acpiec.c
--- acpiec.c20 Jul 2010 12:15:24 -  1.32
+++ acpiec.c23 Jul 2010 19:55:29 -
@@ -245,6 +245,11 @@ acpiec_match(struct device *parent, void
 {
struct acpi_attach_args *aa = aux;
struct cfdata   *cf = match;
+   struct acpi_ecdt*ecdt = aa-aaa_table;
+
+   /* Check for early ECDT table attach */
+   if (ecdt  !memcmp(ecdt-hdr.signature, ECDT_SIG, sizeof(ECDT_SIG) - 
1))
+   return (1);
 
/* sanity */
return (acpi_matchhids(aa, acpiec_hids, cf-cf_driver-cd_name));
@@ -263,7 +268,6 @@ acpiec_attach(struct device *parent, str
printf(: Only single EC is supported\n);
return;
}
-   sc-sc_acpi-sc_ec = sc;
 
if (acpiec_getcrs(sc, aa)) {
printf(: Failed to read resource settings\n);
@@ -275,6 +279,7 @@ acpiec_attach(struct device *parent, str
return;
}
 
+   sc-sc_acpi-sc_ec = sc;
acpiec_get_events(sc);
 
dnprintf(10, %s: GPE: %d\n, DEVNAME(sc), sc-sc_gpe);
@@ -384,6 +389,24 @@ acpiec_getcrs(struct acpiec_softc *sc, s
char*buf;
int size, ret;
int64_t gpe;
+   struct acpi_ecdt*ecdt = aa-aaa_table;
+   extern struct aml_node   aml_root;
+
+   /* Check if this is ECDT initialization */
+   if (ecdt) {
+   /* Get GPE, Data and Control segments */
+   sc-sc_gpe = ecdt-gpe_bit;
+
+   type1 = ecdt-ec_control.address_space_id;
+   ec_sc = ecdt-ec_control.address;
+
+   type2 = ecdt-ec_data.address_space_id;
+   ec_data = ecdt-ec_data.address;
+
+   /* Get devnode from header */
+   sc-sc_devnode = aml_searchname(aml_root, ecdt-ec_id);
+   goto ecdtdone;
+   }
 
if (aml_evalinteger(sc-sc_acpi, sc-sc_devnode, _GPE, 0, NULL, 
gpe)) {
dnprintf(10, %s: no _GPE\n, DEVNAME(sc));
@@ -409,7 +432,7 @@ acpiec_getcrs(struct acpiec_softc *sc, s
size = res.length;
buf = res.v_buffer;
 
-   ret = acpiec_getregister(buf, size, type1, ec_data);
+   ret = acpiec_getregister(buf, size, type2, ec_data);
if (ret = 0) {
dnprintf(10, %s: failed to read DATA from _CRS\n,
DEVNAME(sc));
@@ -420,7 +443,7 @@ acpiec_getcrs(struct acpiec_softc *sc, s
buf += ret;
size -= ret;
 
-   ret = acpiec_getregister(buf, size, type2,  ec_sc);
+   ret = acpiec_getregister(buf, size, type1,  ec_sc);
if (ret = 0) {
dnprintf(10, %s: failed to read S/C from _CRS\n,
DEVNAME(sc));
@@ -439,6 +462,7 @@ acpiec_getcrs(struct acpiec_softc *sc, s
aml_freevalue(res);
 
/* XXX: todo - validate _CRS checksum? */
+ecdtdone:
 
dnprintf(10, %s: Data: 0x%x, S/C: 0x%x\n,
DEVNAME(sc), ec_data, ec_sc);



ACPI: (redux) Early acpiec initialization diff

2010-07-23 Thread Jordan Hargrave
Redux: this new version will apply with -current

This patch will allow acpiec to initialize earlier if a ECDT table is
found.  This fixes a lockup if booting on some Thinkpads while docked.
 
You can tell if your system supports ECDT by scanning the ACPI tables
line in dmesg.  There should be a line like this:
acpi0: tables DSDT FACP SSDT ECDT TCPA APIC MCFG HPET SLIC BOOT ASF! SSDT SSDT 
SSDT SSDT
 
ECDT will be one of the entries if the early initialization is supported.
 
If scanning dmesg, acpiec0 will now also initialize earlier (near acpitimer
and acpimadt) instead of after acpiprt. 

Index: acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.187
diff -u -p -u -p -b -r1.187 acpi.c
--- acpi.c  22 Jul 2010 14:19:47 -  1.187
+++ acpi.c  24 Jul 2010 05:52:03 -
@@ -2123,6 +2123,10 @@ acpi_foundec(struct aml_node *node, void
if (strcmp(dev, ACPI_DEV_ECD))
return 0;
 
+   /* Check if we're already attached */
+   if (sc-sc_ec  sc-sc_ec-sc_devnode == node-parent)
+   return 0;
+
memset(aaa, 0, sizeof(aaa));
aaa.aaa_iot = sc-sc_iot;
aaa.aaa_memt = sc-sc_memt;
Index: acpiec.c
===
RCS file: /cvs/src/sys/dev/acpi/acpiec.c,v
retrieving revision 1.34
diff -u -p -u -p -b -r1.34 acpiec.c
--- acpiec.c23 Jul 2010 20:21:58 -  1.34
+++ acpiec.c24 Jul 2010 05:52:04 -
@@ -245,6 +245,11 @@ acpiec_match(struct device *parent, void
 {
struct acpi_attach_args *aa = aux;
struct cfdata   *cf = match;
+   struct acpi_ecdt*ecdt = aa-aaa_table;
+
+   /* Check for early ECDT table attach */
+   if (ecdt  !memcmp(ecdt-hdr.signature, ECDT_SIG, sizeof(ECDT_SIG) - 
1))
+   return (1);
 
/* sanity */
return (acpi_matchhids(aa, acpiec_hids, cf-cf_driver-cd_name));
@@ -384,6 +389,25 @@ acpiec_getcrs(struct acpiec_softc *sc, s
char*buf;
int size, ret;
int64_t gpe;
+   struct acpi_ecdt*ecdt = aa-aaa_table;
+   extern struct aml_node   aml_root;
+
+   /* Check if this is ECDT initialization */
+   if (ecdt) {
+   /* Get GPE, Data and Control segments */
+   sc-sc_gpe = ecdt-gpe_bit;
+
+   ctype = ecdt-ec_control.address_space_id;
+   ec_sc = ecdt-ec_control.address;
+
+   dtype = ecdt-ec_data.address_space_id;
+   ec_data = ecdt-ec_data.address;
+
+   /* Get devnode from header */
+   sc-sc_devnode = aml_searchname(aml_root, ecdt-ec_id);
+
+   goto ecdtdone;
+   }
 
if (aml_evalinteger(sc-sc_acpi, sc-sc_devnode, _GPE, 0, NULL, 
gpe)) {
dnprintf(10, %s: no _GPE\n, DEVNAME(sc));
@@ -439,6 +463,7 @@ acpiec_getcrs(struct acpiec_softc *sc, s
aml_freevalue(res);
 
/* XXX: todo - validate _CRS checksum? */
+ecdtdone:
 
dnprintf(10, %s: Data: 0x%x, S/C: 0x%x\n,
DEVNAME(sc), ec_data, ec_sc);



ACPI Name Search diff for Thinkpad, etc

2010-07-22 Thread Jordan Hargrave
This patch is needed on some Thinkpads when searching 'short' name
paths (\_SB.PCI0. instead of \_SB_.PCI0.xxx)

Please test and report.

Index: dsdt.c
===
RCS file: /cvs/src/sys/dev/acpi/dsdt.c,v
retrieving revision 1.172
diff -u -p -u -p -b -r1.172 dsdt.c
--- dsdt.c  22 Jul 2010 14:19:47 -  1.172
+++ dsdt.c  22 Jul 2010 17:05:39 -
@@ -4101,6 +4101,8 @@ struct aml_node *
 aml_searchname(struct aml_node *root, const void *vname)
 {
char *name = (char *)vname;
+   char  nseg[5];
+   int   i;
 
dnprintf(25,Searchname: %s:%s = , aml_nodename(root), vname);
if (*name == AMLOP_ROOTCHAR) {
@@ -4108,8 +4110,13 @@ aml_searchname(struct aml_node *root, co
name++;
}
while (*name != 0) {
-   root = __aml_search(root, name, 0);
-   name += (name[4] == '.') ? 5 : 4;
+   /* Ugh.. we can have short names here: append '_' */
+   strlcpy(nseg, , sizeof(nseg));
+   for (i=0; i  4  *name  *name != '.'; i++)
+   nseg[i] = *name++;
+   if (*name == '.')
+   name++;
+   root = __aml_search(root, nseg, 0);
}
dnprintf(25,%p %s\n, root, aml_nodename(root));
return root;



Re: ACPI Name Search diff for Thinkpad, etc

2010-07-22 Thread Jordan Hargrave
If there's no delta in dmesg, then it's good.

 Date: Thu, 22 Jul 2010 20:43:43 +0200
 From: dawed...@gmx.de
 To: jor...@openbsd.org
 Subject: Re: ACPI Name Search diff for Thinkpad, etc

 On Thu, 22 Jul 2010 11:10:27 -0600 (MDT)
 Jordan Hargrave jor...@cvs.openbsd.org wrote:

  This patch is needed on some Thinkpads when searching 'short' name
  paths (\_SB.PCI0. instead of \_SB_.PCI0.xxx)
 
  Please test and report.

 There doesn't seem to be any regression on my T410i.
 Is there something special we should test?

 OpenBSD 4.7-current (GENERIC.MP) #0: Thu Jul 22 19:43:31 CEST 2010
 r...@padtree.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP
 real mem = 1998045184 (1905MB)
 avail mem = 1931022336 (1841MB)
 mainbus0 at root
 bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xe0010 (78 entries)
 bios0: vendor LENOVO version 6IET65WW (1.25 ) date 06/07/2010
 bios0: LENOVO 25184QG
 acpi0 at bios0: rev 2
 acpi0: tables DSDT FACP SSDT ECDT APIC MCFG HPET ASF! SLIC BOOT SSDT TCPA
SSDT SSDT SSDT
 acpi0: wakeup devices LID_(S3) SLPB(S3) UART(S3) IGBE(S4) EXP1(S4) EXP2(S4)
EXP3(S4) EXP4(S4) EXP5(S4) EHC1(S3) EHC2(S3) HDEF(S4)
 acpitimer0 at acpi0: 3579545 Hz, 24 bits
 acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
 cpu0 at mainbus0: apid 0 (boot processor)
 cpu0: Intel(R) Core(TM) i5 CPU M 430 @ 2.27GHz, 2261.34 MHz
 cpu0:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3
,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu0: 256KB 64b/line 8-way L2 cache
 cpu0: apic clock running at 133MHz
 cpu1 at mainbus0: apid 1 (application processor)
 cpu1: Intel(R) Core(TM) i5 CPU M 430 @ 2.27GHz, 2261.00 MHz
 cpu1:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3
,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu1: 256KB 64b/line 8-way L2 cache
 cpu2 at mainbus0: apid 4 (application processor)
 cpu2: Intel(R) Core(TM) i5 CPU M 430 @ 2.27GHz, 2261.00 MHz
 cpu2:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3
,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu2: 256KB 64b/line 8-way L2 cache
 cpu3 at mainbus0: apid 5 (application processor)
 cpu3: Intel(R) Core(TM) i5 CPU M 430 @ 2.27GHz, 2261.00 MHz
 cpu3:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUS
H,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3
,CX16,xTPR,PDCM,SSE4.1,SSE4.2,POPCNT,NXE,LONG
 cpu3: 256KB 64b/line 8-way L2 cache
 ioapic0 at mainbus0: apid 1 pa 0xfec0, version 20, 24 pins
 ioapic0: misconfigured as apic 2, remapped to apid 1
 acpihpet0 at acpi0: 14318179 Hz
 acpiprt0 at acpi0: bus 0 (PCI0)
 acpiprt1 at acpi0: bus -1 (PEG_)
 acpiprt2 at acpi0: bus 2 (EXP1)
 acpiprt3 at acpi0: bus 3 (EXP2)
 acpiprt4 at acpi0: bus -1 (EXP3)
 acpiprt5 at acpi0: bus 5 (EXP4)
 acpiprt6 at acpi0: bus 13 (EXP5)
 acpiec0 at acpi0
 acpicpu0 at acpi0: C3, C1, PSS
 acpicpu1 at acpi0: C3, C1, PSS
 acpicpu2 at acpi0: C3, C1, PSS
 acpicpu3 at acpi0: C3, C1, PSS
 acpipwrres0 at acpi0: PUBS
 acpitz0 at acpi0: critical temperature 100 degC
 acpibtn0 at acpi0: LID_
 acpibtn1 at acpi0: SLPB
 acpibat0 at acpi0: BAT0 not present
 acpibat1 at acpi0: BAT1 not present
 acpiac0 at acpi0: AC unit online
 acpithinkpad0 at acpi0
 cpu0: Enhanced SpeedStep 2261 MHz: speeds: 2267, 2266, 2133, 1999, 1866,
1733, 1599, 1466, 1333, 1199 MHz
 pci0 at mainbus0 bus 0
 pchb0 at pci0 dev 0 function 0 vendor Intel, unknown product 0x0044 rev
0x02
 vga1 at pci0 dev 2 function 0 Intel Mobile HD graphics rev 0x02
 wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
 wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
 intagp0 at vga1
 agp0 at intagp0: aperture at 0xd000, size 0x1000
 inteldrm0 at vga1: apic 1 int 16 (irq 11)
 drm0 at inteldrm0
 Intel 3400 MEI rev 0x06 at pci0 dev 22 function 0 not configured
 em0 at pci0 dev 25 function 0 Intel 82577LM rev 0x06: apic 1 int 20 (irq
11), address 00:26:2d:fb:c7:02
 ehci0 at pci0 dev 26 function 0 Intel 3400 USB rev 0x06: apic 1 int 23
(irq 11)
 usb0 at ehci0: USB revision 2.0
 uhub0 at usb0 Intel EHCI root hub rev 2.00/1.00 addr 1
 azalia0 at pci0 dev 27 function 0 Intel 3400 HD Audio rev 0x06: apic 1 int
17 (irq 11)
 azalia0: codecs: Conexant/0x5069, Intel/0x2804, using Conexant/0x5069
 audio0 at azalia0
 ppb0 at pci0 dev 28 function 0 Intel 3400 PCIE rev 0x06: apic 1 int 20
(irq 11)
 pci1 at ppb0 bus 2
 ppb1 at pci0 dev 28 function 1 Intel 3400 PCIE rev 0x06: apic 1 int 21
(irq 11)
 pci2 at ppb1 bus 3
 iwn0 at pci2 dev 0 function 0 Intel WiFi Link 1000 rev 0x00: apic 1 int 17
(irq 11), MIMO 1T2R, BGS, address 00:26:c7:31:15:06
 ppb2 at pci0 dev 28 function 3 Intel 3400 PCIE rev 0x06: apic 1 int 23
(irq 11)
 pci3 at ppb2 bus 5
 ppb3 at pci0 dev 28 function 4 Intel 3400

Test: ACPI PCI _PRT bus fix

2010-07-09 Thread Jordan Hargrave
This diff fixes a panic seen on Dell PEx9xx servers with the new ACPI PCI 
mapping.
The _INI code was resetting the _ADR to 0x on some systems if the PCI 
bus
does not exist.  This caused the pci_make_tag to panic as dev/fn were 0x.

The second change is in acpiprt.. a panic was put in place to detect mismatch
between the old and new methods of determining the _PRT bus.  I noticed on the
PEx9xx that the old code is getting an incorrect bus # (0) when it should be -1.

Please test this on server platforms (Dell Rxxx, Txxx) and report dmesg if you 
see 'bus mismatch'


acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus 4 (PEX2)
acpiprt2 at acpi0: bus 5 (UPST)
acpiprt3 at acpi0: bus 6 (DWN1)
acpiprt4 at acpi0: bus 8 (DWN2)
acpiprt5 at acpi0: bus 1 (PEX3)
acpiprt6 at acpi0: bus 0 (PE2P)\\_SB_.PCI0.PEX3.PE2P._PRT: bus mismatch, new:-1 
old:0
acpiprt7 at acpi0: bus 10 (PEX4)
acpiprt8 at acpi0: bus 12 (PEX6)
acpiprt9 at acpi0: bus 13 (PXHA)
acpiprt10 at acpi0: bus 14 (PXHB)
acpiprt11 at acpi0: bus 2 (SBEX)
acpiprt12 at acpi0: bus 16 (COMP)

Index: acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.174
diff -u -p -u -p -b -r1.174 acpi.c
--- acpi.c  9 Jul 2010 12:27:02 -   1.174
+++ acpi.c  9 Jul 2010 20:02:27 -
@@ -606,6 +606,10 @@ acpi_getpci(struct aml_node *node, void 
aml_nodename(node));
 
/* Check if PCI device exists */
+   if (pci-dev  0x1F || pci-fun  7) {
+   free(pci, M_DEVBUF);
+   return (1);
+   }
tag = pci_make_tag(pc, pci-bus, pci-dev, pci-fun);
reg = pci_conf_read(pc, tag, PCI_ID_REG);
if (PCI_VENDOR(reg) == PCI_VENDOR_INVALID) {
Index: acpiprt.c
===
RCS file: /cvs/src/sys/dev/acpi/acpiprt.c,v
retrieving revision 1.39
diff -u -p -u -p -b -r1.39 acpiprt.c
--- acpiprt.c   8 Jul 2010 20:56:31 -   1.39
+++ acpiprt.c   9 Jul 2010 19:48:13 -
@@ -114,7 +114,7 @@ acpiprt_attach(struct device *parent, st
printf(%s: bus mismatch, new:%d old:%d\n,
aml_nodename(sc-sc_devnode),
nbus, sc-sc_bus);
-   panic(aiiiee..);
+   sc-sc_bus = nbus;
}
 
if (aml_evalnode(sc-sc_acpi, sc-sc_devnode, 0, NULL, res)) {



ACPI PCI Mapping diff

2010-07-01 Thread Jordan Hargrave

This diff will attempt to match up ACPI PCI devices with their BDF.
This will replace code currently used in acpiprt, but need to test this on 
many machines to make sure the bus numbers match.


Code will panic if bus numbers do not match, please report dmesg if you 
see a panic, along with pcidump -vv output on booted kernel.


Index: acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.168
diff -u -p -u -p -b -r1.168 acpi.c
--- acpi.c  1 Jul 2010 06:29:32 -   1.168
+++ acpi.c  1 Jul 2010 06:56:15 -
@@ -1,4 +1,4 @@
-/* $OpenBSD: acpi.c,v 1.168 2010/07/01 06:29:32 jordan Exp $ */
+/* $OpenBSD: acpi.c,v 1.167 2010/07/01 01:39:39 jordan Exp $ */
 /*
  * Copyright (c) 2005 Thorsten Lockert th...@sigmasoft.com
  * Copyright (c) 2005 Jordan Hargrave jor...@openbsd.org
@@ -18,6 +18,7 @@

 #include sys/param.h
 #include sys/systm.h
+#include sys/buf.h
 #include sys/device.h
 #include sys/malloc.h
 #include sys/fcntl.h
@@ -41,6 +42,10 @@
 #include dev/acpi/dsdt.h
 #include dev/wscons/wsdisplayvar.h

+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/ppbreg.h
+
 #include dev/pci/pciidereg.h
 #include dev/pci/pciidevar.h

@@ -66,6 +71,8 @@ int acpi_saved_spl;
 void   acpi_isr_thread(void *);
 void   acpi_create_thread(void *);

+void   acpi_pci_match(struct device *, struct pci_attach_args *);
+
 intacpi_match(struct device *, void *, void *);
 void   acpi_attach(struct device *, struct device *, void *);
 intacpi_submatch(struct device *, void *, void *);
@@ -94,12 +101,15 @@ int acpi_foundide(struct aml_node *node,
 int acpiide_notify(struct aml_node *, int, void *);

 int_acpi_matchhids(const char *, const char *[]);
+intacpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+   const char *driver);
+
+struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *,
+   const char *, const char *, int);

 void  wdcattach(struct channel_softc *);
 int   wdcdetach(struct channel_softc *, int);

-struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *, const 
char *, const char *, int);
-
 struct idechnl
 {
struct acpi_softc *sc;
@@ -492,6 +502,150 @@ acpi_match(struct device *parent, void *
return (1);
 }

+TAILQ_HEAD(, acpi_pci) acpi_pcidevs =
+TAILQ_HEAD_INITIALIZER(acpi_pcidevs);
+
+int acpi_getpci(struct aml_node *node, void *arg);
+int acpi_getminbus(union acpi_resource *crs, void *arg);
+
+int
+acpi_getminbus(union acpi_resource *crs, void *arg)
+{
+   int *bbn = arg;
+   int typ = AML_CRSTYPE(crs);
+
+   /* Check for embedded bus number */
+   if (typ == LR_WORD  crs-lr_word.type == 2)
+   *bbn = crs-lr_word._min;
+   return 0;
+}
+
+int
+_acpi_matchhids(const char *hid, const char *hids[])
+{
+   int i;
+
+	for (i = 0; hids[i]; i++) 
+		if (!strcmp(hid, hids[i]))

+   return (1);
+   return (0);
+}
+
+int
+acpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+const char *driver)
+{
+
+   if (aa-aaa_dev == NULL || aa-aaa_node == NULL)
+   return (0);
+   if (_acpi_matchhids(aa-aaa_dev, hids)) {
+   dnprintf(5, driver %s matches %s\n, driver, hids[i]);
+   return (1);
+   }
+   return (0);
+}
+
+/* Map ACPI device node to PCI */
+int
+acpi_getpci(struct aml_node *node, void *arg)
+{
+   const char *pcihid[] = { ACPI_DEV_PCIB, ACPI_DEV_PCIEB, HWP0002, 0 };
+   struct acpi_pci *pci, *ppci;
+   struct aml_value res;
+   struct acpi_softc *sc = arg;
+   pci_chipset_tag_t pc = NULL;
+   pcitag_t tag;
+   uint64_t val;
+   uint32_t reg;
+
+   if (!node-value || node-value-type != AML_OBJTYPE_DEVICE)
+   return 0;
+   if (!aml_evalhid(node, res)) {
+   /* Check if this is a PCI Root node */
+   if (_acpi_matchhids(res.v_string, pcihid)) {
+   aml_freevalue(res);
+
+   pci = malloc(sizeof(*pci), M_DEVBUF, M_WAITOK|M_ZERO);
+
+   if (!aml_evalinteger(sc, node, _SEG, 0, NULL, val))
+   pci-seg = val;
+   if (!aml_evalinteger(sc, node, _BBN, 0, NULL, val))
+   pci-bus = val;
+   else if (!aml_evalname(sc, node, _CRS, 0, NULL, 
res)) {
+   aml_parse_resource(res.length, res.v_buffer,
+   acpi_getminbus, pci-bus);
+   }
+   pci-sub = pci-bus;
+   node-pci = pci;
+			printf(found PCI root: %s %d\n, 
+			aml_nodename(node), pci-bus);

+   }
+   aml_freevalue(res);
+   return 0;
+   }
+
+   /* If parent is not PCI, or device does not have _ADR, return */
+   if (!node-parent || (ppci = node

ACPI PCI mapping revert diff

2010-07-01 Thread Jordan Hargrave
So found the problem; on the R210 the AML code CHANGES the _HID 
for the PCI Root Bus depending 
on the _OSI OS running.. UGH


I'd had code in dsdt.c for ages that converted the _HID integer value to 
its PNP-string equivalent at create time.   However with the dynamic _HID 
changing code in the AML, the store tried to convert an integer value to a 
string, eg. storing integer HID 0x12345 became 12345 instead 
of PNP0A03.


I took out the default _HID conversion code in dsdt.c and reverted back to 
the original code, this does work on the R210 but would like to test on 
other systems as well.


The old acpiprt code worked because it searched for ANY _HID value.. the
new code explicitly looks for PNP0A03 or PNP0A08.

@tech, please test this diff and report any issues with panic

Index: acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.168
diff -u -p -u -p -r1.168 acpi.c
--- acpi.c  1 Jul 2010 06:29:32 -   1.168
+++ acpi.c  1 Jul 2010 09:02:54 -
@@ -1,4 +1,4 @@
-/* $OpenBSD: acpi.c,v 1.168 2010/07/01 06:29:32 jordan Exp $ */
+/* $OpenBSD: acpi.c,v 1.167 2010/07/01 01:39:39 jordan Exp $ */
 /*
  * Copyright (c) 2005 Thorsten Lockert th...@sigmasoft.com
  * Copyright (c) 2005 Jordan Hargrave jor...@openbsd.org
@@ -18,6 +18,7 @@

 #include sys/param.h
 #include sys/systm.h
+#include sys/buf.h
 #include sys/device.h
 #include sys/malloc.h
 #include sys/fcntl.h
@@ -41,6 +42,10 @@
 #include dev/acpi/dsdt.h
 #include dev/wscons/wsdisplayvar.h

+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/ppbreg.h
+
 #include dev/pci/pciidereg.h
 #include dev/pci/pciidevar.h

@@ -66,6 +71,8 @@ int acpi_saved_spl;
 void   acpi_isr_thread(void *);
 void   acpi_create_thread(void *);

+void   acpi_pci_match(struct device *, struct pci_attach_args *);
+
 intacpi_match(struct device *, void *, void *);
 void   acpi_attach(struct device *, struct device *, void *);
 intacpi_submatch(struct device *, void *, void *);
@@ -94,12 +101,15 @@ int acpi_foundide(struct aml_node *node,
 int acpiide_notify(struct aml_node *, int, void *);

 int_acpi_matchhids(const char *, const char *[]);
+intacpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+   const char *driver);
+
+struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *,
+   const char *, const char *, int);

 void  wdcattach(struct channel_softc *);
 int   wdcdetach(struct channel_softc *, int);

-struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *, const 
char *, const char *, int);
-
 struct idechnl
 {
struct acpi_softc *sc;
@@ -492,6 +502,150 @@ acpi_match(struct device *parent, void *
return (1);
 }

+TAILQ_HEAD(, acpi_pci) acpi_pcidevs =
+TAILQ_HEAD_INITIALIZER(acpi_pcidevs);
+
+int acpi_getpci(struct aml_node *node, void *arg);
+int acpi_getminbus(union acpi_resource *crs, void *arg);
+
+int
+acpi_getminbus(union acpi_resource *crs, void *arg)
+{
+   int *bbn = arg;
+   int typ = AML_CRSTYPE(crs);
+
+   /* Check for embedded bus number */
+   if (typ == LR_WORD  crs-lr_word.type == 2)
+   *bbn = crs-lr_word._min;
+   return 0;
+}
+
+int
+_acpi_matchhids(const char *hid, const char *hids[])
+{
+   int i;
+
+	for (i = 0; hids[i]; i++) 
+		if (!strcmp(hid, hids[i]))

+   return (1);
+   return (0);
+}
+
+int
+acpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+const char *driver)
+{
+
+   if (aa-aaa_dev == NULL || aa-aaa_node == NULL)
+   return (0);
+   if (_acpi_matchhids(aa-aaa_dev, hids)) {
+   dnprintf(5, driver %s matches %s\n, driver, hids[i]);
+   return (1);
+   }
+   return (0);
+}
+
+/* Map ACPI device node to PCI */
+int
+acpi_getpci(struct aml_node *node, void *arg)
+{
+   const char *pcihid[] = { ACPI_DEV_PCIB, ACPI_DEV_PCIEB, HWP0002, 0 };
+   struct acpi_pci *pci, *ppci;
+   struct aml_value res;
+   struct acpi_softc *sc = arg;
+   pci_chipset_tag_t pc = NULL;
+   pcitag_t tag;
+   uint64_t val;
+   uint32_t reg;
+
+   if (!node-value || node-value-type != AML_OBJTYPE_DEVICE)
+   return 0;
+   if (!aml_evalhid(node, res)) {
+   /* Check if this is a PCI Root node */
+   if (_acpi_matchhids(res.v_string, pcihid)) {
+   aml_freevalue(res);
+
+   pci = malloc(sizeof(*pci), M_DEVBUF, M_WAITOK|M_ZERO);
+
+   if (!aml_evalinteger(sc, node, _SEG, 0, NULL, val))
+   pci-seg = val;
+   if (!aml_evalinteger(sc, node, _BBN, 0, NULL, val))
+   pci-bus = val;
+   else if (!aml_evalname(sc, node, _CRS, 0, NULL, 
res)) {
+aml_parse_resource(res, acpi_getminbus, 
+pci-bus

ACPI panic check, please test

2010-07-01 Thread Jordan Hargrave

This is the latest ACPI pci mapping revision diff, please test this and report 
if your system generates a panic.
Looking to test mainly on Dell PE or Rxxx systems, but also any 
server-class hardware (HP, etc).

If you see a panic, please send the files generated by acpidump -o system and pcidump 
-vv  system.pci
Also interested in successful dmesg.

Index: arch/i386/pci/pci_machdep.c
===
RCS file: /cvs/src/sys/arch/i386/pci/pci_machdep.c,v
retrieving revision 1.52
diff -u -p -u -p -b -r1.52 pci_machdep.c
--- arch/i386/pci/pci_machdep.c 1 Jul 2010 06:29:32 -   1.52
+++ arch/i386/pci/pci_machdep.c 1 Jul 2010 18:36:00 -
@@ -667,6 +667,6 @@ void
 pci_dev_postattach(struct device *dev, struct pci_attach_args *pa)
 {
 #if NACPI  0
-   //acpi_pci_match(dev, pa);
+   acpi_pci_match(dev, pa);
 #endif
 }
Index: arch/amd64/pci/pci_machdep.c
===
RCS file: /cvs/src/sys/arch/amd64/pci/pci_machdep.c,v
retrieving revision 1.34
diff -u -p -u -p -b -r1.34 pci_machdep.c
--- arch/amd64/pci/pci_machdep.c1 Jul 2010 06:29:32 -   1.34
+++ arch/amd64/pci/pci_machdep.c1 Jul 2010 18:36:00 -
@@ -428,6 +428,6 @@ void
 pci_dev_postattach(struct device *dev, struct pci_attach_args *pa)
 {
 #if NACPI  0
-   //acpi_pci_match(dev, pa);
+   acpi_pci_match(dev, pa);
 #endif
 }
Index: dev/acpi/acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.169
diff -u -p -u -p -b -r1.169 acpi.c
--- dev/acpi/acpi.c 1 Jul 2010 16:23:46 -   1.169
+++ dev/acpi/acpi.c 1 Jul 2010 18:36:00 -
@@ -1,4 +1,4 @@
-/* $OpenBSD: acpi.c,v 1.169 2010/07/01 16:23:46 thib Exp $ */
+/* $OpenBSD: acpi.c,v 1.167 2010/07/01 01:39:39 jordan Exp $ */
 /*
  * Copyright (c) 2005 Thorsten Lockert th...@sigmasoft.com
  * Copyright (c) 2005 Jordan Hargrave jor...@openbsd.org
@@ -18,7 +18,6 @@

 #include sys/param.h
 #include sys/systm.h
-#include sys/buf.h
 #include sys/device.h
 #include sys/malloc.h
 #include sys/fcntl.h
@@ -42,6 +41,10 @@
 #include dev/acpi/dsdt.h
 #include dev/wscons/wsdisplayvar.h

+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/ppbreg.h
+
 #include dev/pci/pciidereg.h
 #include dev/pci/pciidevar.h

@@ -67,6 +70,8 @@ int acpi_saved_spl;
 void   acpi_isr_thread(void *);
 void   acpi_create_thread(void *);

+void   acpi_pci_match(struct device *, struct pci_attach_args *);
+
 intacpi_match(struct device *, void *, void *);
 void   acpi_attach(struct device *, struct device *, void *);
 intacpi_submatch(struct device *, void *, void *);
@@ -95,12 +100,15 @@ int acpi_foundide(struct aml_node *node,
 int acpiide_notify(struct aml_node *, int, void *);

 int_acpi_matchhids(const char *, const char *[]);
+intacpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+   const char *driver);
+
+struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *,
+   const char *, const char *, int);

 void  wdcattach(struct channel_softc *);
 int   wdcdetach(struct channel_softc *, int);

-struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *, const 
char *, const char *, int);
-
 struct idechnl
 {
struct acpi_softc *sc;
@@ -493,6 +501,150 @@ acpi_match(struct device *parent, void *
return (1);
 }

+TAILQ_HEAD(, acpi_pci) acpi_pcidevs =
+TAILQ_HEAD_INITIALIZER(acpi_pcidevs);
+
+int acpi_getpci(struct aml_node *node, void *arg);
+int acpi_getminbus(union acpi_resource *crs, void *arg);
+
+int
+acpi_getminbus(union acpi_resource *crs, void *arg)
+{
+   int *bbn = arg;
+   int typ = AML_CRSTYPE(crs);
+
+   /* Check for embedded bus number */
+   if (typ == LR_WORD  crs-lr_word.type == 2)
+   *bbn = crs-lr_word._min;
+   return 0;
+}
+
+int
+_acpi_matchhids(const char *hid, const char *hids[])
+{
+   int i;
+
+	for (i = 0; hids[i]; i++) 
+		if (!strcmp(hid, hids[i]))

+   return (1);
+   return (0);
+}
+
+int
+acpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+const char *driver)
+{
+
+   if (aa-aaa_dev == NULL || aa-aaa_node == NULL)
+   return (0);
+   if (_acpi_matchhids(aa-aaa_dev, hids)) {
+   dnprintf(5, driver %s matches %s\n, driver, hids[i]);
+   return (1);
+   }
+   return (0);
+}
+
+/* Map ACPI device node to PCI */
+int
+acpi_getpci(struct aml_node *node, void *arg)
+{
+   const char *pcihid[] = { ACPI_DEV_PCIB, ACPI_DEV_PCIEB, HWP0002, 0 };
+   struct acpi_pci *pci, *ppci;
+   struct aml_value res;
+   struct acpi_softc *sc = arg;
+   pci_chipset_tag_t pc = NULL;
+   pcitag_t tag;
+   uint64_t val;
+   uint32_t reg;
+
+   if (!node-value || node-value-type != AML_OBJTYPE_DEVICE)
+   return 0

[resend] Please test this ACPI panic check diff

2010-07-01 Thread Jordan Hargrave
Index: arch/i386/pci/pci_machdep.c
===
RCS file: /cvs/src/sys/arch/i386/pci/pci_machdep.c,v
retrieving revision 1.52
diff -u -p -u -p -b -r1.52 pci_machdep.c
--- arch/i386/pci/pci_machdep.c 1 Jul 2010 06:29:32 -   1.52
+++ arch/i386/pci/pci_machdep.c 1 Jul 2010 18:36:00 -
@@ -667,6 +667,6 @@ void
 pci_dev_postattach(struct device *dev, struct pci_attach_args *pa)
 {
 #if NACPI  0
-   //acpi_pci_match(dev, pa);
+   acpi_pci_match(dev, pa);
 #endif
 }
Index: arch/amd64/pci/pci_machdep.c
===
RCS file: /cvs/src/sys/arch/amd64/pci/pci_machdep.c,v
retrieving revision 1.34
diff -u -p -u -p -b -r1.34 pci_machdep.c
--- arch/amd64/pci/pci_machdep.c1 Jul 2010 06:29:32 -   1.34
+++ arch/amd64/pci/pci_machdep.c1 Jul 2010 18:36:00 -
@@ -428,6 +428,6 @@ void
 pci_dev_postattach(struct device *dev, struct pci_attach_args *pa)
 {
 #if NACPI  0
-   //acpi_pci_match(dev, pa);
+   acpi_pci_match(dev, pa);
 #endif
 }
Index: dev/acpi/acpi.c
===
RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
retrieving revision 1.169
diff -u -p -u -p -b -r1.169 acpi.c
--- dev/acpi/acpi.c 1 Jul 2010 16:23:46 -   1.169
+++ dev/acpi/acpi.c 1 Jul 2010 18:36:00 -
@@ -1,4 +1,4 @@
-/* $OpenBSD: acpi.c,v 1.169 2010/07/01 16:23:46 thib Exp $ */
+/* $OpenBSD: acpi.c,v 1.167 2010/07/01 01:39:39 jordan Exp $ */
 /*
  * Copyright (c) 2005 Thorsten Lockert th...@sigmasoft.com
  * Copyright (c) 2005 Jordan Hargrave jor...@openbsd.org
@@ -18,7 +18,6 @@
 
 #include sys/param.h
 #include sys/systm.h
-#include sys/buf.h
 #include sys/device.h
 #include sys/malloc.h
 #include sys/fcntl.h
@@ -42,6 +41,10 @@
 #include dev/acpi/dsdt.h
 #include dev/wscons/wsdisplayvar.h
 
+#include dev/pci/pcivar.h
+#include dev/pci/pcidevs.h
+#include dev/pci/ppbreg.h
+
 #include dev/pci/pciidereg.h
 #include dev/pci/pciidevar.h
 
@@ -67,6 +70,8 @@ int acpi_saved_spl;
 void   acpi_isr_thread(void *);
 void   acpi_create_thread(void *);
 
+void   acpi_pci_match(struct device *, struct pci_attach_args *);
+
 intacpi_match(struct device *, void *, void *);
 void   acpi_attach(struct device *, struct device *, void *);
 intacpi_submatch(struct device *, void *, void *);
@@ -95,12 +100,15 @@ int acpi_foundide(struct aml_node *node,
 int acpiide_notify(struct aml_node *, int, void *);
 
 int_acpi_matchhids(const char *, const char *[]);
+intacpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+   const char *driver);
+
+struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *,
+   const char *, const char *, int);
 
 void  wdcattach(struct channel_softc *);
 int   wdcdetach(struct channel_softc *, int);
 
-struct acpi_q *acpi_maptable(struct acpi_softc *, paddr_t, const char *, const 
char *, const char *, int);
-
 struct idechnl
 {
struct acpi_softc *sc;
@@ -493,6 +501,150 @@ acpi_match(struct device *parent, void *
return (1);
 }
 
+TAILQ_HEAD(, acpi_pci) acpi_pcidevs =
+TAILQ_HEAD_INITIALIZER(acpi_pcidevs);
+
+int acpi_getpci(struct aml_node *node, void *arg);
+int acpi_getminbus(union acpi_resource *crs, void *arg);
+
+int
+acpi_getminbus(union acpi_resource *crs, void *arg)
+{
+   int *bbn = arg;
+   int typ = AML_CRSTYPE(crs);
+
+   /* Check for embedded bus number */
+   if (typ == LR_WORD  crs-lr_word.type == 2)
+   *bbn = crs-lr_word._min;
+   return 0;
+}
+
+int
+_acpi_matchhids(const char *hid, const char *hids[])
+{
+   int i;
+
+   for (i = 0; hids[i]; i++) 
+   if (!strcmp(hid, hids[i]))
+   return (1);
+   return (0);
+}
+
+int
+acpi_matchhids(struct acpi_attach_args *aa, const char *hids[],
+const char *driver)
+{
+
+   if (aa-aaa_dev == NULL || aa-aaa_node == NULL)
+   return (0);
+   if (_acpi_matchhids(aa-aaa_dev, hids)) {
+   dnprintf(5, driver %s matches %s\n, driver, hids[i]);
+   return (1);
+   }
+   return (0);
+}
+
+/* Map ACPI device node to PCI */
+int
+acpi_getpci(struct aml_node *node, void *arg)
+{
+   const char *pcihid[] = { ACPI_DEV_PCIB, ACPI_DEV_PCIEB, HWP0002, 0 };
+   struct acpi_pci *pci, *ppci;
+   struct aml_value res;
+   struct acpi_softc *sc = arg;
+   pci_chipset_tag_t pc = NULL;
+   pcitag_t tag;
+   uint64_t val;
+   uint32_t reg;
+
+   if (!node-value || node-value-type != AML_OBJTYPE_DEVICE)
+   return 0;
+   if (!aml_evalhid(node, res)) {
+   /* Check if this is a PCI Root node */
+   if (_acpi_matchhids(res.v_string, pcihid)) {
+   aml_freevalue(res);
+
+   pci = malloc(sizeof(*pci), M_DEVBUF, M_WAITOK|M_ZERO);
+
+   if (!aml_evalinteger(sc

Re: [resend] Please test this ACPI panic check diff

2010-07-01 Thread Jordan Hargrave
yeah. someone checked something in.   just take that out for now, the test
will work fine unless you're suspending


 Date: Thu, 1 Jul 2010 18:16:23 -0400
 Subject: Re: [resend] Please test this ACPI panic check diff
 From: ted.unan...@gmail.com
 To: jor...@cvs.openbsd.org
 CC: jhar...@gmail.com; tech@openbsd.org

 On Thu, Jul 1, 2010 at 2:53 PM, Jordan Hargrave  wrote:
 Index: dev/acpi/acpi.c
 ===
 RCS file: /cvs/src/sys/dev/acpi/acpi.c,v
 retrieving revision 1.169
 diff -u -p -u -p -b -r1.169 acpi.c
 --- dev/acpi/acpi.c 1 Jul 2010 16:23:46 -   1.169
 +++ dev/acpi/acpi.c 1 Jul 2010 18:36:00 -
 @@ -18,7 +18,6 @@

  #include
  #include
 -#include
  #include
  #include
  #include

 This part is wrong, as it won't compile against current with it.

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