com.c: ASIX AX99100(PCIe UART) probed FIFO depth=0 issue

2021-10-15 Thread SASANO Takayoshi
Hi,

At least 6.9 and 7.0 (and -current) sometimes shows a dmesg that:

  puc1 at pci1 dev 0 function 1 "ASIX AX99100" rev 0x00: ports: 16 com
  com5 at puc1 port 0 apic 1 int 1: st16650, 32 byte fifo
  com5: probed fifo depth: 0 bytes

In sys/dev/ic/com.c:com_fifo_probe(), I found that transmitted data to
determine FIFO depth is not received. And, a bit delay is required after
TX/RX FIFO reset.

Simply adding com_read_reg(sc, com_iir) resolves this issue on my PC,
but I think delay(100) may be better like other resetting FIFO.

Here is the diff, any comments will be welcomed.

Index: com.c
===
RCS file: /cvs/src/sys/dev/ic/com.c,v
retrieving revision 1.174
diff -u -p -r1.174 com.c
--- com.c   6 May 2021 20:35:21 -   1.174
+++ com.c   16 Oct 2021 03:05:54 -
@@ -1562,6 +1562,7 @@ com_fifo_probe(struct com_softc *sc)
fifo |= FIFO_ENABLE_64BYTE;
 
com_write_reg(sc, com_fifo, fifo);
+   delay(100);
 
for (len = 0; len < 256; len++) {
com_write_reg(sc, com_data, (len + 1));

-- 
SASANO Takayoshi (JG1UAA) 



puc(4): [WIP] TXIC TX382B UART controller support (2)

2021-05-29 Thread SASANO Takayoshi
Hi,

For long long time, I detached TX382B based UART board and
recently I reinstalled it.

John Kelly's report "TXIC TX382B UART controller support"
(https://marc.info/?l=openbsd-tech=147352668517825) says this controller
sometimes lacks THRE interrupt, I found the symptom.

I did self loopback (connect TX382B's TXD and RXD) test at that time.
This test cannot detect that problem. Connecting with other UART such as
USB-UART can be seen TX-hang of TX382B.

I tried with enabling TX382B's fifo, the problem could be avoided
so this might work as workaround.

Reported LSR related issue is not solved yet because I could not
reproduce the problem (is there any good method?). This is future tasks.


Here is the diff to enable TX382's FIFO.
Sorry for this problem is kept unresolved for long time.

Index: ic/com.c
===
RCS file: /cvs/src/sys/dev/ic/com.c,v
retrieving revision 1.174
diff -u -r1.174 com.c
--- ic/com.c6 May 2021 20:35:21 -   1.174
+++ ic/com.c30 May 2021 00:41:43 -
@@ -1480,6 +1480,11 @@
SET(sc->sc_hwflags, COM_HW_FIFO);
sc->sc_fifolen = 256;
break;
+   case COM_UART_TX382B:
+   printf(": tx382b, 16 byte fifo\n");
+   SET(sc->sc_hwflags, COM_HW_FIFO);
+   sc->sc_fifolen = 16;
+   break;
default:
panic("comattach: bad fifo type");
}
@@ -1487,7 +1492,8 @@
 #ifdef COM_CONSOLE
if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE))
 #endif
-   if (sc->sc_fifolen < 256)
+   if (sc->sc_uarttype != COM_UART_TX382B &&
+   sc->sc_fifolen < 256)
com_fifo_probe(sc);
 
if (sc->sc_fifolen == 0) {
Index: ic/comvar.h
===
RCS file: /cvs/src/sys/dev/ic/comvar.h,v
retrieving revision 1.58
diff -u -r1.58 comvar.h
--- ic/comvar.h 14 Aug 2020 18:14:11 -  1.58
+++ ic/comvar.h 30 May 2021 00:41:43 -
@@ -104,6 +104,7 @@
 #defineCOM_UART_XR168500x10/* 128 byte fifo */
 #defineCOM_UART_OX16C950   0x11/* 128 byte fifo */
 #defineCOM_UART_XR17V35X   0x12/* 256 byte fifo */
+#defineCOM_UART_TX382B 0x13/* 16 byte fifo, no 
loopback */
 
u_char sc_hwflags;
 #defineCOM_HW_NOIEN0x01
Index: pci/pucdata.c
===
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.114
diff -u -r1.114 pucdata.c
--- pci/pucdata.c   19 May 2021 05:28:09 -  1.114
+++ pci/pucdata.c   30 May 2021 00:41:44 -
@@ -2259,8 +2259,8 @@
{   PCI_VENDOR_TXIC, PCI_PRODUCT_TXIC_TX382B,   0, 0},
{   0x, 0x, 0, 0},
{
-   { PUC_PORT_COM, 0x10, 0x },
-   { PUC_PORT_COM, 0x14, 0x },
+   { PUC_PORT_COM_TX382B, 0x10, 0x },
+   { PUC_PORT_COM_TX382B, 0x14, 0x },
}
},
{   /* "ASIX AX99100", */
Index: pci/pucvar.h
===
RCS file: /cvs/src/sys/dev/pci/pucvar.h,v
retrieving revision 1.17
diff -u -r1.17 pucvar.h
--- pci/pucvar.h14 Aug 2020 18:14:11 -  1.17
+++ pci/pucvar.h30 May 2021 00:41:44 -
@@ -61,6 +61,7 @@
PUC_PORT_COM_MUL10,
PUC_PORT_COM_MUL128,
PUC_PORT_COM_XR17V35X,
+   PUC_PORT_COM_TX382B,
} type;
u_int32_t   freq;
 };
@@ -73,6 +74,7 @@
{ PUC_PORT_COM_MUL10,   COM_FREQ * 10   },
{ PUC_PORT_COM_MUL128,  COM_FREQ * 128  },
{ PUC_PORT_COM_XR17V35X, 12500  },
+   { PUC_PORT_COM_TX382B,  COM_FREQ},
 };
 
 #define PUC_IS_LPT(type)   ((type) == PUC_PORT_LPT)
Index: puc/com_puc.c
===
RCS file: /cvs/src/sys/dev/puc/com_puc.c,v
retrieving revision 1.26
diff -u -r1.26 com_puc.c
--- puc/com_puc.c   5 Mar 2021 13:20:19 -   1.26
+++ puc/com_puc.c   30 May 2021 00:41:44 -
@@ -105,8 +105,17 @@
break;
}
 
-   if (pa->type == PUC_PORT_COM_XR17V35X)
+   switch (pa->type) {
+   case PUC_PORT_COM_XR17V35X:
sc->sc_uarttype = COM_UART_XR17V35X;
+   break;
+   case PUC_PORT_COM_TX382B:
+   sc->sc_uarttype = COM_UART_TX382B;
+   break;
+   default:
+   /* do nothing */
+   break;
+   }
 
com_attach_subr(sc);
 }

-- 
SASANO Takayoshi (JG1UAA) 



(re) [PATCH] src/libexec/ftpd: fix nlist with -option does not work

2020-01-11 Thread SASANO Takayoshi
ping

On Mon, 18 Nov 2019 14:56:46 +0900,
SASANO Takayoshi wrote:
> 
> Hello,
> 
> At least OpenBSD-6.5 and 6.6's ftpd does not work NLIST command with any
> -option like this.
> 
> 
> ftp> nlist
> 150 Opening ASCII mode data connection for 'file list'.
> uaa
> _sysupgrade
> 226 Transfer complete.
> ftp> nlist -LF
> 550 -LF: No such file or directory.
> ftp>
> 
> 
> Here is the remedy, ok?
> 
> Index: extern.h
> ===
> RCS file: /cvs/src/libexec/ftpd/extern.h,v
> retrieving revision 1.20
> diff -u -p -r1.20 extern.h
> --- extern.h  8 May 2019 23:56:48 -   1.20
> +++ extern.h  18 Nov 2019 05:48:53 -
> @@ -89,7 +89,7 @@ voidrenamecmd(char *, char *);
>  char   *renamefrom(char *);
>  void reply(int, const char *, ...);
>  void reply_r(int, const char *, ...);
> -enum ret_cmd { RET_FILE, RET_LIST };
> +enum ret_cmd { RET_FILE, RET_LIST, RET_NLIST };
>  void retrieve(enum ret_cmd, char *);
>  void send_file_list(char *);
>  void setproctitle(const char *, ...);
> Index: ftpd.c
> ===
> RCS file: /cvs/src/libexec/ftpd/ftpd.c,v
> retrieving revision 1.228
> diff -u -p -r1.228 ftpd.c
> --- ftpd.c3 Jul 2019 03:24:04 -   1.228
> +++ ftpd.c18 Nov 2019 05:48:53 -
> @@ -1124,7 +1124,10 @@ retrieve(enum ret_cmd cmd, char *name)
>   fin = fopen(name, "r");
>   st.st_size = 0;
>   } else {
> - fin = ftpd_ls("-lgA", name, );
> + if (cmd == RET_NLIST)
> + fin = ftpd_ls(name, ".", );
> + else
> + fin = ftpd_ls("-lgA", name, );
>   st.st_size = -1;
>   st.st_blksize = BUFSIZ;
>   }
> @@ -1166,7 +1169,8 @@ retrieve(enum ret_cmd cmd, char *name)
>   goto done;
>   }
>   }
> - dout = dataconn(name, st.st_size, "w");
> + dout = dataconn((cmd == RET_NLIST) ? "file list" : name,
> + st.st_size, "w");
>   if (dout == NULL)
>   goto done;
>   time();
> @@ -2626,7 +2630,7 @@ send_file_list(char *whichf)
>*/
>   if (dirname[0] == '-' && *dirlist == NULL &&
>   transflag == 0) {
> - retrieve(RET_FILE, dirname);
> + retrieve(RET_NLIST, dirname);
>   goto out;
>   }
>   perror_reply(550, whichf);
> 
> -- 
> SASANO Takayoshi (JG1UAA) 
> 



[PATCH] src/libexec/ftpd: fix nlist with -option does not work

2019-11-17 Thread SASANO Takayoshi
Hello,

At least OpenBSD-6.5 and 6.6's ftpd does not work NLIST command with any
-option like this.


ftp> nlist
150 Opening ASCII mode data connection for 'file list'.
uaa
_sysupgrade
226 Transfer complete.
ftp> nlist -LF
550 -LF: No such file or directory.
ftp>


Here is the remedy, ok?

Index: extern.h
===
RCS file: /cvs/src/libexec/ftpd/extern.h,v
retrieving revision 1.20
diff -u -p -r1.20 extern.h
--- extern.h8 May 2019 23:56:48 -   1.20
+++ extern.h18 Nov 2019 05:48:53 -
@@ -89,7 +89,7 @@ void  renamecmd(char *, char *);
 char   *renamefrom(char *);
 void   reply(int, const char *, ...);
 void   reply_r(int, const char *, ...);
-enum ret_cmd { RET_FILE, RET_LIST };
+enum ret_cmd { RET_FILE, RET_LIST, RET_NLIST };
 void   retrieve(enum ret_cmd, char *);
 void   send_file_list(char *);
 void   setproctitle(const char *, ...);
Index: ftpd.c
===
RCS file: /cvs/src/libexec/ftpd/ftpd.c,v
retrieving revision 1.228
diff -u -p -r1.228 ftpd.c
--- ftpd.c  3 Jul 2019 03:24:04 -   1.228
+++ ftpd.c  18 Nov 2019 05:48:53 -
@@ -1124,7 +1124,10 @@ retrieve(enum ret_cmd cmd, char *name)
fin = fopen(name, "r");
st.st_size = 0;
} else {
-   fin = ftpd_ls("-lgA", name, );
+   if (cmd == RET_NLIST)
+   fin = ftpd_ls(name, ".", );
+   else
+   fin = ftpd_ls("-lgA", name, );
st.st_size = -1;
st.st_blksize = BUFSIZ;
}
@@ -1166,7 +1169,8 @@ retrieve(enum ret_cmd cmd, char *name)
goto done;
}
}
-   dout = dataconn(name, st.st_size, "w");
+   dout = dataconn((cmd == RET_NLIST) ? "file list" : name,
+   st.st_size, "w");
if (dout == NULL)
goto done;
time();
@@ -2626,7 +2630,7 @@ send_file_list(char *whichf)
 */
if (dirname[0] == '-' && *dirlist == NULL &&
transflag == 0) {
-   retrieve(RET_FILE, dirname);
+   retrieve(RET_NLIST, dirname);
    goto out;
    }
perror_reply(550, whichf);

-- 
SASANO Takayoshi (JG1UAA) 



ehci(4): split interrupt transfer fix

2019-01-18 Thread SASANO Takayoshi
Hello,

There is a problem about using USB2.0 hub which has single-TT.
When attaching USB keyboard and USB speaker to same hub and
playing music via speaker, the sound is noisy.

Current code schedules split isochronous transfer and split interrupt
transfer to same timing, so TT cannot handle both transfers.

To reduce the conflict, change transfer schedule of split interrupt transfer.
Here is the diff. I tested this solved the problem.

Index: ehci.c
===
RCS file: /cvs/src/sys/dev/usb/ehci.c,v
retrieving revision 1.201
diff -u -p -u -r1.201 ehci.c
--- ehci.c  8 Jan 2019 13:49:47 -   1.201
+++ ehci.c  19 Jan 2019 06:57:30 -
@@ -1,4 +1,4 @@
-/* $OpenBSD: ehci.c,v 1.201 2019/01/08 13:49:47 uaa Exp $ */
+/* $OpenBSD: ehci.c,v 1.200 2017/05/15 10:52:08 mpi Exp $ */
 /* $NetBSD: ehci.c,v 1.66 2004/06/30 03:11:56 mycroft Exp $*/
 
 /*
@@ -1429,15 +1429,30 @@ ehci_open(struct usbd_pipe *pipe)
EHCI_QH_CTL : 0) |
EHCI_QH_SET_NRL(naks)
);
+   /*
+* To reduce conflict with split isochronous transfer,
+* schedule (split) interrupt trasnfer at latter half of
+* 1ms frame:
+*
+* |<-- H-Frame -->|
+* .H0  :H1   H2   H3   H4   H5   H6   H7  .H0" :H1"
+* .:  .:
+* [HS].:  SSCS   CS'  CS" .:
+* [FS/LS] .:   |<== >>>> >>>| .:
+* .:  .:
+* .B7' :B0   B1   B2   B3   B4   B5   B6  .B7  :B0"
+*  |<-- B-Frame -->|
+*
+*/
sqh->qh.qh_endphub = htole32(
EHCI_QH_SET_MULT(1) |
-   EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x01 : 0)
+   EHCI_QH_SET_SMASK(xfertype == UE_INTERRUPT ? 0x08 : 0)
);
if (speed != EHCI_QH_SPEED_HIGH) {
sqh->qh.qh_endphub |= htole32(
EHCI_QH_SET_HUBA(hshubaddr) |
EHCI_QH_SET_PORT(hshubport) |
-   EHCI_QH_SET_CMASK(0x1c) /* XXX */
+   EHCI_QH_SET_CMASK(0xe0)
);
}
    sqh->qh.qh_curqtd = htole32(EHCI_LINK_TERMINATE);

-- 
SASANO Takayoshi (JG1UAA) 



ehci(4): interrupt transfer fix

2019-01-06 Thread SASANO Takayoshi
Hello,

RL (NAK count reload) field in QH should be zero when using periodic
(interrupt) transfer.

Currently it is always set 8, but this causes high-speed interrupt transfer
malfunction in my machines, Hudson-D2 chipset(amd64) and Allwinner A10(armv7).

This causes USB2.0 hub cannot detect device attach/detach.

Here is a remedy, Linux sets the value 4 when asynchronous transfer so
I copied it.

Index: ehci.c
===
RCS file: /cvs/src/sys/dev/usb/ehci.c,v
retrieving revision 1.200
diff -u -p -r1.200 ehci.c
--- ehci.c  15 May 2017 10:52:08 -  1.200
+++ ehci.c  6 Jan 2019 06:08:37 -
@@ -1406,7 +1406,12 @@ ehci_open(struct usbd_pipe *pipe)
panic("ehci_open: bad device speed %d", dev->speed);
}
 
-   naks = 8;   /* XXX */
+   /*
+* NAK reload count:
+* must be zero with using periodic transfer.
+* Linux 4.20's driver (ehci-q.c) sets 4, we use same value.
+*/
+   naks = ((xfertype == UE_CONTROL) || (xfertype == UE_BULK)) ? 4 : 0;
 
/* Allocate sqh for everything, save isoc xfers */
if (xfertype != UE_ISOCHRONOUS) {

-- 
SASANO Takayoshi (JG1UAA) 



ugl(4): maintenance

2018-03-06 Thread SASANO Takayoshi
Hello,

compared with upl driver code (if_upl.c), I found ugl needs maintenance.

 - remove extra blank line
 - roll back (not commit) when ugl_send() failed
 - call ifq_clr_oactive() before splx()

ok?

Index: if_ugl.c
===
RCS file: /cvs/src/sys/dev/usb/if_ugl.c,v
retrieving revision 1.21
diff -u -p -r1.21 if_ugl.c
--- if_ugl.c22 Jan 2017 10:17:39 -  1.21
+++ if_ugl.c7 Mar 2018 04:39:38 -
@@ -215,7 +215,6 @@ ugl_attach(struct device *parent, struct
 
DPRINTFN(5,(" : ugl_attach: sc=%p, dev=%p", sc, dev));
 
-
sc->sc_udev = dev;
sc->sc_iface = iface;
id = usbd_get_interface_descriptor(iface);
@@ -595,7 +594,7 @@ ugl_start(struct ifnet *ifp)
return;
 
if (ugl_send(sc, m_head, 0)) {
-   ifq_deq_commit(>if_snd, m_head);
+   ifq_deq_rollback(>if_snd, m_head);
ifq_set_oactive(>if_snd);
return;
}
@@ -655,9 +654,9 @@ ugl_init(void *xsc)
}
 
ifp->if_flags |= IFF_RUNNING;
-   splx(s);
-
ifq_clr_oactive(>if_snd);
+
+   splx(s);
 }
 
 int

-- 
SASANO Takayoshi (JG1UAA) <u...@mx5.nisiq.net>



[patch] puc(4) add ASIX AX99100 support

2017-08-04 Thread SASANO Takayoshi
hello, here is AX99100 4port serial PCI-Express controller support.
applying this patch, AX99100 is recognized as follows:

puc0 at pci3 dev 0 function 0 "ASIX AX99100" rev 0x00: ports: 1 com
com4 at puc0 port 0 apic 5 int 17: st16650, 32 byte fifo
puc1 at pci3 dev 0 function 1 "ASIX AX99100" rev 0x00: ports: 1 com
com5 at puc1 port 0 apic 5 int 18: st16650, 32 byte fifo
puc2 at pci3 dev 0 function 2 "ASIX AX99100" rev 0x00: ports: 1 com
com6 at puc2 port 0 apic 5 int 19: st16650, 32 byte fifo
puc3 at pci3 dev 0 function 3 "ASIX AX99100" rev 0x00: ports: 1 com
com7 at puc3 port 0 apic 5 int 16: st16650, 32 byte fifo

ok?
-- 
SASANO Takayoshi (JG1UAA) <u...@mx5.nisiq.net>

Index: pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1823
diff -u -p -r1.1823 pcidevs
--- pcidevs 16 Jul 2017 13:41:58 -  1.1823
+++ pcidevs 4 Aug 2017 12:53:12 -
@@ -966,6 +966,7 @@ product ARECA ARC1880   0x1880  ARC-1880
 
 /* ASIX Electronics products */
 product ASIX AX88140A  0x1400  AX88140A/88141
+product ASIX AX99100   0x9100  AX99100
 
 /* ASMedia products */
 product ASMEDIA ASM1061_SATA   0x0611  ASM1061 SATA
Index: pcidevs.h
===
RCS file: /cvs/src/sys/dev/pci/pcidevs.h,v
retrieving revision 1.1817
diff -u -p -r1.1817 pcidevs.h
--- pcidevs.h   16 Jul 2017 13:42:20 -  1.1817
+++ pcidevs.h   4 Aug 2017 12:53:13 -
@@ -971,6 +971,7 @@
 
 /* ASIX Electronics products */
 #definePCI_PRODUCT_ASIX_AX88140A   0x1400  /* 
AX88140A/88141 */
+#definePCI_PRODUCT_ASIX_AX991000x9100  /* AX99100 */
 
 /* ASMedia products */
 #definePCI_PRODUCT_ASMEDIA_ASM1061_SATA0x0611  /* 
ASM1061 SATA */
Index: pcidevs_data.h
===
RCS file: /cvs/src/sys/dev/pci/pcidevs_data.h,v
retrieving revision 1.1811
diff -u -p -r1.1811 pcidevs_data.h
--- pcidevs_data.h  16 Jul 2017 13:42:20 -  1.1811
+++ pcidevs_data.h  4 Aug 2017 12:53:14 -
@@ -2152,6 +2152,10 @@ static const struct pci_known_product pc
"AX88140A/88141",
},
{
+   PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX99100,
+   "AX99100",
+   },
+   {
PCI_VENDOR_ASMEDIA, PCI_PRODUCT_ASMEDIA_ASM1061_SATA,
"ASM1061 SATA",
},
Index: pucdata.c
===
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.105
diff -u -p -r1.105 pucdata.c
--- pucdata.c   6 May 2017 01:54:31 -   1.105
+++ pucdata.c   4 Aug 2017 12:53:14 -
@@ -2200,6 +2200,13 @@ const struct puc_device_description puc_
{ PUC_COM_POW2(0), 0x14, 0x },
}
},
+   {   /* "ASIX AX99100", */
+   {   PCI_VENDOR_ASIX, PCI_PRODUCT_ASIX_AX99100,  0, 0},
+   {   0x, 0x, 0, 0},
+   {
+   { PUC_COM_POW2(0), 0x10, 0x },
+   }
+   },
{   /* "NetMos NM9820 UART" */
{   PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9820,   0, 0},
{   0x, 0x, 0, 0},



puc(4): serial console, UART's address != PCI-BAR

2016-08-23 Thread SASANO Takayoshi
 if (pci_mapreg_info(pa->pa_pc, pa->pa_tag, bar, type,
-   >sc_bar_mappings[i].a, NULL, NULL) == 0 &&
+   >sc_bar_mappings[i].a, , NULL) == 0 &&
pa->pa_iot == comconsiot &&
-   sc->sc_bar_mappings[i].a == comconsaddr) {
+   (sc->sc_bar_mappings[i].a <= comconsaddr &&
+(sc->sc_bar_mappings[i].a + size) > comconsaddr) &&
+   _bus_space_map(comconsiot, sc->sc_bar_mappings[i].a,
+  size, 0, >sc_bar_mappings[i].h) == 0) {
sc->sc_bar_mappings[i].t = comconsiot;
-   sc->sc_bar_mappings[i].h = comconsioh;
-   sc->sc_bar_mappings[i].s = COM_NPORTS;
+   sc->sc_bar_mappings[i].s = size;
        sc->sc_bar_mappings[i].mapped = 1;
continue;
}


Regards,
-- 
SASANO Takayoshi <u...@mx5.nisiq.net>



puc(4): [WIP] TXIC TX382B UART controller support

2016-03-19 Thread SASANO Takayoshi
Hello,

Recently I bought a cheap PCIe UART adapter.
It uses ASMedia ASM1083 PCIe-PCI bridge and TXIC TX382B UART controller.
There is no details/datasheets about TX382B, but a Chinese seller
saids that it is similar to WCH351Q (aka WinChipHead's CH351Q). [1]

So I add new entry to pucdata.c like CH351.
TX382B may be compatible with 16550A but works with no FIFO
when my diff is applied.

Here is a dmesg.

  ppb1 at pci1 dev 0 function 0 "ASMedia ASM1083/1085 PCIE-PCI" rev 0x04
  pci2 at ppb1 bus 2
  puc0 at pci2 dev 0 function 0 "TXIC TX382B" rev 0x10: ports: 2 com
  com4 at puc0 port 0 apic 5 int 18: ns16550a, 16 byte fifo
  com4: probed fifo depth: 0 bytes
  com5 at puc0 port 1 apic 5 int 18: ns16550a, 16 byte fifo
  com5: probed fifo depth: 0 bytes

Is this problem occurs with WCH's CH351?

[1] http://www.mistertao.com/v2/pages/item/39360600316.html
This site is written in Chinese, use Google Translate.

Regards,
-- 
SASANO Takayoshi <u...@mx5.nisiq.net>

Index: pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1790
diff -u -p -r1.1790 pcidevs
--- pcidevs 15 Mar 2016 07:37:15 -  1.1790
+++ pcidevs 16 Mar 2016 03:04:27 -
@@ -340,6 +340,7 @@ vendor  AVANCE2 0x4005  Avance Logic
 vendor ADDTRON 0x4033  Addtron
 vendor NETXEN  0x4040  NetXen
 vendor WCH 0x4348  Nanjing QinHeng Electronics
+vendor TXIC0x4651  TXIC
 vendor INDCOMPSRC  0x494f  Industrial Computer Source
 vendor NETVIN  0x4a14  NetVin
 vendor GEMTEK  0x5046  Gemtek
@@ -5139,6 +5140,9 @@ product WCH CH352 0x3253  CH352
 product WCH2 CH351 0x2273  CH351
 product WCH2 CH382_1   0x3253  CH382
 product WCH2 CH382_2   0x3250  CH382
+
+/* TXIC */
+productTXIC TX382B 0x3273  TX382B
 
 /* National Datacomm Corp products */
 product NDC NCP130 0x0130  NCP130
Index: pcidevs.h
===
RCS file: /cvs/src/sys/dev/pci/pcidevs.h,v
retrieving revision 1.1784
diff -u -p -r1.1784 pcidevs.h
--- pcidevs.h   15 Mar 2016 07:37:36 -  1.1784
+++ pcidevs.h   16 Mar 2016 03:04:28 -
@@ -345,6 +345,7 @@
 #definePCI_VENDOR_ADDTRON  0x4033  /* Addtron */
 #definePCI_VENDOR_NETXEN   0x4040  /* NetXen */
 #definePCI_VENDOR_WCH  0x4348  /* Nanjing QinHeng Electronics 
*/
+#definePCI_VENDOR_TXIC 0x4651  /* TXIC */
 #definePCI_VENDOR_INDCOMPSRC   0x494f  /* Industrial Computer 
Source */
 #definePCI_VENDOR_NETVIN   0x4a14  /* NetVin */
 #definePCI_VENDOR_GEMTEK   0x5046  /* Gemtek */
@@ -5144,6 +5145,9 @@
 #definePCI_PRODUCT_WCH2_CH351  0x2273  /* CH351 */
 #definePCI_PRODUCT_WCH2_CH382_10x3253  /* CH382 */
 #definePCI_PRODUCT_WCH2_CH382_20x3250  /* CH382 */
+
+/* TXIC */
+#definePCI_PRODUCT_TXIC_TX382B 0x3273  /* TX382B */
 
 /* National Datacomm Corp products */
 #definePCI_PRODUCT_NDC_NCP130  0x0130  /* NCP130 */
Index: pcidevs_data.h
===
RCS file: /cvs/src/sys/dev/pci/pcidevs_data.h,v
retrieving revision 1.1779
diff -u -p -r1.1779 pcidevs_data.h
--- pcidevs_data.h  15 Mar 2016 07:37:36 -  1.1779
+++ pcidevs_data.h  16 Mar 2016 03:04:29 -
@@ -17760,6 +17760,10 @@ static const struct pci_known_product pc
"CH382",
},
{
+   PCI_VENDOR_TXIC, PCI_PRODUCT_TXIC_TX382B,
+   "TX382B",
+   },
+   {
PCI_VENDOR_NDC, PCI_PRODUCT_NDC_NCP130,
"NCP130",
},
@@ -26754,6 +26758,10 @@ static const struct pci_known_vendor pci
{
PCI_VENDOR_WCH,
"Nanjing QinHeng Electronics",
+   },
+   {
+   PCI_VENDOR_TXIC,
+   "TXIC",
},
{
PCI_VENDOR_INDCOMPSRC,
Index: pucdata.c
===
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.102
diff -u -p -r1.102 pucdata.c
--- pucdata.c   15 Mar 2016 07:39:27 -  1.102
+++ pucdata.c   16 Mar 2016 03:04:29 -
@@ -2166,6 +2166,14 @@ const struct puc_device_description puc_
{ PUC_COM_POW2(0), 0x10, 0x00c8 },
},
},
+   {   /* "TXIC TX382B (2S)", */
+   {   PCI_VENDOR_TXIC, PCI_PRODUCT_TXIC_TX382B,   0, 0},
+   {   0x, 0x, 0, 0},
+   {
+   { PUC_COM_POW2(0), 0x10, 0x },
+   { PUC_COM_POW2(0), 0x14, 0x },
+   }
+   },
{   /* "

Re: puc(4): [WIP] TXIC TX382B UART controller support

2016-03-19 Thread SASANO Takayoshi
Hello,

The diff is committed (ok by deraadt@), and I am testing the behavior of
TX382B's FIFO.

> Here is a dmesg.
> 
>   ppb1 at pci1 dev 0 function 0 "ASMedia ASM1083/1085 PCIE-PCI" rev 0x04
>   pci2 at ppb1 bus 2
>   puc0 at pci2 dev 0 function 0 "TXIC TX382B" rev 0x10: ports: 2 com
>   com4 at puc0 port 0 apic 5 int 18: ns16550a, 16 byte fifo
>   com4: probed fifo depth: 0 bytes
>   com5 at puc0 port 1 apic 5 int 18: ns16550a, 16 byte fifo
>   com5: probed fifo depth: 0 bytes

com_fifo_probe() (at src/sys/dev/ic/com.c) checks the depth of Tx/Rx FIFO,
it uses MCR_LOOPBACK to enter loopback mode.

I found TX382B does not loopback with setting MCR_LOOPBACK,
and this cause com_fifo_probe() detects no FIFO.

It is difficult to write a special code to com.c, I think TX382B should
work without Tx/Rx FIFO. There is other good and cheap UART chip!

Regards,
-- 
SASANO Takayoshi <u...@mx5.nisiq.net>



pciide(4): cannot boot -current on 86duino EduCake

2015-10-06 Thread SASANO Takayoshi
  PGRPUID  S   FLAGS  WAIT  COMMAND
 22767  0  0  0  2 0x14200crypto
 17851  0  0  0  2 0x14200pfpurge
*28953  0  0  0  7 0x14200usbtask
 23364  0  0  0  3 0x14200  usbatsk   usbatsk
  5298  0  0  0  3 0x14200  bored softnet
  7086  0  0  0  3 0x14200  bored systqmp
 12774  0  0  0  2 0x14200systq
 16453  0  0  0  1 0x14200idle0
 10723  0  0  0  3 0x14200  kmalloc   kmthread
 1  0  0  0  3   0  initexec  swapper
 0 -1  0  0  3 0x10200  cfpendswapper
ddb> trace
wdcintr(d11055e4,0,1,0,0) at wdcintr+0x8e
pciide_pci_intr(d1105000,d11019c0) at pciide_pci_intr+0x69
Xrecurse_legacy11() at Xrecurse_legacy11+0xb7
--- interrupt ---
Xspllower(d32b6a2c) at Xspllower+0xe
ddb> show register
ds  0x10
es  0x10
fs  0x20
gs 0
edi   0xd11055e4end+0x3055e4
esi   0xd11055e4end+0x3055e4
ebp   0xf1cfced0
ebx   0xd1105508end+0x305508
edx0
ecx 0x10
eax0
eip   0xd020839ewdcintr+0x8e
cs   0x8
eflags 0x256
esp   0xf1cfce98
ss  0x10
wdcintr+0x8e:   call*0(%edx)
ddb> 


wdcintr+0x8e is calling bus_space_read_1() in wdcintr(),
and wdcintr() comes from pciide_pci_intr() (sys/dev/pci/pciide.c).

pciide_pci_intr() checks pciide0:channel0 (enabled) and
channel1 (disabled), page fault occurs when checking disabled channel.

Here is the remedy for RDC R1012.


Index: pciide.c
===
RCS file: /cvs/src/sys/dev/pci/pciide.c,v
retrieving revision 1.354
diff -u -p -r1.354 pciide.c
--- pciide.c10 Sep 2015 18:10:34 -  1.354
+++ pciide.c6 Oct 2015 15:29:05 -
@@ -9188,6 +9188,7 @@ rdc_chip_map(struct pciide_softc *sc, st
if ((patr & RDCIDE_PATR_EN(channel)) == 0) {
printf("%s: %s ignored (disabled)\n",
       sc->sc_wdcdev.sc_dev.dv_xname, cp->name);
+   cp->hw_ok = 0;
continue;
}
pciide_map_compat_intr(pa, cp, channel, interface);
-- 
SASANO Takayoshi <u...@mx5.nisiq.net>



uslhcom(4) driver for USB HID based UART

2015-01-02 Thread SASANO Takayoshi
Hello,

Here is the driver for Silicon Labs CP2110 USB HID based UART.
It called uhidcom(4) and now renamed to uslhcom(4).

Now working on -current.

-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: arch/i386/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/i386/conf/GENERIC,v
retrieving revision 1.792
diff -u -p -r1.792 GENERIC
--- arch/i386/conf/GENERIC  11 Dec 2014 19:44:17 -  1.792
+++ arch/i386/conf/GENERIC  2 Jan 2015 20:36:19 -
@@ -274,6 +274,8 @@ ukbd*   at uhidev?  # USB keyboard
 wskbd* at ukbd? mux 1
 ucycom*at uhidev?  # Cypress serial
 ucom*  at ucycom?
+uslhcom* at uhidev?# Silicon Labs CP2110 USB HID UART
+ucom*  at uslhcom?
 uticom* at uhub?   # TI serial
 ucom*  at uticom?
 uhid*  at uhidev?  # USB generic HID support
Index: dev/usb/files.usb
===
RCS file: /cvs/src/sys/dev/usb/files.usb,v
retrieving revision 1.120
diff -u -p -r1.120 files.usb
--- dev/usb/files.usb   11 Dec 2014 19:44:17 -  1.120
+++ dev/usb/files.usb   2 Jan 2015 20:36:23 -
@@ -110,6 +110,11 @@ device ucycom: hid, ucombus
 attach ucycom at uhidbus
 file   dev/usb/ucycom.cucycom  needs-flag
 
+# Silicon Labs USB HID based UART controller
+device uslhcom: hid, ucombus
+attach uslhcom at uhidbus
+file   dev/usb/uslhcom.c   uslhcom needs-flag
+
 # Printers
 device ulpt: firmload
 attach ulpt at uhub
Index: dev/usb/uslhcom.c
===
RCS file: dev/usb/uslhcom.c
diff -N dev/usb/uslhcom.c
--- /dev/null   1 Jan 1970 00:00:00 -
+++ dev/usb/uslhcom.c   2 Jan 2015 20:36:24 -
@@ -0,0 +1,504 @@
+/* $OpenBSD: */
+
+/*
+ * Copyright (c) 2015 SASANO Takayoshi u...@openbsd.org
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Device driver for Silicon Labs CP2110 USB HID-UART bridge.
+ */
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/kernel.h
+#include sys/malloc.h
+#include sys/conf.h
+#include sys/tty.h
+#include sys/device.h
+
+#include dev/usb/usb.h
+#include dev/usb/usbdi.h
+#include dev/usb/usbdi_util.h
+#include dev/usb/usbdevs.h
+
+#include dev/usb/hid.h
+#include dev/usb/usbhid.h
+#include dev/usb/uhidev.h
+
+#include dev/usb/ucomvar.h
+#include dev/usb/uslhcomreg.h
+
+#ifdef USLHCOM_DEBUG
+#defineDPRINTF(x)  if (uslhcomdebug) printf x
+#else
+#defineDPRINTF(x)
+#endif
+
+struct uslhcom_softc {
+   struct uhidevsc_hdev;
+   struct usbd_device  *sc_udev;
+
+   u_char  *sc_ibuf;
+   u_intsc_icnt;
+
+   u_char   sc_lsr;
+   u_char   sc_msr;
+
+   struct device   *sc_subdev;
+};
+
+void   uslhcom_get_status(void *, int, u_char *, u_char *);
+void   uslhcom_set(void *, int, int, int);
+intuslhcom_param(void *, int, struct termios *);
+intuslhcom_open(void *, int);
+void   uslhcom_close(void *, int);
+void   uslhcom_write(void *, int, u_char *, u_char *, u_int32_t *);
+void   uslhcom_read(void *, int, u_char **, u_int32_t *);
+void   uslhcom_intr(struct uhidev *, void *, u_int);
+
+intuslhcom_match(struct device *, void *, void *);
+void   uslhcom_attach(struct device *, struct device *, void *);
+intuslhcom_detach(struct device *, int);
+
+intuslhcom_uart_endis(struct uslhcom_softc *, int);
+intuslhcom_clear_fifo(struct uslhcom_softc *, int);
+intuslhcom_get_version(struct uslhcom_softc *, struct 
uslhcom_version_info *);
+intuslhcom_get_uart_status(struct uslhcom_softc *, struct 
uslhcom_uart_status *);
+intuslhcom_set_break(struct uslhcom_softc *, int);
+intuslhcom_set_config(struct uslhcom_softc *, struct 
uslhcom_uart_config *);
+void   uslhcom_set_baud_rate(struct uslhcom_uart_config *, u_int32_t);
+intuslhcom_create_config(struct uslhcom_uart_config *, struct 
termios *);
+intuslhcom_setup(struct uslhcom_softc *, struct

[WIP] uhidcom(4) driver for USB HID based UART

2014-12-17 Thread SASANO Takayoshi
Hi,

I am trying to write a driver for Silicon Labs CP2110 USB HID based UART.
Here is work-in-progress code, and it seems to set uca.uhidev properly.
(I wrote code/tested on 5.6-release and ported to -current.)

Exar's XR21B1421 uses similar protocol so I named the driver uhidcom(4),
but currently it is not supported --- too expensive to buy evaluation board.

-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: arch/i386/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/i386/conf/GENERIC,v
retrieving revision 1.792
diff -u -p -u -p -r1.792 GENERIC
--- arch/i386/conf/GENERIC  11 Dec 2014 19:44:17 -  1.792
+++ arch/i386/conf/GENERIC  17 Dec 2014 09:57:54 -
@@ -274,6 +274,8 @@ ukbd*   at uhidev?  # USB keyboard
 wskbd* at ukbd? mux 1
 ucycom*at uhidev?  # Cypress serial
 ucom*  at ucycom?
+uhidcom* at uhidev?# Silicon Labs CP2110 USB HID UART
+ucom*  at uhidcom?
 uticom* at uhub?   # TI serial
 ucom*  at uticom?
 uhid*  at uhidev?  # USB generic HID support
Index: dev/usb/files.usb
===
RCS file: /cvs/src/sys/dev/usb/files.usb,v
retrieving revision 1.120
diff -u -p -u -p -r1.120 files.usb
--- dev/usb/files.usb   11 Dec 2014 19:44:17 -  1.120
+++ dev/usb/files.usb   17 Dec 2014 09:58:00 -
@@ -110,6 +110,11 @@ device ucycom: hid, ucombus
 attach ucycom at uhidbus
 file   dev/usb/ucycom.cucycom  needs-flag
 
+# Silicon Labs USB HID based UART controller
+device uhidcom: hid, ucombus
+attach uhidcom at uhidbus
+file   dev/usb/uhidcom.c   uhidcom needs-flag
+
 # Printers
 device ulpt: firmload
 attach ulpt at uhub
Index: dev/usb/uhidcom.c
===
RCS file: dev/usb/uhidcom.c
diff -N dev/usb/uhidcom.c
--- /dev/null   1 Jan 1970 00:00:00 -
+++ dev/usb/uhidcom.c   17 Dec 2014 09:58:01 -
@@ -0,0 +1,489 @@
+/* $OpenBSD: */
+
+/*
+ * Copyright (c) 2014 SASANO Takayoshi u...@uaa.org.uk
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
+ * Device driver for Silicon Labs CP2110 USB HID-UART bridge.
+ */
+
+#include sys/param.h
+#include sys/systm.h
+#include sys/kernel.h
+#include sys/malloc.h
+#include sys/conf.h
+#include sys/tty.h
+#include sys/device.h
+
+#include dev/usb/usb.h
+#include dev/usb/usbdi.h
+#include dev/usb/usbdi_util.h
+#include dev/usb/usbdevs.h
+
+#include dev/usb/hid.h
+#include dev/usb/usbhid.h
+#include dev/usb/uhidev.h
+
+#include dev/usb/ucomvar.h
+#include dev/usb/uhidcomreg.h
+
+#define UHIDCOM_DEBUG
+#ifdef UHIDCOM_DEBUG
+#defineDPRINTFN(n, x)  do { if(uhidcomdebug  (n)) printf x; } while 
(0)
+intuhidcomdebug = 10;
+#else
+#defineDPRINTFN(n, x)
+#endif
+#defineDPRINTF(x) DPRINTFN(0, x)
+
+struct uhidcom_softc {
+   struct uhidevsc_hdev;
+   struct usbd_device  *sc_udev;
+
+   u_char  *sc_ibuf;
+   u_intsc_icnt;
+
+   u_char   sc_lsr;
+   u_char   sc_msr;
+
+   struct device   *sc_subdev;
+};
+
+void   uhidcom_get_status(void *, int, u_char *, u_char *);
+void   uhidcom_set(void *, int, int, int);
+intuhidcom_param(void *, int, struct termios *);
+intuhidcom_open(void *, int);
+void   uhidcom_close(void *, int);
+void   uhidcom_write(void *, int, u_char *, u_char *, u_int32_t *);
+void   uhidcom_read(void *, int, u_char **, u_int32_t *);
+void   uhidcom_intr(struct uhidev *, void *, u_int);
+
+intuhidcom_match(struct device *, void *, void *);
+void   uhidcom_attach(struct device *, struct device *, void *);
+intuhidcom_detach(struct device *, int);
+
+usbd_statusuhidcom_uart_endis(struct uhidcom_softc *, int);
+usbd_statusuhidcom_clear_fifo(struct uhidcom_softc *, int);
+usbd_statusuhidcom_get_version(struct uhidcom_softc *, struct 
uhidcom_version_info *);
+usbd_statusuhidcom_get_uart_status(struct uhidcom_softc *, struct 
uhidcom_uart_status *);
+usbd_statusuhidcom_set_break(struct

Re: [WIP] uhidcom(4) driver for USB HID based UART

2014-12-17 Thread SASANO Takayoshi
At Wed, 17 Dec 2014 22:43:40 +1100,
Jonathan Gray wrote:
 
 On Wed, Dec 17, 2014 at 07:49:59PM +0900, SASANO Takayoshi wrote:
  Hi,
  
  I am trying to write a driver for Silicon Labs CP2110 USB HID based UART.
  Here is work-in-progress code, and it seems to set uca.uhidev properly.
  (I wrote code/tested on 5.6-release and ported to -current.)
  
  Exar's XR21B1421 uses similar protocol so I named the driver uhidcom(4),
  but currently it is not supported --- too expensive to buy evaluation board.
 
 Isn't that name a bit too generic?  We already have a USB HID based UART
 driver in the tree with ucycom(4), which apparently uses a different protocol?
 

uslcom(4) is already used by CP210x, how about uslhcom(4)?
slh means Silicon Lab's Hid protocol.

Otherwise, uxrcom(4).

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: uslcom(4): fix for CP2110 USB HID-UART misdetection

2014-11-23 Thread SASANO Takayoshi
Hi,

At Wed, 19 Nov 2014 10:56:15 +0100,
Martin Pieuchot wrote:
 
 On 18/11/14(Tue) 05:25, SASANO Takayoshi wrote:
  Hi all,
  
  I bought Silicon Labs CP2110-EK USB HID-to-UART evaluation kit
  and connected to OpenBSD box.
  
  uslcom(4) tries to use CP2110, but the device is different from
  CP210x series.
 
 I agree this is a totally different device are you working on a kernel
 driver?  The AN434 document should be enough, right?  By the way, this
 device is another example that the model 1 driver per  reportID is no
 longer valid.

Yes, I am trying to write CP2110 kernel driver, and it requires handling
all report ID. I think upd_match() of upd(4) will be a hint.

I have read AN434 and found something unclear. I need to check how device
works by USB analyzer.

  How about to fix usbdevs and uslcom.c like this?
 
 ok mpi@

Thanks, committed.
Regards,

-- 
SASANO Takayoshi u...@mx5.nisiq.net



uslcom(4): fix for CP2110 USB HID-UART misdetection

2014-11-17 Thread SASANO Takayoshi
uhid45 at uhidev0 reportid 46: input=46, output=46, feature=0
uhid46 at uhidev0 reportid 47: input=47, output=47, feature=0
uhid47 at uhidev0 reportid 48: input=48, output=48, feature=0
uhid48 at uhidev0 reportid 49: input=49, output=49, feature=0
uhid49 at uhidev0 reportid 50: input=50, output=50, feature=0
uhid50 at uhidev0 reportid 51: input=51, output=51, feature=0
uhid51 at uhidev0 reportid 52: input=52, output=52, feature=0
uhid52 at uhidev0 reportid 53: input=53, output=53, feature=0
uhid53 at uhidev0 reportid 54: input=54, output=54, feature=0
uhid54 at uhidev0 reportid 55: input=55, output=55, feature=0
uhid55 at uhidev0 reportid 56: input=56, output=56, feature=0
uhid56 at uhidev0 reportid 57: input=57, output=57, feature=0
uhid57 at uhidev0 reportid 58: input=58, output=58, feature=0
uhid58 at uhidev0 reportid 59: input=59, output=59, feature=0
uhid59 at uhidev0 reportid 60: input=60, output=60, feature=0
uhid60 at uhidev0 reportid 61: input=61, output=61, feature=0
uhid61 at uhidev0 reportid 62: input=62, output=62, feature=0
uhid62 at uhidev0 reportid 63: input=63, output=63, feature=0
uhid63 at uhidev0 reportid 64: input=0, output=0, feature=1
uhid64 at uhidev0 reportid 65: input=0, output=0, feature=1
uhid65 at uhidev0 reportid 66: input=0, output=0, feature=6
uhid66 at uhidev0 reportid 67: input=0, output=0, feature=1
uhid67 at uhidev0 reportid 68: input=0, output=0, feature=2
uhid68 at uhidev0 reportid 69: input=0, output=0, feature=4
uhid69 at uhidev0 reportid 70: input=0, output=0, feature=2
uhid70 at uhidev0 reportid 71: input=0, output=0, feature=2
uhid71 at uhidev0 reportid 80: input=0, output=0, feature=8
uhid72 at uhidev0 reportid 81: input=0, output=0, feature=1
uhid73 at uhidev0 reportid 82: input=0, output=0, feature=1
uhid74 at uhidev0 reportid 96: input=0, output=0, feature=10
uhid75 at uhidev0 reportid 97: input=0, output=0, feature=63
uhid76 at uhidev0 reportid 98: input=0, output=0, feature=63
uhid77 at uhidev0 reportid 99: input=0, output=0, feature=63
uhid78 at uhidev0 reportid 100: input=0, output=0, feature=63
uhid79 at uhidev0 reportid 101: input=0, output=0, feature=62
uhid80 at uhidev0 reportid 102: input=0, output=0, feature=19

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: armv7: banana pi, Allwinner A20 board

2014-10-18 Thread SASANO Takayoshi
Hello,

Theo gave a hint to check early console code and I found something curious.
Here is a diff to printf debug...

Index: sxiuart.c
===
RCS file: /cvs/src/sys/arch/armv7/sunxi/sxiuart.c,v
retrieving revision 1.3
diff -u -p -r1.3 sxiuart.c
--- sxiuart.c   6 Nov 2013 19:03:07 -   1.3
+++ sxiuart.c   18 Oct 2014 20:39:38 -
@@ -971,15 +971,18 @@ sxiuartcngetc(dev_t dev)
uint8_t c;
 
s = splhigh();
-
+bus_space_write_1(sxiuartconsiot, sxiuartconsioh, SXIUART_THR, 'a');
while (!ISSET(bus_space_read_1(sxiuartconsiot, sxiuartconsioh,
SXIUART_LSR), LSR_RXRDY))
continue;
+bus_space_write_1(sxiuartconsiot, sxiuartconsioh, SXIUART_THR, 'b');
c = bus_space_read_1(sxiuartconsiot, sxiuartconsioh, SXIUART_RBR);
 
/* clear any pending interrupts */
+bus_space_write_1(sxiuartconsiot, sxiuartconsioh, SXIUART_THR, 'c');
(void)bus_space_read_1(sxiuartconsiot, sxiuartconsioh, SXIUART_IIR);
 
+bus_space_write_1(sxiuartconsiot, sxiuartconsioh, SXIUART_THR, 'd');
splx(s);
return (c);
 }


UKC stalls at polling LSR_RXRDY flag.

  User Kernel Config
  UKC a

but ddb works no problem.

  panic: uvm_fault: fault on non-pageable map (0xc0af328c, 0xc55aa000)
  Stopped at  0xc0a1d4ac: ldrbr15, [r15, r15, ror r15]!
  RUN AT LEAST 'trace' AND 'ps' AND INCLUDE OUTPUT WHEN REPORTING THIS PANIC!
  DO NOT EVEN BOTHER REPORTING THIS WITHOUT INCLUDING THAT INFORMATION!
  ddbabd

I think sxiuartcngetc() have no problem and something makes worse.
Do I have to check page table (memory attribute of ARMv7 MMU)
when running UKC?

-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: armv7: banana pi, Allwinner A20 board

2014-10-09 Thread SASANO Takayoshi
Hello,

Here is the log of new image.
Booting with -c option, UKC still hangs up.

I hope the log helps debugging.

Regards,

-- 
SASANO Takayoshi u...@mx5.nisiq.net

U-Boot SPL 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04)
Board: Bananapi
DRAM: 1024 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04) Allwinner 
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Bananapi
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   dwmac.1c5
Hit any key to stop autoboot:  0 
reading uEnv.txt
118 bytes read in 16 ms (6.8 KiB/s)
Loaded environment from uEnv.txt
Running uenvcmd ...
reading bsd.umg
7386560 bytes read in 364 ms (19.4 MiB/s)
## Booting kernel from Legacy Image at 6000 ...
   Image Name:   boot
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:7386496 Bytes = 7 MiB
   Load Address: 4080
   Entry Point:  4080
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...


OpenBSD/sunxi booting ...
arg0 0x0 arg1 0x10bb arg2 0x4100
atag core flags 0 pagesize 0 rootdev 0
atag cmdline [sd0i:/bsd -c]
atag mem start 0x4000 size 0x4000
bootfile: sd0i:/bsd
bootargs: -c
memory size derived from u-boot
bootconf.mem[0].address = 4000 pages 262144/0x4000
Allocating page tables
freestart = 0x40f0c000, free_pages = 258292 (0x0003f0f4)
IRQ stack: p0x40f3a000 v0xc0f3a000
ABT stack: p0x40f3b000 v0xc0f3b000
UND stack: p0x40f3c000 v0xc0f3c000
SVC stack: p0x40f3d000 v0xc0f3d000
Creating L1 page table at 0x40f0c000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 170728 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2014 OpenBSD. All rights reserved.  http://www.OpenBSD.org

kernel does not support -c; continuing..
OpenBSD 5.6-current (RAMDISK-SUNXI) #1: Thu Oct  9 21:03:32 AEDT 2014
r...@armv7.jsg.id.au:/usr/src/sys/arch/armv7/compile/RAMDISK-SUNXI
real mem  = 1073741824 (1024MB)
avail mem = 1036165120 (988MB)
warning: no entropy supplied by boot loader
mainbus0 at root
cortex0 at mainbus0
ampintc0 at cortex0 nirq 160
cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
sunxi0 at mainbus0: A20
sxipio0 at sunxi0
sxiccmu0 at sunxi0
sxitimer0 at sunxi0: ticktimer 100hz @ 32KHz
sxitimer1 at sunxi0: stattimer 128hz @ 32KHz
sxitimer2 at sunxi0: cntrtimer @ 32KHz
sxidog0 at sunxi0
sxirtc0 at sunxi0
sxiuart0 at sunxi0: console
sxiuart1 at sunxi0
sxiuart2 at sunxi0
sxiuart3 at sunxi0
sxiuart4 at sunxi0
sxiuart5 at sunxi0
sxiuart6 at sunxi0
sxiuart7 at sunxi0
sxie0 at sunxi0, address 02:99:03:c2:d2:6e
ukphy0 at sxie0 phy 0: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ukphy1 at sxie0 phy 1: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ahci0 at sunxi0 AHCI 1.1
pmap_fault_fixup: va c5544000 ftype 2 s pte 7ff9301e
panic: uvm_fault: fault on non-pageable map (0xc0e7f28c, 0xc5544000)
Stopped at  Debugger+0x4:   ldrbr15, [r15, r15, ror r15]!
panic+0x18
scp=0xc083a39c rlv=0xc08c2f54 (uvm_fault+0xca8)
rsp=0xc0f3eaec rfp=0xc0f3ec0c
uvm_fault+0xc
scp=0xc08c22b8 rlv=0xc08fe588 (data_abort_handler+0x248)
rsp=0xc0f3ec10 rfp=0xc0f3ec64
r10=0xc0f3ec68 r9=0xc0f3d000 r8=0x r7=0xc0e9f764
r6=0x0002 r5=0xc0ebc7b4 r4=0xc5544000
data_abort_handler+0xc
scp=0xc08fe34c rlv=0xc08fdd54 (address_exception_entry+0x50)
rsp=0xc0f3ec68 rfp=0xc0f3eccc
r10=0xc0ebd1b4 r9=0x0200 r8=0x014c r7=0x000a
r6=0x0009 r5=0xc5544e00 r4=0x0010
poison_mem+0xc
scp=0xc0835bb8 rlv=0xc081df20 (malloc+0x2ec)
rsp=0xc0f3ecd0 rfp=0xc0f3ed38
r5=0xc5544000 r4=0xc5544e00
malloc+0x10
scp=0xc081dc44 rlv=0xc08fcee8 (_bus_dmamap_create+0x40)
rsp=0xc0f3ed3c rfp=0xc0f3ed5c
r10=0x r9=0x7ff97000 r8=0x r7=0x0003
r6=0x0001 r5=0x0040 r4=0x0018
_bus_dmamap_create+0x10
scp=0xc08fceb8 rlv=0xc0804384 (ahci_port_alloc+0x34c)
rsp=0xc0f3ed60 rfp=0xc0f3edb0
r7=0xc553b300 r6=0xc548a200 r5=0xc5542000 r4=0x
ahci_port_alloc+0x10
scp=0xc0804048 rlv=0xc0804814 (ahci_attach+0x80)
rsp=0xc0f3edb4 rfp=0xc0f3ede8
r10=0xc0f3ee5c r9=0xc0f3ee5c r8=0x r7=0xc553b300
r6=0xc553b300 r5=0x0001 r4=0x
ahci_attach+0xc
scp=0xc08047a0 rlv=0xc0931fb0 (sxiahci_attach+0x480)
rsp=0xc0f3edec rfp=0xc0f3ee18
r6=0xc0904420 r5=0x r4=0xd1135000
sxiahci_attach+0x10
scp=0xc0931b40 rlv=0xc08309e0 (config_attach+0x1d4)
rsp=0xc0f3ee1c

Re: armv7: banana pi, Allwinner A20 board

2014-10-07 Thread SASANO Takayoshi
ukphy0 at sxie0 phy 0: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ukphy1 at sxie0 phy 1: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ahci0 at sunxi0 AHCI 1.1
scsibus0 at ahci0: 32 targets
ehci0 at sunxi0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 Allwinner EHCI root hub rev 2.00/1.00 addr 1
ehci1 at sunxi0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 Allwinner EHCI root hub rev 2.00/1.00 addr 1
(hang-up)

-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: armv7: banana pi, Allwinner A20 board

2014-10-07 Thread SASANO Takayoshi
Hi, here is the log using bsd.SUNXI.umg instead of bsd.rd.SUNXI.img.
(thanks to Theo)

-c invokes UKC, but hangs up at there.

--
OpenBSD/sunxi booting ...
arg0 0x0 arg1 0x10bb arg2 0x4100
atag core flags 0 pagesize 0 rootdev 0
atag cmdline [sd0i:/bsd -c]
atag mem start 0x4000 size 0x4000
bootfile: sd0i:/bsd
bootargs: -c
memory size derived from u-boot
bootconf.mem[0].address = 4000 pages 262144/0x4000
Allocating page tables
freestart = 0x40b9a000, free_pages = 259174 (0x0003f466)
IRQ stack: p0x40bc8000 v0xc0bc8000
ABT stack: p0x40bc9000 v0xc0bc9000
UND stack: p0x40bca000 v0xc0bca000
SVC stack: p0x40bcb000 v0xc0bcb000
Creating L1 page table at 0x40b9c000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 300196 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2014 OpenBSD. All rights reserved.  http://www.OpenBSD.org

User Kernel Config
UKC 

-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: armv7: banana pi, Allwinner A20 board

2014-10-05 Thread SASANO Takayoshi
Hi,

 I've put up a recently built ramdisk with the l1 pte change here:
 http://jsg.id.au/openbsd/bsd.rd.SUNXI.umg

Thanks but not worked...

And, Ethernet PHY(RTL8211E) is recognized as ukphy.
I heard that the power of PHY is controlled by GPIO PH23.
(see http://www.srchack.org/article.php?story=20140501232036142
it is written in Japanese but maybe good hint)

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net


[case 1]
U-Boot SPL 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04)
Board: Bananapi
DRAM: 1024 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04) Allwinner 
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Bananapi
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   dwmac.1c5
Hit any key to stop autoboot:  0 
reading uEnv.txt
116 bytes read in 16 ms (6.8 KiB/s)
Loaded environment from uEnv.txt
Running uenvcmd ...
reading bsd.umg
7386496 bytes read in 365 ms (19.3 MiB/s)
## Booting kernel from Legacy Image at 6000 ...
   Image Name:   boot
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:7386432 Bytes = 7 MiB
   Load Address: 4080
   Entry Point:  4080
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...


OpenBSD/sunxi booting ...
arg0 0x0 arg1 0x10bb arg2 0x4100
atag core flags 0 pagesize 0 rootdev 0
atag cmdline [sd0i:/bsd;]
atag mem start 0x4000 size 0x4000
bootfile: sd0i:/bsd;
bootargs: 
memory size derived from u-boot
bootconf.mem[0].address = 4000 pages 262144/0x4000
Allocating page tables
freestart = 0x40f0c000, free_pages = 258292 (0x0003f0f4)
IRQ stack: p0x40f3a000 v0xc0f3a000
ABT stack: p0x40f3b000 v0xc0f3b000
UND stack: p0x40f3c000 v0xc0f3c000
SVC stack: p0x40f3d000 v0xc0f3d000
Creating L1 page table at 0x40f0c000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 170664 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2014 OpenBSD. All rights reserved.  http://www.OpenBSD.org

OpenBSD 5.6-current (RAMDISK-SUNXI) #0: Sun Oct  5 13:50:18 AEDT 2014
r...@armv7.jsg.id.au:/usr/src/sys/arch/armv7/compile/RAMDISK-SUNXI
real mem  = 1073741824 (1024MB)
avail mem = 1036165120 (988MB)
warning: no entropy supplied by boot loader
mainbus0 at root
cortex0 at mainbus0
ampintc0 at cortex0 nirq 160
cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
sunxi0 at mainbus0: A20
sxipio0 at sunxi0
sxiccmu0 at sunxi0
sxitimer0 at sunxi0: ticktimer 100hz @ 32KHz
sxitimer1 at sunxi0: stattimer 128hz @ 32KHz
sxitimer2 at sunxi0: cntrtimer @ 32KHz
sxidog0 at sunxi0
sxirtc0 at sunxi0
sxiuart0 at sunxi0: console
sxiuart1 at sunxi0
sxiuart2 at sunxi0
sxiuart3 at sunxi0
sxiuart4 at sunxi0
sxiuart5 at sunxi0
sxiuart6 at sunxi0
sxiuart7 at sunxi0
sxie0 at sunxi0, address 02:99:03:c2:d2:6e
ukphy0 at sxie0 phy 0: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ukphy1 at sxie0 phy 1: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ahci0 at sunxi0 AHCI 1.1
scsibus0 at ahci0: 32 targets
ehci0 at sunxi0
pmap_fault_fixup: va c5549000 ftype 2 s pte 7ff8f01e
panic: uvm_fault: fault on non-pageable map (0xc0e7f28c, 0xc5549000)
Stopped at  Debugger+0x4:   ldrbr15, [r15, r15, ror r15]!
panic+0x18
scp=0xc083a2e8 rlv=0xc08c2ea4 (uvm_fault+0xca8)
rsp=0xc0f3eb6c rfp=0xc0f3ec8c
uvm_fault+0xc
scp=0xc08c2208 rlv=0xc08fe258 (data_abort_handler+0x248)
rsp=0xc0f3ec90 rfp=0xc0f3ece4
r10=0xc0f3ece8 r9=0xc0f3d000 r8=0x r7=0xc0e9f764
r6=0x0002 r5=0xc0ebc7b4 r4=0xc5549000
data_abort_handler+0xc
scp=0xc08fe01c rlv=0xc08fda24 (address_exception_entry+0x50)
rsp=0xc0f3ece8 rfp=0xc0f3ed4c
r10=0xc0ebd268 r9=0x1000 r8=0x1000 r7=0x000a
r6=0x000c r5=0xc5549000 r4=0x0010
poison_mem+0xc
scp=0xc0835b04 rlv=0xc081de6c (malloc+0x2ec)
rsp=0xc0f3ed50 rfp=0xc0f3edb8
r5=0xc5549000 r4=0xc5549000
malloc+0x10
scp=0xc081db90 rlv=0xc0808a98 (ehci_init+0x184)
rsp=0xc0f3edbc rfp=0xc0f3edf4
r10=0xc5548294 r9=0xc5548000 r8=0x r7=0xc553d0c0
r6=0xc5548014 r5=0xc5548000 r4=0xc0eb9ebc
ehci_init+0x10
scp=0xc0808924 rlv=0xc0931f94 (sxiehci_attach+0x110)
rsp=0xc0f3edf8 rfp=0xc0f3ee18
r10=0x r9=0xc0f3ee5c r8=0xc0ec0290 r7=0xc553d0c0
r6=0xc5548014 r5=0xc5548000 r4=0x
sxiehci_attach+0x10
scp=0xc0931e94 rlv=0xc083092c (config_attach+0x1d4)
rsp=0xc0f3ee1c rfp=0xc0f3ee54
r6=0xc0970778 r5=0xc5548014 r4=0xc5548000
config_attach+0xc
scp

Re: armv7: banana pi, Allwinner A20 board

2014-10-03 Thread SASANO Takayoshi
Hi,

 When using
 
 OpenBSD 5.6 (RAMDISK-SUNXI) #3: Sun Aug 31 18:46:49 EDT 2014
 
 could you drop into config (pass -c to boot) and try to disable echi?

What shoud I do pass boot -c string to armv7 kernel?
On i386/amd64 bootloader simply type it but armv7 uses U-Boot.

Tweak uEnv.txt?

-- 
SASANO Takayoshi u...@mx5.nisiq.net



armv7: banana pi, Allwinner A20 board

2014-10-02 Thread SASANO Takayoshi
Hello,

I tried bsd.rd.SUNXI.umg snapshot on Banana Pi, cheap Allwinner A20
board like Raspberry Pi (see http://www.lemaker.org/). 

It booted but something wrong. Arch Linux (for Banana Pi) works fine
so I think the board is not broken.

This is my first OpenBSD/armv7 experience and I don't know what is
happening. What can I do for solving this problem? 

-- 
SASANO Takayoshi u...@mx5.nisiq.net

[uEnv.txt]
mmcboot=mmc rescan; fatload mmc 0 0x6000 bsd.umg  bootm 0x6000;
bootargs=sd0a:/bsd;
uenvcmd=run mmcboot;


[1st try - hang up] 
U-Boot SPL 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04)
Board: Bananapi
DRAM: 1024 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04) Allwinner 
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Bananapi
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   dwmac.1c5
Hit any key to stop autoboot:  0 
reading uEnv.txt
116 bytes read in 16 ms (6.8 KiB/s)
Loaded environment from uEnv.txt
Running uenvcmd ...
reading bsd.umg
7387788 bytes read in 367 ms (19.2 MiB/s)
## Booting kernel from Legacy Image at 6000 ...
   Image Name:   boot
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:7387724 Bytes = 7 MiB
   Load Address: 4080
   Entry Point:  4080
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...


OpenBSD/sunxi booting ...
arg0 0x0 arg1 0x10bb arg2 0x4100
atag core flags 0 pagesize 0 rootdev 0
atag cmdline [sd0a:/bsd;]
atag mem start 0x4000 size 0x4000
bootfile: sd0a:/bsd;
bootargs: 
memory size derived from u-boot
bootconf.mem[0].address = 4000 pages 262144/0x4000
Allocating page tables
freestart = 0x40f0c000, free_pages = 258292 (0x0003f0f4)
IRQ stack: p0x40f3a000 v0xc0f3a000
ABT stack: p0x40f3b000 v0xc0f3b000
UND stack: p0x40f3c000 v0xc0f3c000
SVC stack: p0x40f3d000 v0xc0f3d000
Creating L1 page table at 0x40f0c000
Mapping kernel
Constructing L2 page tables
undefined page pmap [ using 169296 bytes of bsd ELF symbol table ]
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2014 OpenBSD. All rights reserved.  http://www.OpenBSD.org

OpenBSD 5.6 (RAMDISK-SUNXI) #3: Sun Aug 31 18:46:49 EDT 2014
r...@pandaes.in.nickh.org:/usr/src/sys/arch/armv7/compile/RAMDISK-SUNXI
real mem  = 1073741824 (1024MB)
avail mem = 1036165120 (988MB)
warning: no entropy supplied by boot loader
mainbus0 at root
cortex0 at mainbus0
ampintc0 at cortex0 nirq 160
cpu0 at mainbus0: ARM Cortex A7 rev 4 (ARMv7 core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB(32b/l,2way) I-cache, 32KB(64b/l,4way) wr-back D-cache
sunxi0 at mainbus0: A20
sxipio0 at sunxi0
sxiccmu0 at sunxi0
sxitimer0 at sunxi0: ticktimer 100hz @ 32KHz
sxitimer1 at sunxi0: stattimer 128hz @ 32KHz
sxitimer2 at sunxi0: cntrtimer @ 32KHz
sxidog0 at sunxi0
sxirtc0 at sunxi0
sxiuart0 at sunxi0: console
sxiuart1 at sunxi0
sxiuart2 at sunxi0
sxiuart3 at sunxi0
sxiuart4 at sunxi0
sxiuart5 at sunxi0
sxiuart6 at sunxi0
sxiuart7 at sunxi0
sxie0 at sunxi0, address 02:99:03:c2:d2:6e
ukphy0 at sxie0 phy 0: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ukphy1 at sxie0 phy 1: Generic IEEE 802.3u media interface, rev. 5: OUI 
0x000732, model 0x0011
ahci0 at sunxi0 AHCI 1.1
scsibus0 at ahci0: 32 targets
ehci0 at sunxi0
usb0 at ehci0: USB revision 2.0
uhub0 at usb0 Allwinner EHCI root hub rev 2.00/1.00 addr 1
ehci1 at sunxi0
usb1 at ehci1: USB revision 2.0
uhub1 at usb1 Allwinner EHCI root hub rev 2.00/1.00 addr 1
(hang up here)


[2nd try - ddb invoked] 
U-Boot SPL 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04)
Board: Bananapi
DRAM: 1024 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04) Allwinner 
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Bananapi
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   dwmac.1c5
Hit any key to stop autoboot:  0 
reading uEnv.txt
116 bytes read in 16 ms (6.8 KiB/s)
Loaded environment from uEnv.txt
Running uenvcmd ...
reading bsd.umg
7387788 bytes read in 370 ms (19 MiB/s)
## Booting kernel from Legacy Image at 6000 ...
   Image Name:   boot
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:7387724 Bytes = 7 MiB
   Load Address: 4080
   Entry Point:  4080
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...


OpenBSD/sunxi booting ...
arg0 0x0 arg1 0x10bb arg2 0x4100
atag core flags 0 pagesize 0 rootdev 0
atag cmdline [sd0a:/bsd;]
atag mem start 0x4000 size

Re: armv7: banana pi, Allwinner A20 board

2014-10-02 Thread SASANO Takayoshi
Hi,

 Try this[1] kernel and have a look if it has the same issue or not.

Kernel did not started... U-Boot says checksum is ok, so maybe
.umg file is not corrupted.

Regards,

-- 
SASANO Takayoshi u...@mx5.nisiq.net


U-Boot SPL 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04)
Board: Bananapi
DRAM: 1024 MiB
CPU: 96000Hz, AXI/AHB/APB: 3/2/2
spl: not an uImage at 1600


U-Boot 2014.04-10694-g2ae8b32-dirty (Oct 01 2014 - 17:40:04) Allwinner 
Technology

CPU:   Allwinner A20 (SUN7I)
Board: Bananapi
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   dwmac.1c5
Hit any key to stop autoboot:  0
reading uEnv.txt
116 bytes read in 16 ms (6.8 KiB/s)
Loaded environment from uEnv.txt
Running uenvcmd ...
reading bsd.umg
9584704 bytes read in 473 ms (19.3 MiB/s)
## Booting kernel from Legacy Image at 6000 ...
   Image Name:   boot
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:9584640 Bytes = 9.1 MiB
   Load Address: 4080
   Entry Point:  4080
   Verifying Checksum ... OK
   Loading Kernel Image ... OK

Starting kernel ...

(halt here)



[patch] puc(4) add Winchiphead CH382 support

2014-09-22 Thread SASANO Takayoshi
Hello,

Here is the patch to support Winchiphead CH382 PCIe-UART device.
I found the board at eBay with cheap price tag.

CH382 has three configurations and different PCI device ID.

  - 2 serial (2S)
  - 2 serial and 1 parallel (2S1P)
  - 1 parallel (1P)

I have 2S board the patch does not support parallel port,
2S1P board will work as 2S.

After patching, CH382 is recognized as 16750 like this.

puc0 at pci3 dev 0 function 0 Nanjing QinHeng Electronics CH382 rev 0x10: port
s: 2 com
com4 at puc0 port 0 apic 5 int 17: ti16750, 64 byte fifo
com5 at puc0 port 1 apic 5 int 17: ti16750, 64 byte fifo

I referred the following pages:
  http://www.spinics.net/lists/linux-serial/msg11744.html
  http://kent-vandervelden.blogspot.jp/2014/08/linux-parallel-port-cards.html

Can I commit?

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: pucdata.c
===
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.93
diff -u -p -r1.93 pucdata.c
--- pucdata.c   13 Aug 2014 07:45:37 -  1.93
+++ pucdata.c   21 Sep 2014 12:28:26 -
@@ -2080,6 +2080,22 @@ const struct puc_device_description puc_
{ PUC_COM_POW2(0), 0x14, 0x },
},
},
+   {   /* WinChipHead CH382 (2S), */
+   {   PCI_VENDOR_WCH2, PCI_PRODUCT_WCH2_CH382_1,  0, 0},
+   {   0x, 0x, 0, 0},
+   {
+   { PUC_COM_POW2(0), 0x10, 0x00c0 },
+   { PUC_COM_POW2(0), 0x10, 0x00c8 },
+   },
+   },
+   {   /* WinChipHead CH382 (2S1P), */
+   {   PCI_VENDOR_WCH2, PCI_PRODUCT_WCH2_CH382_2,  0, 0},
+   {   0x, 0x, 0, 0},
+   {
+   { PUC_COM_POW2(0), 0x10, 0x00c0 },
+   { PUC_COM_POW2(0), 0x10, 0x00c8 },
+   },
+   },
{   /* NetMos NM9820 UART */
{   PCI_VENDOR_NETMOS, PCI_PRODUCT_NETMOS_NM9820,   0, 0},
{   0x, 0x, 0, 0},



add Winchiphead CH382 PCIe-UART to pcidevs

2014-09-21 Thread SASANO Takayoshi
Hello,

Here is Nanjing QinHeng Electronics (Winchiphead)'s CH382
PCIe-UART controller's PCI vendor/device ID.

Chinese Datasheet can be obtained from
http://www.wch.cn/downloads/downfile.php?id=140

Can I commit?

Regards,

-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1741
diff -u -p -r1.1741 pcidevs
--- pcidevs 13 Sep 2014 05:11:27 -  1.1741
+++ pcidevs 21 Sep 2014 06:53:14 -
@@ -327,6 +327,7 @@ vendor  REDHAT  0x1b36  Red Hat
 vendor MARVELL20x1b4b  Marvell
 vendor ETRON   0x1b6f  Etron
 vendor FRESCO  0x1b73  Fresco Logic
+vendor WCH20x1c00  Nanjing QinHeng Electronics
 vendor SYMPHONY2   0x1c1c  Symphony Labs
 vendor TEKRAM2 0x1de1  Tekram
 vendor TEHUTI  0x1fc9  Tehuti Networks
@@ -4765,6 +4766,8 @@ product MUTECH MV1000 0x0001  MV1000
 
 /* Nanjing QinHeng Electronics products */
 product WCH CH352  0x3253  CH352
+product WCH2 CH382_1   0x3253  CH382
+product WCH2 CH382_2   0x3250  CH382
 
 /* National Datacomm Corp products */
 product NDC NCP130 0x0130  NCP130



pciide(4): port NetBSD's rdcide(4)

2014-07-13 Thread SASANO Takayoshi
Hello,

I am playing with 86duino EduCake, and I found pciide(4) did not support DMA
of Vortex86EX SoC (RDC R1012).

I tried to port NetBSD's rdcide(4) and it seems to work.

Here is the diff, and please tell me how to test more verbose.
At least there is no problem to build -current kernel, but poor performance
boost because CPU is too slow... 109min - 101min :-(.

Regards,

-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: pciide.c
===
RCS file: /cvs/src/sys/dev/pci/pciide.c,v
retrieving revision 1.345
diff -u -p -r1.345 pciide.c
--- pciide.c24 Apr 2014 15:38:25 -  1.345
+++ pciide.c13 Jul 2014 20:44:40 -
@@ -123,6 +123,7 @@ int wdcdebug_pciide_mask = WDCDEBUG_PCII
 #include dev/pci/pciide_ixp_reg.h
 #include dev/pci/pciide_svwsata_reg.h
 #include dev/pci/pciide_jmicron_reg.h
+#include dev/pci/pciide_rdc_reg.h
 #include dev/pci/cy82c693var.h
 
 /* functions for reading/writing 8-bit PCI registers */
@@ -282,6 +283,9 @@ void phison_setup_channel(struct channel
 void sch_chip_map(struct pciide_softc *, struct pci_attach_args *);
 void sch_setup_channel(struct channel_softc *);
 
+void rdc_chip_map(struct pciide_softc *, struct pci_attach_args *);
+void rdc_setup_channel(struct channel_softc *);
+
 struct pciide_product_desc {
u_int32_t ide_product;
u_short ide_flags;
@@ -1335,6 +1339,13 @@ const struct pciide_product_desc pciide_
},
 };
 
+const struct pciide_product_desc pciide_rdc_products[] = {
+   { PCI_PRODUCT_RDC_R1012_IDE,
+ 0,
+ rdc_chip_map
+   },
+};
+
 struct pciide_vendor_desc {
u_int32_t ide_vendor;
const struct pciide_product_desc *ide_products;
@@ -1379,7 +1390,9 @@ const struct pciide_vendor_desc pciide_v
{ PCI_VENDOR_JMICRON, pciide_jmicron_products,
  nitems(pciide_jmicron_products) },
{ PCI_VENDOR_PHISON, pciide_phison_products,
- nitems(pciide_phison_products) }
+ nitems(pciide_phison_products) },
+   { PCI_VENDOR_RDC, pciide_rdc_products,
+ nitems(pciide_rdc_products) }
 };
 
 /* options passed via the 'flags' config keyword */
@@ -1581,6 +1594,7 @@ pciide_activate(struct device *self, int
sc-sc_pp-chip_map == piix_chip_map ||
sc-sc_pp-chip_map == amd756_chip_map ||
sc-sc_pp-chip_map == phison_chip_map ||
+   sc-sc_pp-chip_map == rdc_chip_map ||
sc-sc_pp-chip_map == ixp_chip_map ||
sc-sc_pp-chip_map == acard_chip_map ||
sc-sc_pp-chip_map == apollo_chip_map ||
@@ -9103,4 +9117,151 @@ pio:
}
 
pciide_print_modes(cp);
+}
+
+void
+rdc_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
+{
+   struct pciide_channel *cp;
+   int channel;
+   u_int32_t patr;
+   pcireg_t interface = PCI_INTERFACE(pa-pa_class);
+   bus_size_t cmdsize, ctlsize;
+
+   printf(: DMA);
+   pciide_mapreg_dma(sc, pa);
+   sc-sc_wdcdev.cap |= WDC_CAPABILITY_DATA16 | WDC_CAPABILITY_DATA32;
+   if (sc-sc_dma_ok) {
+   sc-sc_wdcdev.cap |= WDC_CAPABILITY_UDMA |
+   WDC_CAPABILITY_DMA | WDC_CAPABILITY_IRQACK;
+   sc-sc_wdcdev.irqack = pciide_irqack;
+   sc-sc_wdcdev.dma_init = pciide_dma_init;
+   }
+   sc-sc_wdcdev.PIO_cap = 4;
+   sc-sc_wdcdev.DMA_cap = 2;
+   sc-sc_wdcdev.UDMA_cap = 5;
+   sc-sc_wdcdev.set_modes = rdc_setup_channel;
+   sc-sc_wdcdev.channels = sc-wdc_chanarray;
+   sc-sc_wdcdev.nchannels = PCIIDE_NUM_CHANNELS;
+
+   pciide_print_channels(sc-sc_wdcdev.nchannels, interface);
+
+   WDCDEBUG_PRINT((rdc_chip_map: old PATR=0x%x, 
+   PSD1ATR=0x%x, UDCCR=0x%x, IIOCR=0x%x\n,
+   pci_conf_read(sc-sc_pc, sc-sc_tag, RDCIDE_PATR),
+   pci_conf_read(sc-sc_pc, sc-sc_tag, RDCIDE_PSD1ATR),
+   pci_conf_read(sc-sc_pc, sc-sc_tag, RDCIDE_UDCCR),
+   pci_conf_read(sc-sc_pc, sc-sc_tag, RDCIDE_IIOCR)),
+  DEBUG_PROBE);
+
+   for (channel = 0; channel  sc-sc_wdcdev.nchannels; channel++) {
+   cp = sc-pciide_channels[channel];
+
+   if (pciide_chansetup(sc, channel, interface) == 0)
+   continue;
+   patr = pci_conf_read(sc-sc_pc, sc-sc_tag, RDCIDE_PATR);
+   if ((patr  RDCIDE_PATR_EN(channel)) == 0) {
+   printf(%s: %s ignored (disabled)\n,
+  sc-sc_wdcdev.sc_dev.dv_xname, cp-name);
+   continue;
+   }
+   pciide_map_compat_intr(pa, cp, channel, interface);
+   if (cp-hw_ok == 0)
+   continue;
+   pciide_mapchan(pa, cp, interface, cmdsize, ctlsize,
+  pciide_pci_intr);
+   if (cp-hw_ok

pcidevs: add devices for Vortex86EX SoC

2014-07-09 Thread SASANO Takayoshi
Hello, here is device list for DMP Vortex86EX SoC.
ok?

Index: pcidevs
===
RCS file: /cvs/src/sys/dev/pci/pcidevs,v
retrieving revision 1.1730
diff -u -p -r1.1730 pcidevs
--- pcidevs 8 Jul 2014 08:55:33 -   1.1730
+++ pcidevs 9 Jul 2014 19:44:53 -
@@ -5830,11 +5830,20 @@ product RALINK RT5390   0x5390  RT5390
 /* RDC products */
 product RDC R1010_IDE  0x1010  R1010 IDE
 product RDC R1011_IDE  0x1011  R1011 IDE
+product RDC R1012_IDE  0x1012  R1012 IDE
+product RDC R1031_PCIE 0x1031  R1031 PCIe
+product RDC R1060_USBD 0x1060  R1060 USB Device
+product RDC R1070_CAN  0x1070  R1070 CAN
+product RDC R1331_MC   0x1331  R1331 MC
+product RDC R1710_SPI  0x1710  R1710 SPI
+product RDC R3010_HDA  0x3010  R3010 HDA
+product RDC R6011_SB   0x6011  R6011 SB
 product RDC R6021_HB   0x6021  R6021 Host
+product RDC R6025_HB   0x6025  R6025 Host
 product RDC R6031_ISA  0x6031  R6031 ISA
 product RDC R6040_ETHER0x6040  R6040 Ethernet
-product RDC R6060_OHCI 0x6060  R6060 USB
-product RDC R6061_EHCI 0x6061  R6061 USB
+product RDC R6060_OHCI 0x6060  R6060 USB OHCI
+product RDC R6061_EHCI 0x6061  R6061 USB EHCI
 
 /* Realtek products */
 product REALTEK RTS52090x5209  RTS5209 Card Reader


-- 
SASANO Takayoshi u...@mx5.nisiq.net



uchcom(4) did not work

2014-05-13 Thread SASANO Takayoshi
Hello,

Recently I bought Arduino board which uses Nanjing QinHeng (WinChipHead)
CH340T USB-UART bridge via eBay, and I found uchcom(4) did not work.
At misc@, other user reported similar problem. [1]

The uchcom(4) comes from NetBSD and it seems to be worked at that time.

I found that uchcom_set_line_control() breaks the value of
UCHCOM_REG_LCR1(0x18) makes the problem. The UCHCOM_REG_LCR1 register
seems to control parity bit (none/odd/even) but I doubt the role of that
register has changed between old/new CH340T chip.

At least following changes are required to work my CH340T but parity bit
control is no longer supported.

If there is no problem, I want to commit.

[1] 
http://openbsd.7691.n7.nabble.com/issue-with-WinChipHead-CH340-usb-serial-td99678.html

Index: uchcom.c
===
RCS file: /cvs/src/sys/dev/usb/uchcom.c,v
retrieving revision 1.19
diff -u -p -r1.19 uchcom.c
--- uchcom.c15 Nov 2013 10:17:39 -  1.19
+++ uchcom.c13 May 2014 19:43:37 -
@@ -91,14 +91,6 @@ int  uchcomdebug = 0;
 #define UCHCOM_BRK1_MASK   0x01
 #define UCHCOM_BRK2_MASK   0x40
 
-#define UCHCOM_LCR1_MASK   0xAF
-#define UCHCOM_LCR2_MASK   0x07
-#define UCHCOM_LCR1_PARENB 0x80
-#define UCHCOM_LCR2_PAREVEN0x07
-#define UCHCOM_LCR2_PARODD 0x06
-#define UCHCOM_LCR2_PARMARK0x05
-#define UCHCOM_LCR2_PARSPACE   0x04
-
 #define UCHCOM_INTR_STAT1  0x02
 #define UCHCOM_INTR_STAT2  0x03
 #define UCHCOM_INTR_LEAST  4
@@ -707,27 +699,10 @@ uchcom_set_dte_rate(struct uchcom_softc 
 int
 uchcom_set_line_control(struct uchcom_softc *sc, tcflag_t cflag)
 {
-   usbd_status err;
-   uint8_t lcr1 = 0, lcr2 = 0;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2,
-   lcr2);
-   if (err) {
-   printf(%s: cannot get LCR: %s\n,
-  sc-sc_dev.dv_xname, usbd_errstr(err));
-   return EIO;
-   }
-
-   lcr1 = ~UCHCOM_LCR1_MASK;
-   lcr2 = ~UCHCOM_LCR2_MASK;
-
/*
 * XXX: it is difficult to handle the line control appropriately:
-*   - CS8, !CSTOPB and any parity mode seems ok, but
-*   - the chip doesn't have the function to calculate parity
-* in !CS8 mode.
-*   - it is unclear that the chip supports CS5,6 mode.
-*   - it is unclear how to handle stop bits.
+*   work as chip default - CS8, no parity, !CSTOPB
+*   other modes are not supported.
 */
 
switch (ISSET(cflag, CSIZE)) {
@@ -739,21 +714,8 @@ uchcom_set_line_control(struct uchcom_so
break;
}
 
-   if (ISSET(cflag, PARENB)) {
-   lcr1 |= UCHCOM_LCR1_PARENB;
-   if (ISSET(cflag, PARODD))
-   lcr2 |= UCHCOM_LCR2_PARODD;
-   else
-   lcr2 |= UCHCOM_LCR2_PAREVEN;
-   }
-
-   err = uchcom_write_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2,
-   lcr2);
-   if (err) {
-   printf(%s: cannot set LCR: %s\n,
-  sc-sc_dev.dv_xname, usbd_errstr(err));
-   return EIO;
-   }
+   if (ISSET(cflag, PARENB) || ISSET(cflag, CSTOPB))
+   return EINVAL;
 
return 0;
 }
@@ -778,33 +740,10 @@ int
 uchcom_reset_chip(struct uchcom_softc *sc)
 {
usbd_status err;
-   uint8_t lcr1, lcr2, pre, div, mod;
-   uint16_t val=0, idx=0;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2, 
lcr2);
-   if (err)
-   goto failed;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_BPS_PRE, pre, UCHCOM_REG_BPS_DIV,
-   div);
-   if (err)
-   goto failed;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_BPS_MOD, mod, UCHCOM_REG_BPS_PAD,
-   NULL);
-   if (err)
-   goto failed;
+   uint16_t val, idx;
 
-   val |= (uint16_t)(lcr10xF0)  8;
-   val |= 0x01;
-   val |= (uint16_t)(lcr20x0F)  8;
-   val |= 0x02;
-   idx |= pre  0x07;
-   val |= 0x04;
-   idx |= (uint16_t)div  8;
-   val |= 0x08;
-   idx |= mod  0xF8;
-   val |= 0x10;
+   val = 0x501f;
+   idx = 0xd90a;
 
DPRINTF((%s: reset v=0x%04X, i=0x%04X\n,
 sc-sc_dev.dv_xname, val, idx));



Re: uchcom(4) did not work

2014-05-13 Thread SASANO Takayoshi
Hi, Mike.

 +val = 0x501f;
 +idx = 0xd90a;
 
 What are these magic numbers?

These numbers come from Linux driver (ch341.c). I don't know what they mean.
Maybe these numbers represent default character length and baudrate divisor.

http://lxr.cpsc.ucalgary.ca/lxr/#linux+v2.6.31/drivers/usb/serial/ch341.c#L217

With my CH340T, uchcom(4) generates val=0x401f/idx=0xb2d2.

uchcom(4) reads CH340 registers to make val/idx value but I think this
method is improper for initialize. Because none can take the initial state
when the chip's default value has changed.

It seems that the content/function of UCHCOM_REG_LCR1 has been changed,
and generated results are doubtful. So I use Linux's magic numbers.

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: uchcom(4) did not work

2014-05-13 Thread SASANO Takayoshi
Hi,

Simply magic values are rewrited with #define.
If these values need to be disassembled, please take a while...


SASANO Takayoshi u...@mx5.nisiq.net

Index: uchcom.c
===
RCS file: /cvs/src/sys/dev/usb/uchcom.c,v
retrieving revision 1.19
diff -u -p -r1.19 uchcom.c
--- uchcom.c15 Nov 2013 10:17:39 -  1.19
+++ uchcom.c14 May 2014 01:43:34 -
@@ -91,18 +91,14 @@ int uchcomdebug = 0;
 #define UCHCOM_BRK1_MASK   0x01
 #define UCHCOM_BRK2_MASK   0x40
 
-#define UCHCOM_LCR1_MASK   0xAF
-#define UCHCOM_LCR2_MASK   0x07
-#define UCHCOM_LCR1_PARENB 0x80
-#define UCHCOM_LCR2_PAREVEN0x07
-#define UCHCOM_LCR2_PARODD 0x06
-#define UCHCOM_LCR2_PARMARK0x05
-#define UCHCOM_LCR2_PARSPACE   0x04
-
 #define UCHCOM_INTR_STAT1  0x02
 #define UCHCOM_INTR_STAT2  0x03
 #define UCHCOM_INTR_LEAST  4
 
+/* these values come from Linux (drivers/usb/serial/ch341.c) */
+#define UCHCOM_RESET_VALUE 0x501F  /* XXX default line mode? */
+#define UCHCOM_RESET_INDEX 0xD90A  /* XXX default baud rate? */
+
 #define UCHCOMIBUFSIZE 256
 #define UCHCOMOBUFSIZE 256
 
@@ -707,27 +703,10 @@ uchcom_set_dte_rate(struct uchcom_softc 
 int
 uchcom_set_line_control(struct uchcom_softc *sc, tcflag_t cflag)
 {
-   usbd_status err;
-   uint8_t lcr1 = 0, lcr2 = 0;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2,
-   lcr2);
-   if (err) {
-   printf(%s: cannot get LCR: %s\n,
-  sc-sc_dev.dv_xname, usbd_errstr(err));
-   return EIO;
-   }
-
-   lcr1 = ~UCHCOM_LCR1_MASK;
-   lcr2 = ~UCHCOM_LCR2_MASK;
-
/*
 * XXX: it is difficult to handle the line control appropriately:
-*   - CS8, !CSTOPB and any parity mode seems ok, but
-*   - the chip doesn't have the function to calculate parity
-* in !CS8 mode.
-*   - it is unclear that the chip supports CS5,6 mode.
-*   - it is unclear how to handle stop bits.
+*   work as chip default - CS8, no parity, !CSTOPB
+*   other modes are not supported.
 */
 
switch (ISSET(cflag, CSIZE)) {
@@ -739,21 +718,8 @@ uchcom_set_line_control(struct uchcom_so
break;
}
 
-   if (ISSET(cflag, PARENB)) {
-   lcr1 |= UCHCOM_LCR1_PARENB;
-   if (ISSET(cflag, PARODD))
-   lcr2 |= UCHCOM_LCR2_PARODD;
-   else
-   lcr2 |= UCHCOM_LCR2_PAREVEN;
-   }
-
-   err = uchcom_write_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2,
-   lcr2);
-   if (err) {
-   printf(%s: cannot set LCR: %s\n,
-  sc-sc_dev.dv_xname, usbd_errstr(err));
-   return EIO;
-   }
+   if (ISSET(cflag, PARENB) || ISSET(cflag, CSTOPB))
+   return EINVAL;
 
return 0;
 }
@@ -778,38 +744,12 @@ int
 uchcom_reset_chip(struct uchcom_softc *sc)
 {
usbd_status err;
-   uint8_t lcr1, lcr2, pre, div, mod;
-   uint16_t val=0, idx=0;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_LCR1, lcr1, UCHCOM_REG_LCR2, 
lcr2);
-   if (err)
-   goto failed;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_BPS_PRE, pre, UCHCOM_REG_BPS_DIV,
-   div);
-   if (err)
-   goto failed;
-
-   err = uchcom_read_reg(sc, UCHCOM_REG_BPS_MOD, mod, UCHCOM_REG_BPS_PAD,
-   NULL);
-   if (err)
-   goto failed;
-
-   val |= (uint16_t)(lcr10xF0)  8;
-   val |= 0x01;
-   val |= (uint16_t)(lcr20x0F)  8;
-   val |= 0x02;
-   idx |= pre  0x07;
-   val |= 0x04;
-   idx |= (uint16_t)div  8;
-   val |= 0x08;
-   idx |= mod  0xF8;
-   val |= 0x10;
 
-   DPRINTF((%s: reset v=0x%04X, i=0x%04X\n,
-sc-sc_dev.dv_xname, val, idx));
+   DPRINTF((%s: reset\n, sc-sc_dev.dv_xname));
 
-   err = uchcom_generic_control_out(sc, UCHCOM_REQ_RESET, val, idx);
+   err = uchcom_generic_control_out(sc, UCHCOM_REQ_RESET,
+UCHCOM_RESET_VALUE,
+UCHCOM_RESET_INDEX);
if (err)
goto failed;



umodem.c: debug message fix

2014-04-30 Thread SASANO Takayoshi
Hello,

I found some debug messages need to be fixed in sys/dev/usb/umodem.c.
Can I commit the diff?


SASANO Takayoshi u...@mx5.nisiq.net

Index: umodem.c
===
RCS file: /cvs/src/sys/dev/usb/umodem.c,v
retrieving revision 1.55
diff -u -p -r1.55 umodem.c
--- umodem.c30 Jan 2014 20:37:03 -  1.55
+++ umodem.c30 Apr 2014 19:50:23 -
@@ -576,7 +576,7 @@ umodem_ioctl(void *addr, int portno, u_l
if (usbd_is_dying(sc-sc_udev))
return (EIO);
 
-   DPRINTF((umodemioctl: cmd=0x%08lx\n, cmd));
+   DPRINTF((umodem_ioctl: cmd=0x%08lx\n, cmd));
 
switch (cmd) {
case USB_GET_CM_OVER_DATA:
@@ -590,7 +590,7 @@ umodem_ioctl(void *addr, int portno, u_l
break;
 
default:
-   DPRINTF((umodemioctl: unknown\n));
+   DPRINTF((umodem_ioctl: unknown\n));
error = ENOTTY;
break;
}
@@ -601,7 +601,7 @@ umodem_ioctl(void *addr, int portno, u_l
 void
 umodem_dtr(struct umodem_softc *sc, int onoff)
 {
-   DPRINTF((umodem_modem: onoff=%d\n, onoff));
+   DPRINTF((umodem_dtr: onoff=%d\n, onoff));
 
if (sc-sc_dtr == onoff)
return;
@@ -613,7 +613,7 @@ umodem_dtr(struct umodem_softc *sc, int 
 void
 umodem_rts(struct umodem_softc *sc, int onoff)
 {
-   DPRINTF((umodem_modem: onoff=%d\n, onoff));
+   DPRINTF((umodem_rts: onoff=%d\n, onoff));
 
if (sc-sc_rts == onoff)
return;




Re: azalia(4): RIRB DMA engine needs delay after started

2014-02-25 Thread SASANO Takayoshi
Hi,

 Thanks, here is a slightly reworked diff that does the wait in a way
 that's more in line with other bits of azalia(4) that wait for a bit
 in a register to go on or off.

Okay, there is no problem with my 86duino EduCake. Thanks.
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: azalia(4): RIRB DMA engine needs delay after started

2014-02-25 Thread SASANO Takayoshi
Hello,

 This can wait til after 5.5, but I made the diff since I was looking
 at the code.

ok by sasano@, it works on my 86duino EduCake!

SASANO Takayoshi u...@mx5.nisiq.net



azalia(4): RIRB DMA engine needs delay after started

2014-02-24 Thread SASANO Takayoshi
Hello,

I am trying OpenBSD-current/i386 on 86duino EduCake.
It uses DMP Vortex86EX SoC and its azalia fails to find ALC262 codec.

The diagnostic message says RIRB is not running
(at azalia_get_response()), and I found Vortex86EX's azalia takes 2~4
DELAY(1)s to start RIRB DMA engine.

(Vortex86EX's CORB DMA did not required any delay. It starts immediately.)

Here is the patch to add delay.

Regards,
--
SASANO Takayoshi u...@mx5.nisiq.net

Index: azalia.c
===
RCS file: /cvs/src/sys/dev/pci/azalia.c,v
retrieving revision 1.209
diff -u -p -r1.209 azalia.c
--- azalia.c30 Dec 2013 10:53:30 -  1.209
+++ azalia.c24 Feb 2014 20:45:37 -
@@ -1110,7 +1110,7 @@ azalia_halt_rirb(azalia_t *az)
 int
 azalia_init_rirb(azalia_t *az, int resuming)
 {
-   int err;
+   int err, i;
uint16_t rirbwp;
uint8_t rirbctl;
 
@@ -1161,6 +1161,14 @@ azalia_init_rirb(azalia_t *az, int resum
rirbctl = AZ_READ_1(az, RIRBCTL);
AZ_WRITE_1(az, RIRBCTL, rirbctl |
HDA_RIRBCTL_RIRBDMAEN | HDA_RIRBCTL_RINTCTL);
+
+   /* wait for RIRB DMA engine is running */
+   for (i = 1000; i = 0; i--) {
+   if (AZ_READ_1(az, RIRBCTL)  HDA_RIRBCTL_RIRBDMAEN)
+   break;
+   DELAY(1);
+   }
+   DPRINTF((%s: wait counter = %d\n, __func__, i));
 
return (0);
 }



udav(4): add CoreChip RD9700 support

2014-01-21 Thread SASANO Takayoshi
Hi,

Here is a patch adding CoreChip RD9700 support to udav(4).

The chip is used by USB-Ethernet dongles for Android gadget, they are
sold at eBay with cheap price tag (under 5.00 USD).

RD9700 is bad DM9601 copy.

The description of these dongles says USB 2.0 10/100Mbps but
actually they work with USB 1.1 (full-speed) and 10Mbps half-duplex.

They have no serial EEPROM, no different MAC address. I have two
dongles and they have same address (00:e0:4c:53:44:58) and Windows'
driver sets 00:01:0a:XX:XX:XX (XX:XX:XX is different).

RD9700 does not have MII-PHY so the patch simply bypasses MII related
routine.

The performance is poor, receive is extremely slow.

At RD9700's bulk-in pipe, sometimes there is no Zero-Length-Packet
(ZLP) to show the end of USB transaction. The device uses one Ethernet
frame as one USB transaction, so no ZLP makes dropping frame. There is
no remedy for this problem.

Comments or ok?

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net

Index: if_udav.c
===
RCS file: /cvs/src/sys/dev/usb/if_udav.c,v
retrieving revision 1.64
diff -u -p -r1.64 if_udav.c
--- if_udav.c   15 Nov 2013 10:17:39 -  1.64
+++ if_udav.c   21 Jan 2014 21:06:30 -
@@ -109,6 +109,7 @@ void udav_txeof(struct usbd_xfer *, void
 void udav_rxeof(struct usbd_xfer *, void *, usbd_status);
 void udav_tick(void *);
 void udav_tick_task(void *);
+void udav_tick_task_rd9700(void *);
 int udav_ioctl(struct ifnet *, u_long, caddr_t);
 void udav_stop_task(struct udav_softc *);
 void udav_stop(struct ifnet *, int);
@@ -155,6 +156,7 @@ static const struct udav_type {
struct usb_devno udav_dev;
u_int16_t udav_flags;
 #define UDAV_EXT_PHY   0x0001
+#define UDAV_RD97000x0002
 } udav_devs [] = {
{{ USB_VENDOR_COREGA, USB_PRODUCT_COREGA_FETHER_USB_TXC }, 0 },
{{ USB_VENDOR_DAVICOM, USB_PRODUCT_DAVICOM_DM9601 }, 0 },
@@ -164,7 +166,8 @@ static const struct udav_type {
{{ USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ZT6688 }, 0 },
{{ USB_VENDOR_SHANTOU, USB_PRODUCT_SHANTOU_ADM8515 }, 0 },
{{ USB_VENDOR_UNKNOWN4, USB_PRODUCT_UNKNOWN4_DM9601 }, 0 },
-   {{ USB_VENDOR_UNKNOWN6, USB_PRODUCT_UNKNOWN6_DM9601 }, 0 }
+   {{ USB_VENDOR_UNKNOWN6, USB_PRODUCT_UNKNOWN6_DM9601 }, 0 },
+   {{ USB_VENDOR_UNKNOWN4, USB_PRODUCT_UNKNOWN4_RD9700 }, UDAV_RD9700 },
 };
 #define udav_lookup(v, p) ((struct udav_type *)usb_lookup(udav_devs, v, p))
 
@@ -202,6 +205,7 @@ udav_attach(struct device *parent, struc
printf(%s: , devname);
 
sc-sc_udev = dev;
+   sc-sc_flags = udav_lookup(uaa-vendor, uaa-product)-udav_flags;
 
/* Move the device into the configured state. */
err = usbd_set_config_no(dev, UDAV_CONFIG_NO, 1);
@@ -210,8 +214,8 @@ udav_attach(struct device *parent, struc
goto bad;
}
 
-   usb_init_task(sc-sc_tick_task, udav_tick_task, sc,
-   USB_TASK_TYPE_GENERIC);
+   usb_init_task(sc-sc_tick_task, (sc-sc_flags  UDAV_RD9700) ?
+   udav_tick_task_rd9700 : udav_tick_task, sc, USB_TASK_TYPE_GENERIC);
rw_init(sc-sc_mii_lock, udavmii);
usb_init_task(sc-sc_stop_task, (void (*)(void *)) udav_stop_task, sc,
USB_TASK_TYPE_GENERIC);
@@ -224,7 +228,6 @@ udav_attach(struct device *parent, struc
}
 
sc-sc_ctl_iface = iface;
-   sc-sc_flags = udav_lookup(uaa-vendor, uaa-product)-udav_flags;
 
/* get interface descriptor */
id = usbd_get_interface_descriptor(sc-sc_ctl_iface);
@@ -294,12 +297,20 @@ udav_attach(struct device *parent, struc
mii-mii_flags = MIIF_AUTOTSLEEP;
ifmedia_init(mii-mii_media, 0,
 udav_ifmedia_change, udav_ifmedia_status);
-   mii_attach(self, mii, 0x, MII_PHY_ANY, MII_OFFSET_ANY, 0);
-   if (LIST_FIRST(mii-mii_phys) == NULL) {
+   if (sc-sc_flags  UDAV_RD9700) {
+   /* no MII-PHY */
ifmedia_add(mii-mii_media, IFM_ETHER | IFM_NONE, 0, NULL);
ifmedia_set(mii-mii_media, IFM_ETHER | IFM_NONE);
-   } else
-   ifmedia_set(mii-mii_media, IFM_ETHER | IFM_AUTO);
+   } else {
+   mii_attach(self, mii, 0x, 
+  MII_PHY_ANY, MII_OFFSET_ANY, 0);
+   if (LIST_FIRST(mii-mii_phys) == NULL) {
+   ifmedia_add(mii-mii_media, IFM_ETHER | IFM_NONE,
+   0, NULL);
+   ifmedia_set(mii-mii_media, IFM_ETHER | IFM_NONE);
+   } else
+   ifmedia_set(mii-mii_media, IFM_ETHER | IFM_AUTO);
+   }
 
/* attach the interface */
if_attach(ifp);
@@ -342,7 +353,8 @@ udav_detach(struct device *self, int fla
if (ifp-if_flags  IFF_RUNNING)
udav_stop(GET_IFP(sc), 1);
 
-   mii_detach(sc-sc_mii, MII_PHY_ANY, MII_OFFSET_ANY);
+   if (!(sc-sc_flags  UDAV_RD9700

ugl(4): self-dv_unit fix (Re: cdce(4): sc-cdce_unit)

2013-12-05 Thread SASANO Takayoshi
Hello,

if_ugl.c has similar issue, and I think this should be fixed.
ok to commit?


SASANO Takayoshi u...@mx5.nisiq.net

Index: if_ugl.c
===
RCS file: /cvs/src/sys/dev/usb/if_ugl.c,v
retrieving revision 1.2
diff -u -p -r1.2 if_ugl.c
--- if_ugl.c3 Dec 2013 21:06:59 -   1.2
+++ if_ugl.c5 Dec 2013 20:06:50 -
@@ -152,7 +152,6 @@ struct ugl_softc {
 
uByte   sc_ibuf[UGL_INTR_PKTLEN];
 
-   int sc_unit;
u_int   sc_rx_errs;
struct timeval  sc_rx_notice;
u_int   sc_intr_errs;
@@ -246,7 +245,6 @@ ugl_attach(struct device *parent, struct
return;
}
 
-   sc-sc_unit = self-dv_unit;
sc-sc_udev = dev;
sc-sc_product = uaa-product;
sc-sc_vendor = uaa-vendor;
@@ -292,7 +290,7 @@ ugl_attach(struct device *parent, struct
macaddr_hi = htons(0x2acb);
bcopy(macaddr_hi, sc-sc_arpcom.ac_enaddr[0], sizeof(u_int16_t));
bcopy(ticks, sc-sc_arpcom.ac_enaddr[2], sizeof(u_int32_t));
-   sc-sc_arpcom.ac_enaddr[5] = (u_int8_t)(sc-sc_unit);
+   sc-sc_arpcom.ac_enaddr[5] = (u_int8_t)(sc-sc_dev.dv_unit);
 
printf(%s: address %s\n,
sc-sc_dev.dv_xname, ether_sprintf(sc-sc_arpcom.ac_enaddr));



Re: Genesys Logic GL620USB-A, USB PC-to-PC link cable (take 2)

2013-12-03 Thread SASANO Takayoshi
Hello,

jca@ privately advised that I should write my own copyright to
describe who modified the code.

I am planning to add notice like if_axe.c and sent the diff to
him but there is no answer (too busy?). So I ask here.

Is there any good solution?

Thanks,

SASANO Takayoshi u...@mx5.nisiq.net

Index: if_ugl.c
===
RCS file: /cvs/src/sys/dev/usb/if_ugl.c,v
retrieving revision 1.1
diff -u -p -r1.1 if_ugl.c
--- if_ugl.c15 Nov 2013 19:42:20 -  1.1
+++ if_ugl.c3 Dec 2013 20:36:32 -
@@ -1,6 +1,22 @@
 /* $OpenBSD: if_ugl.c,v 1.1 2013/11/15 19:42:20 sasano Exp $   */
 /* $NetBSD: if_upl.c,v 1.19 2002/07/11 21:14:26 augustss Exp $ */
 /*
+ * Copyright (c) 2013 SASANO Takayoshi u...@uaa.org.uk
+ *
+ * Permission to use, copy, modify, and distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/*
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
  * All rights reserved.
  *



cdce(4): sc-cdce_unit

2013-12-03 Thread SASANO Takayoshi
Hello,

I read sys/dev/usb/if_cdce.c and found sc-cdce_unit is refered but
none initializes. Maybe the fix is required like this :-

Index: if_cdce.c
===
RCS file: /cvs/src/sys/dev/usb/if_cdce.c,v
retrieving revision 1.57
diff -u -p -r1.57 if_cdce.c
--- if_cdce.c   15 Nov 2013 10:17:39 -  1.57
+++ if_cdce.c   3 Dec 2013 20:36:44 -
@@ -177,6 +177,7 @@ cdce_attach(struct device *parent, struc
int  ctl_ifcno = -1;
int  data_ifcno = -1;
 
+   sc-cdce_unit = self-dv_unit;
sc-cdce_udev = uaa-device;
sc-cdce_ctl_iface = uaa-iface;
id = usbd_get_interface_descriptor(sc-cdce_ctl_iface);

And, sc-sc_unit of sys/dev/usb/if_cdcef.c seems to have save problem.

Regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: Genesys Logic GL620USB-A, USB PC-to-PC link cable (take 2)

2013-11-16 Thread SASANO Takayoshi
Hello,

Oh, I forgot to write man. Here is...

Index: ugl.4
===
RCS file: ugl.4
diff -N ugl.4
--- /dev/null   1 Jan 1970 00:00:00 -
+++ ugl.4   16 Nov 2013 10:26:45 -
@@ -0,0 +1,55 @@
+.\ $OpenBSD$
+.\ $NetBSD: upl.4,v 1.3 2000/08/12 17:59:12 augustss Exp $
+.\
+.\ Copyright (c) 2000 The NetBSD Foundation, Inc.
+.\ All rights reserved.
+.\
+.\ This code is derived from software contributed to The NetBSD Foundation
+.\ by Lennart Augustsson.
+.\
+.\ Redistribution and use in source and binary forms, with or without
+.\ modification, are permitted provided that the following conditions
+.\ are met:
+.\ 1. Redistributions of source code must retain the above copyright
+.\notice, this list of conditions and the following disclaimer.
+.\ 2. Redistributions in binary form must reproduce the above copyright
+.\notice, this list of conditions and the following disclaimer in the
+.\documentation and/or other materials provided with the distribution.
+.\
+.\ THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+.\ ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+.\ TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+.\ PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+.\ BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+.\ CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+.\ SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+.\ INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+.\ CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+.\ ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+.\ POSSIBILITY OF SUCH DAMAGE.
+.\
+.Dd $Mdocdate: November 16 2013 $
+.Dt UGL 4
+.Os
+.Sh NAME
+.Nm ugl
+.Nd Genesys Logic based host-to-host adapters
+.Sh SYNOPSIS
+.Cd ugl* at uhub?
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for Genesys Logic GL620USB-A based host-to-host
+USB connectors.
+.Pp
+The
+.Nm
+driver appears as an Ethernet interface and should be configured with
+.Xr ifconfig 8
+in the same way as other Ethernet interfaces.
+It does not support different media types or options.
+.Sh SEE ALSO
+.Xr netintro 4 ,
+.Xr uhub 4 ,
+.Xr usb 4 ,
+.Xr ifconfig 8

-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: Genesys Logic GL620USB-A, USB PC-to-PC link cable (take 2)

2013-11-15 Thread SASANO Takayoshi
Hello,

I committed ugl(4) driver to source tree.
The driver is derived from upl(4) driver, so licence is NetBSD.

Thanks.
--
SASANO Takayoshi u...@mx5.nisiq.net

At Fri, 15 Nov 2013 10:56:37 +0100,
Martin Pieuchot wrote:
 
 On 14/11/13(Thu) 17:44, Brad Smith wrote:
  On 14/11/13 3:29 PM, SASANO Takayoshi wrote:
  Hello,
  
  Here is Genesys Logic's GL620USB-A driver, new version.
  I fixed crashing bug when peer is not connected, rewrite sc_dying to
  usbd_is_dying() (advices from mpi@), and deleted useless codes.
  
  This is still work in progress, man is not yet. And please tell me
  which I have to write copyright notice --- NetBSD or OpenBSD.
  if_ugl.c is based on if_upl.c, and if_upl.c has NetBSD's one.
  
  IMO this is in good enough shape to get it into the tree as is.
  There are a few issues that need fixing but it would be better to
  fix them once this has been commited to the tree.
 
 I totally agree, please put it in.
 
 M.
 



Genesys Logic GL620USB-A, USB PC-to-PC link cable (take 2)

2013-11-14 Thread SASANO Takayoshi
Hello,

Here is Genesys Logic's GL620USB-A driver, new version. 
I fixed crashing bug when peer is not connected, rewrite sc_dying to
usbd_is_dying() (advices from mpi@), and deleted useless codes.

This is still work in progress, man is not yet. And please tell me
which I have to write copyright notice --- NetBSD or OpenBSD.
if_ugl.c is based on if_upl.c, and if_upl.c has NetBSD's one.

Regards,
--
SASANO Takayoshi u...@mx5.nisiq.net

Index: arch/alpha/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/alpha/conf/GENERIC,v
retrieving revision 1.234
diff -u -p -r1.234 GENERIC
--- arch/alpha/conf/GENERIC 29 Oct 2013 22:33:10 -  1.234
+++ arch/alpha/conf/GENERIC 14 Nov 2013 19:47:57 -
@@ -109,6 +109,7 @@ cdce*   at uhub?# CDC Ethernet
 urndis*at uhub?# Remote NDIS Ethernet
 udav*  at uhub?# Davicom DM9601 based Ethernet
 upl*   at uhub?# Prolific PL2301/PL2302 host-to-host 
`network'
+ugl*   at uhub?# Genesys Logic GL620USB-A host-to-host 
`network'
 url*   at uhub?# Realtek RTL8150L based adapters
 wi*at uhub?# WaveLAN IEEE 802.11DS
 urio*  at uhub?# Diamond Multimedia Rio 500
Index: arch/alpha/conf/RAMDISKBIG
===
RCS file: /cvs/src/sys/arch/alpha/conf/RAMDISKBIG,v
retrieving revision 1.89
diff -u -p -r1.89 RAMDISKBIG
--- arch/alpha/conf/RAMDISKBIG  29 Oct 2013 22:33:10 -  1.89
+++ arch/alpha/conf/RAMDISKBIG  14 Nov 2013 19:47:57 -
@@ -95,6 +95,7 @@ kue*  at uhub?# Kawasaki KL5KUSB101B b
 smsc*  at uhub?# SMSC LAN95xx Ethernet
 udav*  at uhub?# Davicom DM9601 based Ethernet
 upl*   at uhub?# Prolific PL2301/PL2302 host-to-host 
`network'
+ugl*   at uhub?# Genesys Logic GL620USB-A host-to-host 
`network'
 url*   at uhub?# Realtek RTL8150L based adapters
 wi*at uhub?# WaveLAN IEEE 802.11DS
 
Index: arch/amd64/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/amd64/conf/GENERIC,v
retrieving revision 1.351
diff -u -p -r1.351 GENERIC
--- arch/amd64/conf/GENERIC 29 Oct 2013 22:37:25 -  1.351
+++ arch/amd64/conf/GENERIC 14 Nov 2013 19:47:59 -
@@ -223,6 +223,7 @@ smsc*   at uhub?# SMSC LAN95xx Ethernet
 cdce*  at uhub?# CDC Ethernet
 urndis*at uhub?# Remote NDIS Ethernet
 upl*   at uhub?# Prolific PL2301/PL2302 host-to-host `network'
+ugl*   at uhub?# Genesys Logic GL620USB-A host-to-host 
`network'
 udav*  at uhub?# Davicom DM9601 based Ethernet
 mos*   at uhub?# MOSCHIP MCS7730/7830 10/100 Ethernet
 url*   at uhub?# Realtek RTL8150L based adapters
Index: arch/amd64/conf/RAMDISK
===
RCS file: /cvs/src/sys/arch/amd64/conf/RAMDISK,v
retrieving revision 1.59
diff -u -p -r1.59 RAMDISK
--- arch/amd64/conf/RAMDISK 29 Oct 2013 22:37:25 -  1.59
+++ arch/amd64/conf/RAMDISK 14 Nov 2013 19:48:00 -
@@ -105,6 +105,7 @@ wskbd*  at ukbd? mux 1
 #cue*  at uhub?# CATC USB-EL1201A based Ethernet
 #kue*  at uhub?# Kawasaki KL5KUSB101B based Ethernet
 #upl*  at uhub?# Prolific PL2301/PL2302 host-to-host `network'
+#ugl*  at uhub?# Genesys Logic GL620USB-A host-to-host 
`network'
 #urio* at uhub?# Diamond Multimedia Rio 500
 #uyap* at uhub?# Y@P firmware loader
 #ugen* at uhub?# USB Generic driver
Index: arch/amd64/conf/RAMDISK_CD
===
RCS file: /cvs/src/sys/arch/amd64/conf/RAMDISK_CD,v
retrieving revision 1.130
diff -u -p -r1.130 RAMDISK_CD
--- arch/amd64/conf/RAMDISK_CD  29 Oct 2013 22:37:25 -  1.130
+++ arch/amd64/conf/RAMDISK_CD  14 Nov 2013 19:48:00 -
@@ -116,6 +116,7 @@ mos*at uhub?# MOSCHIP MCS7730/7830 
10
 url*   at uhub?# Realtek RTL8150L based adapters
 wi*at uhub?# WaveLAN IEEE 802.11DS
 upl*   at uhub?# Prolific PL2301/PL2302 host-to-host `network'
+ugl*   at uhub?# Genesys Logic GL620USB-A host-to-host 
`network'
 #urio* at uhub?# Diamond Multimedia Rio 500
 #uyap* at uhub?# Y@P firmware loader
 #ugen* at uhub?# USB Generic driver
Index: arch/armish/conf/GENERIC
===
RCS file: /cvs/src/sys/arch/armish/conf

Genesys Logic GL620USB-A, USB PC-to-PC link cable

2013-10-25 Thread SASANO Takayoshi
Hello,

I wrote a driver for Genesys Logic's GL620USB-A to test my USB
PC-to-PC link cable. This controller is old (USB 1.1 age!) but
GL620USB-A based link cable is still sold at eBay.

To support GL620USB-A, I modified sys/dev/usb/if_upl.c (Prolific
PL-2301/2302 driver) and added some stuffs. These kind of devices
simply provide communication pipes on USB, and I heard that PL-2301
driver can drive GL620USB-A with adding idVendor/idProduct. [1]

This is simple resolution but it limits the peer to OpenBSD box. So I
wrote GL620USB-A driver as new one to be compatible with Linux's
usbnet driver. [2]

I named the driver ugl(if_ugl.c) and tested it on
OpenBSD-current/amd64 with Slackware-14.0. The patch is at
http://www2192ue.sakura.ne.jp/~uaa/gomitext/2013/20131023/20131026.diff

Is anyone interested in the driver for such an old device?
Any comments and advices are appreciated.

[1] 
http://circuithijacker.blogspot.jp/2007/02/usb-host-to-host-cables-with-slax-linux.html
[2] http://www.linux-usb.org/usbnet/

Best regards,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



[PATCH] uthum(4) calibration message fix

2013-09-26 Thread SASANO Takayoshi
Hello,

The message of uthum(4)'s calibration offset is incorrect
when the offset is -1  degC  0.

I wrote the patch and it is oked by yuo@ (via twitter[1]),
but two months has passed. So I send the patch to tech@ to check again.

ok?

[1] https://twitter.com/uaa/status/362275395430658049


SASANO Takayoshi u...@mx5.nisiq.net

Index: uthum.c
===
RCS file: /cvs/src/sys/dev/usb/uthum.c,v
retrieving revision 1.23
diff -u -p -r1.23 uthum.c
--- uthum.c 8 May 2013 08:26:25 -   1.23
+++ uthum.c 26 Sep 2013 20:28:12 -
@@ -820,15 +820,19 @@ uthum_print_sensorinfo(struct uthum_soft
printf(type %s (temperature),
uthum_sensor_type_s[s-dev_type]);
if (s-cal_offset)
-   printf(, calibration offset %d.%d degC,
-   s-cal_offset / 100, abs(s-cal_offset % 100));
+   printf(, calibration offset %c%d.%d degC,
+   (s-cal_offset  0) ? '-' : '+',
+   abs(s-cal_offset / 100),
+   abs(s-cal_offset % 100));
break;
case SENSOR_HUMIDITY:
printf(type %s (humidity),
uthum_sensor_type_s[s-dev_type]);
if (s-cal_offset)
-   printf(calibration offset %d.%d %%RH,
-   s-cal_offset / 100, abs(s-cal_offset % 100));
+   printf(calibration offset %c%d.%d %%RH,
+   (s-cal_offset  0) ? '-' : '+',
+   abs(s-cal_offset / 100),
+   abs(s-cal_offset % 100));
break;
default:
printf(unknown);




Re: [NEW] ugold(4) driver for Microdia's USB TEMPer variant (take 3)

2013-09-05 Thread SASANO Takayoshi
Hello,

I commited ugold(4) driver code.

 I'm ok with your diff, here's a man. I can commit it once your diff
 is in if it's ok.

Thank you for writing man, but authors in header is still yuo@.
Others are ok.

Here is fixed version, please commit.

Best regards,


Index: share/man/man4/Makefile
===
RCS file: /cvs/src/share/man/man4/Makefile,v
retrieving revision 1.554
diff -u -p -r1.554 Makefile
--- share/man/man4/Makefile 20 Aug 2013 14:27:32 -  1.554
+++ share/man/man4/Makefile 5 Sep 2013 19:58:45 -
@@ -57,7 +57,8 @@ MAN=  aac.4 ac97.4 acphy.4 \
tlphy.4 thmc.4 tqphy.4 trm.4 trunk.4 tsl.4 tty.4 tun.4 twe.4 txp.4 \
txphy.4 uaudio.4 uark.4 uath.4 uberry.4 ubsa.4 ubsec.4 ubt.4 \
ucom.4 uchcom.4 ucycom.4 udav.4 udcf.4 udfu.4 udl.4 udp.4 udsbr.4 \
-   uftdi.4 ugen.4 uguru.4 uhci.4 uhid.4 uhidev.4 uipaq.4 uk.4 ukbd.4 \
+   uftdi.4 ugen.4 ugold.4 uguru.4 uhci.4 uhid.4 uhidev.4 uipaq.4 uk.4 \
+   ukbd.4 \
ukphy.4 ulpt.4 umass.4 umbg.4 umct.4 umidi.4 umodem.4 ums.4 umsm.4 \
unix.4 uow.4 uoaklux.4 uoakrh.4 uoakv.4 \
upgt.4 upl.4 uplcom.4 ural.4 urio.4 url.4 urlphy.4 \
Index: share/man/man4/ugold.4
===
RCS file: share/man/man4/ugold.4
diff -N share/man/man4/ugold.4
--- /dev/null   1 Jan 1970 00:00:00 -
+++ share/man/man4/ugold.4  5 Sep 2013 19:58:45 -
@@ -0,0 +1,47 @@
+.\$OpenBSD$
+.\
+.\ Copyright (c) 2013 Takayoshi SASANO sas...@openbsd.org
+.\ Copyright (c) 2013 Martin Pieuchot m...@openbsd.org
+.\
+.\ Permission to use, copy, modify, and distribute this software for any
+.\ purpose with or without fee is hereby granted, provided that the above
+.\ copyright notice and this permission notice appear in all copies.
+.\
+.\ THE SOFTWARE IS PROVIDED AS IS AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+.\ WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+.\ MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+.\ ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+.\ WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+.\ ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+.\ OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+.\
+.Dd $Mdocdate$
+.Dt UGOLD 4
+.Os
+.Sh NAME
+.Nm ugold
+.Nd TEMPer Gold HID temperature sensor
+.Sh SYNOPSIS
+.Cd ugold* at uhidev?
+.Sh DESCRIPTION
+The
+.Nm
+driver provides support for pcsensors TEMPer gold devices.
+The following devices are supported by the
+.Nm
+driver:
+.Bl -column RDing TEMPer1V1.2 1 Temperature -offset indent
+.It Em Device Ta Em Sensors
+.It Li RDing TEMPer1V1.2 Ta 1 Temperature
+.El
+.Pp
+The driver possesses a collection of sensor values which are
+made available through the
+.Xr sysctl 8
+interface.
+.Sh SEE ALSO
+.Xr intro 4 ,
+.Xr uhidev 4 ,
+.Xr uthum 4 ,
+.Xr sensorsd 8 ,
+.Xr sysctl 8

-- 
SASANO Takayoshi u...@mx5.nisiq.net



[NEW] ugold(4) driver for Microdia's USB TEMPer variant (take 3)

2013-09-04 Thread SASANO Takayoshi
Hi all,

Here is the driver for Microdia's USB TEMPer, take 3.

http://www.uaa.org.uk/gomitext/2013/20130905/20130905.diff

Thanks to mpi@ and testers of tech@.

man is not yet, sorry.

Regards,

SASANO Takayoshi u...@mx5.nisiq.net



[NEW] ugold(4) driver for Microdia's USB TEMPer variant (take 2)

2013-05-12 Thread SASANO Takayoshi
Hello,

Here is the driver for Microdia's USB TEMPer with some fixes.

http://www.uaa.org.uk/gomitext/2013/20130513/20130513.diff

- removed intermediate buffer (sc_ibuf), all USB interrupt responses
  will be processed in ugold_intr().
- use uhidev_set_report() to issue HID command.
- add ugold* at uhidev? into GENERIC for alpha, amd64, armish, hppa, i386,
  landisk, loongson, macppc, sgi (IP27, IP30, IP32), socppc and sparc64.

Regards,

SASANO Takayoshi u...@mx5.nisiq.net



Re: [NEW] ugold(4) driver for Microdia's USB TEMPer variant

2013-05-02 Thread SASANO Takayoshi
Hello, sorry for late reply.

wow, there is many comments... 


 But anyway, I think that in your case you don't need it. Why don't you
 update directly your sensor values when you receive the data in
 ugold_intr() instead of copying to a intermediate buffer?

The device always works command (control pipe) - response (interrupt
pipe) cycle. I tried to replace uhidev_get_report() instead of reading
interrupt pipe, but it didn't work. (why?)

If only temperature data (as read temperature data command's response)
comes from interrupt pipe, I think it will be able to remove
intermediate buffer. But, other responses by initialize commands are
also using interrupt pipe. Is there any good idea to distinguish them?


 +/*
 + * interrupt pipe is opened but data comes after ugold_attach()
 + * is finished. simply attach sensors here and the device will be
 + * initialized at ugold_refresh().
 + * 
 + * at this point, the number of sensors is unknown. setup maximum
 + * sensors here and detach unused sensor later.
 + */

 Why don't you initialize the device before opening the interrupt pipe?

ugold_init_device() gets the number of sensors and offset parameter,
they come from interrupt pipe. And I couldn't get any interrupt response
when issuing commands in ugold_attach().

After (exiting) ugold_attach(), I could get interrupt response.


 +int
 +ugold_issue_cmd(struct ugold_softc *sc, uint8_t *cmd, int len, int delay)
 +{
 +usb_device_request_t req;
 +
 +bzero(sc-sc_ibuf, sc-sc_ilen);
 +
 +req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
 +req.bRequest = UR_SET_REPORT;
 +USETW(req.wValue, 0x0200);
 +USETW(req.wIndex, 0x0001);
 +USETW(req.wLength, len);
 +if (usbd_do_request(sc-sc_udev, req, cmd))
 +return EIO;

 I would suggest you to have a look at uhidev_set_report{,_async}() instead of
 writing your own version here.

I think this can replace with uhidev_set_report(), I will try rewrite.


 +int
 +ugold_init_device(struct ugold_softc *sc)
 +{
 +usb_device_request_t req;
 +usbd_status error;
 +
 +/* send SetReport request to another (Keyboard) interface */
 +req.bmRequestType = UT_WRITE_CLASS_INTERFACE;
 +req.bRequest = UR_SET_REPORT;
 +USETW(req.wValue, 0x0201);
 +USETW(req.wIndex, 0x);
 +USETW(req.wLength, sizeof(cmd_led_off));
 +error = usbd_do_request(sc-sc_udev, req, cmd_led_off);
 +if (error)
 +return EIO;

 Same here, this is likely to be another uhidev_set_report() with a
 different interface, no?

Current ugold_attach() ignores keyboard interface, so sc_hdev in
ugold_softc points mouse inerface.

Maybe this SetReport will be able to replace issuing
uhidev_set_report() when detecting keyboard interface in
ugold_attach().


 +/* init process */
 +if (ugold_issue_cmd(sc, cmd_get_offset, sizeof(cmd_get_offset), 200))
 +return EIO;
 +
 +/* received one interrupt message, it contains offset parameter */
 +sc-sc_num_sensors = sc-sc_ibuf[1];

 How can you be sure sc_ibuf contains the data you asked for? 

Well, sanity check will be required.

Cheers,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



[NEW] ugold(4) driver for Microdia's USB TEMPer variant

2013-03-31 Thread SASANO Takayoshi
Hello,

I rewrote patched uthum(4) to new ugold(4) driver.
Thanks for advice by yuo@ and deraadt@.

The diff for -current's /usr/src/sys is large to send mailing-list,
so here is the URL:

http://www2192ue.sakura.ne.jp/~uaa/gomitext/2013/20130331/20130331.diff

If you want to try ugold(4) and already use Microdia's-variant-patched
uthum(4) driver, revert original uthum(4).

ok or comments, please.

Cheers,
-- 
SASANO Takayoshi u...@mx5.nisiq.net



Re: uthum(4): Microdia's USB TEMPer variant

2013-03-26 Thread SASANO Takayoshi
Hello, Luis.

Now I am rewriting a driver for Microdia's USB TEMPer with
advices from yuo@ and deraadt@.

Please wait a while and thank you for trying my patch.

Thanks.
-- 
SASANO Takayoshi u...@mx5.nisiq.net



uthum(4): Microdia's USB TEMPer variant

2013-03-16 Thread SASANO Takayoshi
Hi,

I bought a PC Sensor's gold TEMPer
(http://www.pcsensor.com/index.php?_a=productproduct_id=41), but this is
completely different from TEMPer series which handled by uthum(4) driver.

This is also USB HID device (one keyboard and one mouse) but temperature
data comes from interrupt pipe, not control pipe.

Details are described in TEMPered's wiki page [1]. And I hope my lsusb
log [2] and USB analyzer log (attached to Windows) [3] helps.

I wrote a patch (work-in-progress, and for OpenBSD 5.2) for uthum(4) to
test my device [4]. But I have a question, which is better to expand
uthum(4) driver or write a new one?

[1] https://github.com/edorfaus/TEMPered/wiki/0C45%3A7401
[2] http://www2192ue.sakura.ne.jp/~uaa/gomitext/2013/20130224/temp.txt
[3] http://www2192ue.sakura.ne.jp/~uaa/gomitext/2013/20130307/temper.txt
[4] http://www2192ue.sakura.ne.jp/~uaa/gomitext/2013/20130315/uthum-wip.diff

Thanks,

SASANO Takayoshi u...@mx5.nisiq.net



[patch] puc(4) add I-O DATA RSA-PCI2 support

2012-07-11 Thread SASANO Takayoshi
Hello,

Here's the patch for I-O DATA RSA-PCI2, OX16PCI954-based high speed 2 port
UART card (max 921600bps).

http://www.iodata.jp/product/interface/rs232c/rsa-pci2/ (Japanese)

The card uses 14.7456MHz clock so I have to modify pucdata.c.

ok or comment?


Index: pucdata.c
===
RCS file: /cvs/src/sys/dev/pci/pucdata.c,v
retrieving revision 1.82
diff -u -p -r1.82 pucdata.c
--- pucdata.c   12 May 2012 15:54:54 -  1.82
+++ pucdata.c   11 Jul 2012 10:46:45 -
@@ -963,6 +963,17 @@ const struct puc_device_description puc_
},
},
 
+   /* I-O DATA RSA-PCI2 (uses Oxford 16PCI954 and a 8x clock) */
+   {   /* Oxford Semiconductor OX16PCI954 UARTs, */
+   {   PCI_VENDOR_OXFORD2, PCI_PRODUCT_OXFORD2_OX16PCI954,
+   PCI_VENDOR_IODATA, 0xc070 },
+   {   0x, 0x, 0x, 0x },
+   {
+   { PUC_COM_POW2(3), 0x10, 0x },
+   { PUC_COM_POW2(3), 0x10, 0x0008 },
+   },
+   },
+
/* Oxford Semiconductor OX16PCI954 PCI UARTs */
{   /* Oxford Semiconductor OX16PCI954 UARTs, */
{   PCI_VENDOR_OXFORD2, PCI_PRODUCT_OXFORD2_OX16PCI954, 0, 0 },



By the way, does someone know how to use over 230400bps?
I cannot find B460800 and B921600 in termios.h.

Regards,

SASANO Takayoshi u...@mx5.nisiq.net



diff: fix waiting problem on AMD Hudson's AHCI (Re: AMD APU report)

2012-04-12 Thread SASANO Takayoshi
Hello,

 I have a system with an asrock a75m-itx motherboard and an amd a6-3500 
 processor.  I notice there is a 40 second delay after the 'ahci0 at pci0
  dev 17 
 ...' line. 

I have IBM's ThinkPad Edge E525, AMD A8-3500M based machine.
And I checked this diff fix that problem.

ok or comment?


Index: ahci.c
===
RCS file: /cvs/src/sys/dev/pci/ahci.c,v
retrieving revision 1.186
diff -u -p -r1.186 ahci.c
--- ahci.c  4 Feb 2012 21:44:54 -   1.186
+++ ahci.c  12 Apr 2012 13:30:27 -
@@ -462,6 +462,8 @@ int ahci_intel_attach(struct ahci_soft
 static const struct ahci_device ahci_devices[] = {
{ PCI_VENDOR_AMD,   PCI_PRODUCT_AMD_HUDSON2_SATA,
NULL,   ahci_amd_hudson2_attach },
+   { PCI_VENDOR_AMD,   PCI_PRODUCT_AMD_HUDSON_AHCI_1,
+   NULL,   ahci_ati_sb700_attach },
 
{ PCI_VENDOR_ATI,   PCI_PRODUCT_ATI_SB600_SATA,
NULL,   ahci_ati_sb600_attach },


SASANO Takayoshi u...@mx5.nisiq.net, sas...@cvs.openbsd.org



Re: X Intel driver update. [TESTING NEEDED]

2011-09-14 Thread SASANO Takayoshi
Hello,

I tried with these software after replacing driver, there is no problem.

mlterm (terminal emulator)
FireFox (web browser)
mplayer (media player)
F-1 spirit remake (game uses 3D function)

Here's dmesg:

OpenBSD 5.0 (GENERIC.MP) #63: Wed Aug 17 10:14:30 MDT 2011
dera...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 4248735744 (4051MB)
avail mem = 4121513984 (3930MB)
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 2.4 @ 0xe84b0 (50 entries)
bios0: vendor Intel Corp. version TYG4110H.86A.0045.2010.0706.1910 date 07/06/
2010
bios0: Intel Corporation DG41TY
acpi0 at bios0: rev 2
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP APIC MCFG HPET
acpi0: wakeup devices P0P1(S3) P0P2(S4) PS2K(S3) PS2M(S3) UAR1(S3) USB0(S3) USB1
(S3) USB2(S3) USB3(S3) EUSB(S4) P0P9(S4) P0PA(S4) P0PB(S4) P0PC(S4) P0PD(S4) P0P
E(S4) PWRB(S3)
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpimadt0 at acpi0 addr 0xfee0: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Pentium(R) Dual-Core CPU E6700 @ 3.20GHz, 3200.34 MHz
cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CF
LUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,SBF,SSE3,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3
,CX16,xTPR,PDCM,XSAVE,NXE,LONG
cpu0: 2MB 64b/line 8-way L2 cache
cpu0: apic clock running at 266MHz

(snip)

vga1 at pci0 dev 2 function 0 Intel G41 Video rev 0x03
wsdisplay0 at vga1 mux 1: console (80x25, vt100 emulation)
wsdisplay0: screen 1-5 added (80x25, vt100 emulation)
intagp0 at vga1
agp0 at intagp0: aperture at 0xd000, size 0x1000
inteldrm0 at vga1: apic 4 int 16
drm0 at inteldrm0
Intel G41 Video rev 0x03 at pci0 dev 2 function 1 not configured

SASANO Takayoshi u...@mx5.nisiq.net



Re: amd64: Phenom 9x00's TLB errata warning

2010-11-09 Thread SASANO Takayoshi
Oops, try again...

At Tue, 09 Nov 2010 20:48:37 +0900,
SASANO Takayoshi wrote:
 
 Hello,
 
 Phenom 9500 has TLB errata and this should be workarounded by BIOS.
 But some BIOS do nothing by default, I think the warning is needed.
 
 Here is the patch, please review.
 
 --
 amd64errata.c
   - applied following NetBSD's src/sys/arch/x86/x86/errata.c fix
 revision 1.8, 1.13, 1.17 and 1.18
 
 specialreg.h
   - add definitions for amd64errata.c
   - modified NB_CFG_DISIOREQLOCK and DC_CFG_DIS_CNV_WC_SSO,
 they are misdefined (see src/sys/arch/x86/include/specialreg.h
 of NetBSD, revision 1.48 and 1.49)
 -- 
 SASANO Takayoshi (JG1UAA/@uaa) [http://www.uaa.org.uk] u...@uaa.org.uk
 
 [demime 1.01d removed an attachment of type application/octet-stream]
 


Index: arch/amd64/amd64/amd64errata.c
===
RCS file: /cvs/src/sys/arch/amd64/amd64/amd64errata.c,v
retrieving revision 1.2
diff -u -p -r1.2 amd64errata.c
--- arch/amd64/amd64/amd64errata.c  26 Jun 2008 05:42:09 -  1.2
+++ arch/amd64/amd64/amd64errata.c  9 Nov 2010 11:45:32 -
@@ -64,6 +64,7 @@ typedef struct errata {
 typedef enum cpurev {
BH_E4, CH_CG, CH_D0, DH_CG, DH_D0, DH_E3, DH_E6, JH_E1,
JH_E6, SH_B0, SH_B3, SH_C0, SH_CG, SH_D0, SH_E4, SH_E5,
+   DR_BA, DR_B2, DR_B3,
OINK
 } cpurev_t;
 
@@ -78,6 +79,7 @@ static const u_int cpurevs[] = {
SH_CG, 0xf4a, SH_CG, 0xf5a, SH_CG, 0xf7a,
SH_D0, 0x0010f40, SH_D0, 0x0010f50, SH_D0, 0x0010f70,
SH_E4, 0x0020f51, SH_E4, 0x0020f71, SH_E5, 0x0020f42,
+   DR_BA, 0x0100f2a, DR_B2, 0x0100f22, DR_B3, 0x0100f23,
OINK
 };
 
@@ -117,6 +119,14 @@ static const uint8_t amd64_errata_set8[]
SH_D0, SH_D0, SH_D0, SH_E4, SH_E4, SH_E5, OINK
 };
 
+static const uint8_t amd64_errata_set9[] = {
+   DR_BA, DR_B2, OINK
+};
+
+static const uint8_t amd64_errata_set10[] = {
+   DR_BA, DR_B2, DR_B3, OINK
+};
+
 static int amd64_errata_setmsr(struct cpu_info *, errata_t *);
 static int amd64_errata_testmsr(struct cpu_info *, errata_t *);
 
@@ -178,7 +188,6 @@ static errata_t errata[] = {
113, 0, MSR_BU_CFG, amd64_errata_set3,
amd64_errata_setmsr, BU_CFG_WBENHWSBDIS
},
-#ifdef MULTIPROCESSOR
/*
 * 69: Multiprocessor Coherency Problem with Hardware
 * Prefetch Mechanism
@@ -211,7 +220,6 @@ static errata_t errata[] = {
107, 0, MSR_BU_CFG, amd64_errata_set2,
amd64_errata_testmsr, BU_CFG_THRL2IDXCMPDIS
},
-#if 0
/*
 * 122: TLB Flush Filter May Cause Coherency Problem in
 * Multiprocessor Systems
@@ -220,8 +228,41 @@ static errata_t errata[] = {
122, 0, MSR_HWCR, amd64_errata_set4,
amd64_errata_setmsr, HWCR_FFDIS
},
-#endif
-#endif /* MULTIPROCESSOR */
+   /*
+* 254: Internal Resource Livelock Involving Cached TLB Reload
+*/
+   {
+   254, 0, MSR_BU_CFG, amd64_errata_set9,
+   amd64_errata_testmsr, BU_CFG_ERRATA_254
+   },
+   /*
+* 261: Processor May Stall Entering Stop-Grant Due to Pending Data
+* Cache Scrub
+*/
+   {
+   261, 0, MSR_DC_CFG, amd64_errata_set10,
+   amd64_errata_testmsr, DC_CFG_ERRATA_261
+   },
+   /*
+* 298: L2 Eviction May Occur During Processor Operation To Set
+* Accessed or Dirty Bit
+*/
+   {
+   298, 0, MSR_HWCR, amd64_errata_set9,
+   amd64_errata_testmsr, HWCR_TLBCACHEDIS
+   },
+   {
+   298, 0, MSR_BU_CFG, amd64_errata_set9,
+   amd64_errata_testmsr, BU_CFG_ERRATA_298
+   },
+   /*
+* 309: Processor Core May Execute Incorrect Instructions on
+* Concurrent L2 and Northbridge Response
+*/
+   {
+   309, 0, MSR_BU_CFG, amd64_errata_set9,
+   amd64_errata_testmsr, BU_CFG_ERRATA_309
+   },
 };
 
 static int 
Index: arch/amd64/include/specialreg.h
===
RCS file: /cvs/src/sys/arch/amd64/include/specialreg.h,v
retrieving revision 1.19
diff -u -p -r1.19 specialreg.h
--- arch/amd64/include/specialreg.h 29 Apr 2010 17:00:48 -  1.19
+++ arch/amd64/include/specialreg.h 9 Nov 2010 11:45:32 -
@@ -316,11 +316,13 @@
  * These require a 'passcode' for access.  See cpufunc.h.
  */
 #defineMSR_HWCR0xc0010015
+#defineHWCR_TLBCACHEDIS0x0008
 #defineHWCR_FFDIS  0x0040
 
 #defineMSR_NB_CFG  0xc001001f
-#defineNB_CFG_DISIOREQLOCK 0x0004ULL
+#defineNB_CFG_DISIOREQLOCK 0x0008ULL
 #defineNB_CFG_DISDATMSK0x0010ULL
+#define

amd64: Phenom 9x00's TLB errata warning

2010-11-09 Thread SASANO Takayoshi
Hello,

Phenom 9500 has TLB errata and this should be workarounded by BIOS.
But some BIOS do nothing by default, I think the warning is needed.

Here is the patch, please review.

--
amd64errata.c
- applied following NetBSD's src/sys/arch/x86/x86/errata.c fix
  revision 1.8, 1.13, 1.17 and 1.18

specialreg.h
- add definitions for amd64errata.c
- modified NB_CFG_DISIOREQLOCK and DC_CFG_DIS_CNV_WC_SSO,
  they are misdefined (see src/sys/arch/x86/include/specialreg.h
  of NetBSD, revision 1.48 and 1.49)
-- 
SASANO Takayoshi (JG1UAA/@uaa) [http://www.uaa.org.uk] u...@uaa.org.uk

[demime 1.01d removed an attachment of type application/octet-stream]