Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-26 Thread sc . dying
On 2020/07/26 10:54, Marcus Glocker wrote: > On Sat, 25 Jul 2020 20:31:44 + > sc.dy...@gmail.com wrote: > >> On 2020/07/25 18:10, Marcus Glocker wrote: >>> On Sun, Jul 19, 2020 at 02:12:21PM +, sc.dy...@gmail.com wrote: >>> On 2020/07/19 11:25, Marcus Glocker wrote: > On Sun,

Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-25 Thread sc . dying
On 2020/07/25 18:10, Marcus Glocker wrote: > On Sun, Jul 19, 2020 at 02:12:21PM +, sc.dy...@gmail.com wrote: > >> On 2020/07/19 11:25, Marcus Glocker wrote: >>> On Sun, 19 Jul 2020 02:25:30 + >>> sc.dy...@gmail.com wrote: >>> hi, It works on AMD Bolton xHCI (78141022), Intel

Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-19 Thread sc . dying
On 2020/07/19 11:25, Marcus Glocker wrote: > On Sun, 19 Jul 2020 02:25:30 + > sc.dy...@gmail.com wrote: > >> hi, >> >> It works on AMD Bolton xHCI (78141022), Intel PCH (1e318086), >> and ASM1042 (10421b21). >> I simply play with ffplay -f v4l2 /dev/video0 to test. > > If your cam supports MJ

Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-18 Thread sc . dying
hi, It works on AMD Bolton xHCI (78141022), Intel PCH (1e318086), and ASM1042 (10421b21). I simply play with ffplay -f v4l2 /dev/video0 to test. At this moment it does not work on VL805, but I have no idea. I'll investigate furthermore... BTW I think xhci_ring_alloc should free ring dma buffer if

Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-17 Thread sc . dying
hi, On 2020/07/15 21:28, sc.dy...@gmail.com wrote: > hi, > > The patch works well on Intel PCH xhci, but not on AMD Bolton xHCI. > I'll investigate this problem. Bolton xHCI sometimes raises following events. (I added printf Completion Code.) #246 cc 13 remain 0 type 5 origlen 2048 frlengths[6]

Re: xhci(4) isoc: fix bogus handling of chained TRBs

2020-07-15 Thread sc . dying
hi, The patch works well on Intel PCH xhci, but not on AMD Bolton xHCI. I'll investigate this problem. BTW please check if malloc returns NULL. On 2020/07/13 09:59, Marcus Glocker wrote: > On Sat, 11 Jul 2020 23:43:43 +0200 > Marcus Glocker wrote: > >> On Sat, 11 Jul 2020 20:14:03 +0200 >> Ma

Re: xhci: zero length multi-TRB inbound xfer does not work

2020-06-24 Thread sc . dying
On 2020/06/24 11:57, Patrick Wildt wrote: > On Tue, Jun 16, 2020 at 06:55:27AM +, sc.dy...@gmail.com wrote: >> hi, >> >> The function xhci_event_xfer_isoc() of sys/dev/usb/xhci.c at line 954 >> does not work with zero length multi-TRB inbound transfer. >> >>949 /* >>950

xhci: zero length multi-TRB inbound xfer does not work

2020-06-15 Thread sc . dying
hi, The function xhci_event_xfer_isoc() of sys/dev/usb/xhci.c at line 954 does not work with zero length multi-TRB inbound transfer. 949 /* 950 * If we queued two TRBs for a frame and this is the second TRB, 951 * check if the first TRB needs accounting since

[patch] xhci: Context Entries initialization fix

2019-12-09 Thread sc . dying
Hello, My uplcom(4) does not work correctly with Etron EJ168 xhci. It is attached correctly, but cannot be opened. If it is attached to other xHCI or EHCI, it works. When ucom is opened, bulk-in endpoint is configured at first, then bulk-out one is configured. The former has DCI=7 and the latter

Re: XHCI support for bulk xfers >64k

2019-11-21 Thread sc . dying
On 2019/11/21 07:59, Patrick Wildt wrote: > On Thu, Nov 21, 2019 at 06:52:36AM +, sc.dy...@gmail.com wrote: >> Hi, >> >> On 2019/11/18 20:34, Marcus Glocker wrote: >>> On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote: >>> While recently testing UDL on XHCI I faced a lot of US

Re: XHCI support for bulk xfers >64k

2019-11-20 Thread sc . dying
Hi, On 2019/11/18 20:34, Marcus Glocker wrote: > On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote: > >> While recently testing UDL on XHCI I faced a lot of USB timeouts, and >> therefore screen rendering issues. >> The reason is that XHCI currently only supports single bulk transfer

Re: patch axen(4) (WIP)

2019-06-16 Thread sc . dying
hi, On 2019/02/26 14:00, Nils Frohberg wrote: > On Mon, Feb 25, 2019 at 03:50:48PM -0300, Martin Pieuchot wrote: >> On 25/02/19(Mon) 14:52, Nils Frohberg wrote: [snip] >>> I didn't get around to much testing/debugging lately, therefore I >>> wanted to share the current state (diff below). >>> >>>

Re: patch axen(4) (WIP)

2019-06-16 Thread sc . dying
hi, On 2019/02/28 06:53, Nils Frohberg wrote: > On Tue, Feb 26, 2019 at 08:57:57PM +0200, Artturi Alm wrote: >> On Tue, Feb 26, 2019 at 03:00:15PM +0100, Nils Frohberg wrote: [snip] >> Have you looked at what NetBSD has done with their axen(4)? there has >> been 20commits in 2019 so far[0], while

[patch] print xhci version in hex

2019-02-01 Thread sc . dying
Hi, The HCIVERSION register represents the BCD encoded HCI version number, so it should be printed with %x. For example, ver `0.150' should be printed as `0.96'. --- /sys/dev/usb/xhci.c Sun Sep 9 10:40:35 2018 +++ /sys/dev/usb/xhci.c Fri Jan 25 09:05:09 2019 @@ -296,7 +296,7 @@ xhci_init(struct

Re: [PATCH] ure improvement

2017-07-27 Thread sc dying
On 2017/07/27 12:22, Martin Pieuchot wrote: > On 25/07/17(Tue) 00:30, sc dying wrote: >> On 2017/07/24 14:35, Martin Pieuchot wrote: >>> [...] >>> Here's a diff to try and play with. I'd guess the problem is in >>> pipe_close(). Which state has

Re: [PATCH] ure improvement

2017-07-24 Thread sc dying
On 2017/07/24 14:35, Martin Pieuchot wrote: > On 21/07/17(Fri) 07:57, sc dying wrote: >> On 2017/07/20 08:31, Martin Pieuchot wrote: >>> On 18/07/17(Tue) 13:43, sc dying wrote: >>>> On 2017/07/18 09:12, Martin Pieuchot wrote: >>>>> On 17/07/17(Mon) 15:2

Re: [PATCH] ure improvement

2017-07-21 Thread sc dying
On 2017/07/20 08:31, Martin Pieuchot wrote: > On 18/07/17(Tue) 13:43, sc dying wrote: >> On 2017/07/18 09:12, Martin Pieuchot wrote: >>> On 17/07/17(Mon) 15:24, sc dying wrote: >>>> On 2017/07/17 08:24, Martin Pieuchot wrote: >>>>> On 15/07

Re: [PATCH] ure improvement

2017-07-18 Thread sc dying
On 2017/07/18 09:12, Martin Pieuchot wrote: > On 17/07/17(Mon) 15:24, sc dying wrote: >> On 2017/07/17 08:24, Martin Pieuchot wrote: >>> On 15/07/17(Sat) 21:16, sc dying wrote: >>>> - Call usbd_set_config before configuring endpoints in ure_init to fix >>>

Re: [PATCH] ure improvement

2017-07-17 Thread sc dying
On 2017/07/17 08:24, Martin Pieuchot wrote: > On 15/07/17(Sat) 21:16, sc dying wrote: >> Hi, >> >> This patch does: >> >> - Enable RX aggregation. > > Does it work on all chips? I don't have all, but it works with mine that have RTL8152 (ver 4c10) a

[PATCH] axen improvement

2017-07-15 Thread sc dying
Hi, This patch does: - Fix axen won't work after interface down. - Fix definitions and comments that differ from linux ones. regards, --- sys/dev/usb/if_axen.c Fri Mar 3 15:04:52 2017 +++ sys/dev/usb/if_axen.c Mon Jun 19 16:05:09 2017 @@ -1256,6 +1256,14 @@ axen_init(void *xsc) */ axen_rese

[PATCH] ure improvement

2017-07-15 Thread sc dying
Hi, This patch does: - Enable RX aggregation. - Fix RX packet buffer alignment, using roundup() macro in sys/params.h. - Call usbd_set_config before configuring endpoints in ure_init to fix an error when re-opening pipes. I grabbed the code from if_kue.c. - Make the chip recognize given MAC a