Hello tech@,


This is a patch that extends the readregs and writeregs vmm(4) ioctl to
read and write XCR0. This is required to send and receive FPU state
correctly for vmctl send and vmctl receive. vmctl send / receive are two
new options that will support snapshotting VMs and migrating VMs from
one host to another. This project was undertaken at San Jose State
University along with my three teammates, Ashwin, Harshada and Siri with
mlarkin@ as our advisor.


Thanks,
Pratik



Index: sys/arch/amd64/amd64/vmm.c
===================================================================
RCS file: /home/pdvyas/cvs/src/sys/arch/amd64/amd64/vmm.c,v
retrieving revision 1.138
diff -u -p -a -u -r1.138 vmm.c
--- sys/arch/amd64/amd64/vmm.c  2 May 2017 02:57:46 -0000       1.138
+++ sys/arch/amd64/amd64/vmm.c  5 May 2017 07:07:56 -0000
@@ -1396,6 +1396,7 @@ vcpu_readregs_vmx(struct vcpu *vcpu, uin
        }
        if (regmask & VM_RWREGS_CRS) {
                crs[VCPU_REGS_CR2] = vcpu->vc_gueststate.vg_cr2;
+               crs[VCPU_REGS_XCR0] = vcpu->vc_gueststate.vg_xcr0;
                if (vmread(VMCS_GUEST_IA32_CR0, &crs[VCPU_REGS_CR0]))
                        goto errout;
                if (vmread(VMCS_GUEST_IA32_CR3, &crs[VCPU_REGS_CR3]))
@@ -1522,6 +1523,7 @@ vcpu_writeregs_vmx(struct vcpu *vcpu, ui
                        goto errout;
        }
        if (regmask & VM_RWREGS_CRS) {
+               vcpu->vc_gueststate.vg_xcr0 = crs[VCPU_REGS_XCR0];
                if (vmwrite(VMCS_GUEST_IA32_CR0, crs[VCPU_REGS_CR0]))
                        goto errout;
                if (vmwrite(VMCS_GUEST_IA32_CR3, crs[VCPU_REGS_CR3]))
Index: sys/arch/amd64/include/vmmvar.h
===================================================================
RCS file: /home/pdvyas/cvs/src/sys/arch/amd64/include/vmmvar.h,v
retrieving revision 1.36
diff -u -p -a -u -r1.36 vmmvar.h
--- sys/arch/amd64/include/vmmvar.h     2 May 2017 02:57:46 -0000       1.36
+++ sys/arch/amd64/include/vmmvar.h     5 May 2017 07:07:56 -0000
@@ -328,7 +328,8 @@ struct vcpu_segment_info {
#define VCPU_REGS_CR3   2
#define VCPU_REGS_CR4   3
#define VCPU_REGS_CR8   4
-#define VCPU_REGS_NCRS (VCPU_REGS_CR8 + 1)
+#define VCPU_REGS_XCR0 5
+#define VCPU_REGS_NCRS (VCPU_REGS_XCR0 + 1)

#define VCPU_REGS_CS            0
#define VCPU_REGS_DS            1
Index: usr.sbin/vmd/vm.c
===================================================================
RCS file: /home/pdvyas/cvs/src/usr.sbin/vmd/vm.c,v
retrieving revision 1.15
diff -u -p -a -u -r1.15 vm.c
--- usr.sbin/vmd/vm.c   2 May 2017 07:19:53 -0000       1.15
+++ usr.sbin/vmd/vm.c   5 May 2017 07:07:56 -0000
@@ -139,7 +139,8 @@ static const struct vcpu_reg_state vcpu_
        .vrs_msrs[VCPU_REGS_LSTAR] = 0ULL,
        .vrs_msrs[VCPU_REGS_CSTAR] = 0ULL,
        .vrs_msrs[VCPU_REGS_SFMASK] = 0ULL,
-       .vrs_msrs[VCPU_REGS_KGSBASE] = 0ULL
+       .vrs_msrs[VCPU_REGS_KGSBASE] = 0ULL,
+       .vrs_crs[VCPU_REGS_XCR0] = XCR0_X87
#endif
};

@@ -175,7 +176,8 @@ static const struct vcpu_reg_state vcpu_
        .vrs_msrs[VCPU_REGS_LSTAR] = 0ULL,
        .vrs_msrs[VCPU_REGS_CSTAR] = 0ULL,
        .vrs_msrs[VCPU_REGS_SFMASK] = 0ULL,
-       .vrs_msrs[VCPU_REGS_KGSBASE] = 0ULL
+       .vrs_msrs[VCPU_REGS_KGSBASE] = 0ULL,
+       .vrs_crs[VCPU_REGS_XCR0] = XCR0_X87
#endif
};


Reply via email to