On Mon, 20 Aug 2018 11:05:08 -0700
Ori Bernstein wrote:
> On Mon, 20 Aug 2018 23:38:28 +0900 (JST), YASUOKA Masahiko
> wrote:
>> As far as I know, switch(4) assumes it receives packets located at 64
>> bit aligned memory. So if the code like below
>>
>> *(uint64_t *)oxm->oxm_value = htobe
> Date: Mon, 20 Aug 2018 11:05:08 -0700
> From: Ori Bernstein
>
> > As far as I know, switch(4) assumes it receives packets located at 64
> > bit aligned memory. So if the code like below
> >
> > *(uint64_t *)oxm->oxm_value = htobe64(val);
> >
> > cause alignment faults, the assumption may
On Mon, 20 Aug 2018 23:38:28 +0900 (JST), YASUOKA Masahiko
wrote:
> Hi,
Heyho.
> > panic: trap type 0x34 (mem address not aligned): pc=15864ec
> > npc=15864f0 pstate=99820006
> (snip)
> > o...@eigenstate.org and I put together the following diff. I haven't been
> > able
> > to check with the
Hi,
> panic: trap type 0x34 (mem address not aligned): pc=15864ec
> npc=15864f0 pstate=99820006
(snip)
> o...@eigenstate.org and I put together the following diff. I haven't been able
> to check with the original reporter, and I don't have a machine to test it on,
> so comments and/or tests would
Hi,
At BSDCan, someone reported that a sparc64 machine would panic if it was
receiving any traffic on a member interface of a switch(4) during reboot. We
got as far as getting this trace:
panic: trap type 0x34 (mem address not aligned): pc=15864ec
npc=15864f0 pstate=99820006
Stopped at db_en
