Re: PATCH: Octeon RNG support

2013-10-22 Thread Jonathan Matthew
On Tue, Oct 22, 2013 at 1:05 PM, William Orr w...@worrbase.com wrote:
 Hey tech@

 Here's a patch that adds octeon's onboard rng chip as a source of
 entropy. Currently I fire this off every second, which neither seemed to
 increase the load on my ERL or produce duplicate outputs.

 This patch also maps out the rnm register which controls the status of
 the rng and entropy.

This doesn't compile. OCTEON_RNG_BASE needs to be defined somewhere.

Also, timeout_add(thing, 1) is not once per second, it's once per tick.

A couple of other nits while I'm here:

 diff -N dev/cn30xxrnmreg.h
 --- /dev/null   1 Jan 1970 00:00:00 -
 +++ dev/cn30xxrnmreg.h  22 Oct 2013 02:55:23 -

 +
 +#ifndef _CN30XXPKOREG_H_
 +#define _CN30XXPKOREG_H_

This should be changed so it doesn't collide with cn30xxpkoreg.h

 diff -N dev/octrng.c
 --- /dev/null   1 Jan 1970 00:00:00 -
 +++ dev/octrng.c22 Oct 2013 02:55:23 -
 +
 +   /* Add a 5 second timeout to collect entropy for
 +* the pool
 +*/

Might as well remove this comment before it gets further out of sync
with reality. The code is pretty self explanatory.



PATCH: Octeon RNG support

2013-10-21 Thread William Orr
Hey tech@

Here's a patch that adds octeon's onboard rng chip as a source of
entropy. Currently I fire this off every second, which neither seemed to
increase the load on my ERL or produce duplicate outputs.

This patch also maps out the rnm register which controls the status of
the rng and entropy.

Ok?

Index: conf/GENERIC
===
RCS file: /cvs/src/sys/arch/octeon/conf/GENERIC,v
retrieving revision 1.10
diff -u -b -w -p -r1.10 GENERIC
--- conf/GENERIC19 Sep 2013 00:15:59 -  1.10
+++ conf/GENERIC22 Oct 2013 02:55:23 -
@@ -51,3 +51,6 @@ pciide*   at pci? flags 0x
 
 # IDE hard drives
 wd*at pciide? flags 0x
+
+# RNG
+octrng0at iobus0
Index: conf/files.octeon
===
RCS file: /cvs/src/sys/arch/octeon/conf/files.octeon,v
retrieving revision 1.14
diff -u -b -w -p -r1.14 files.octeon
--- conf/files.octeon   15 Aug 2013 06:54:35 -  1.14
+++ conf/files.octeon   22 Oct 2013 02:55:23 -
@@ -90,3 +90,8 @@ file  arch/octeon/dev/octeon_pcibus.c p
 file   arch/octeon/dev/octeon_bus_space.c
 
 file   arch/octeon/octeon/pciide_machdep.c pciide
+
+# Onboard rng
+device octrng
+attach octrng at iobus
+file   arch/octeon/dev/octrng.coctrng
Index: dev/cn30xxrnmreg.h
===
RCS file: dev/cn30xxrnmreg.h
diff -N dev/cn30xxrnmreg.h
--- /dev/null   1 Jan 1970 00:00:00 -
+++ dev/cn30xxrnmreg.h  22 Oct 2013 02:55:23 -
@@ -0,0 +1,50 @@
+/* $OpenBSD$   */
+/*
+ * Copyright (c) 2013 William Orr w...@worrbase.com
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _CN30XXPKOREG_H_
+#define _CN30XXPKOREG_H_
+
+#define RNM_REG_BASE   0x000118004000ULL
+#define RNM_REG_SIZE   0xFULL
+
+#define RNM_REG_CTL0x000118004000ULL
+#define RNM_REG_BIST   0x000118004008ULL
+
+#define RNM_CTL_ENT_EN 0x0001ULL
+#define RNM_CTL_RNG_EN 0x0002ULL
+#define RNM_CTL_RNM_RST0x0004ULL
+#define RNM_CTL_RNG_RST0x0008ULL
+#define RNM_CTL_ENT_SEL0x00F0ULL
+#define RNM_CTL_EER_VAL0x0100ULL
+#define RNM_CTL_EER_LCK0x0200ULL
+#define RNM_CTL_DIS_MAK0x0400ULL
+
+#define RNM_BIST_MEM   0x0001ULL
+#define RNM_BIST_RRC   0x0002ULL
+
+#endif
+
Index: dev/octeon_iobus.c
===
RCS file: /cvs/src/sys/arch/octeon/dev/octeon_iobus.c,v
retrieving revision 1.4
diff -u -b -w -p -r1.4 octeon_iobus.c
--- dev/octeon_iobus.c  2 Jun 2013 20:29:36 -   1.4
+++ dev/octeon_iobus.c  22 Oct 2013 02:55:23 -
@@ -154,12 +154,14 @@ struct machine_bus_dma_tag iobus_bus_dma
 const struct iobus_unit iobus_units[] = {
{ OCTEON_CF_BASE, 0 },  /* octcf */
{ 0, 0 },   /* pcibus */
-   { GMX0_BASE_PORT0, CIU_INT_GMX_DRP0 }   /* cn30xxgmx */
+   { GMX0_BASE_PORT0, CIU_INT_GMX_DRP0 },  /* cn30xxgmx */
+   { OCTEON_RNG_BASE, 0 }  /* octrng */
 };
 struct iobus_attach_args iobus_children[] = {
IOBUSDEV(octcf, 0, iobus_units[0]),
IOBUSDEV(pcibus, 0, iobus_units[1]),
-   IOBUSDEV(cn30xxgmx, 0, iobus_units[2])
+   IOBUSDEV(cn30xxgmx, 0, iobus_units[2]),
+   IOBUSDEV(octrng, 0, iobus_units[3])
 };
 #undef IOBUSDEV
 
Index: dev/octrng.c
===
RCS file: