> Date: Fri, 9 Aug 2019 14:35:34 +0300
> From: Paul Irofti
>
> > > I changed cpu_serializing_counter() with tsc_get_timecount() as they
> > > were the same function now that msr is gone. Hope that is not too gross.
> >
> > That doesn't work as tsc_get_timecount() returns a 32-bit integer.
> >
> > I changed cpu_serializing_counter() with tsc_get_timecount() as they
> > were the same function now that msr is gone. Hope that is not too gross.
>
> That doesn't work as tsc_get_timecount() returns a 32-bit integer.
>
> I can not just rdtsc because that means changing the drift max
>
> I
> Date: Fri, 9 Aug 2019 10:21:14 +0300
> From: Paul Irofti
>
> On Wed, Aug 07, 2019 at 02:55:54PM +0200, Mark Kettenis wrote:
> > > Date: Tue, 6 Aug 2019 23:29:30 +0300
> > > From: Paul Irofti
> > >
> > > Hi,
> > >
> > > Here is a fourth diff addressing all the issues so far, that have been
>
On Wed, Aug 07, 2019 at 02:55:54PM +0200, Mark Kettenis wrote:
> > Date: Tue, 6 Aug 2019 23:29:30 +0300
> > From: Paul Irofti
> >
> > Hi,
> >
> > Here is a fourth diff addressing all the issues so far, that have been
> > mainly pointed out by kettenis@, thanks!
> >
> > Changes:
> > - stop
On 6.8.2019. 22:29, Paul Irofti wrote:
> Hi,
>
> Here is a fourth diff addressing all the issues so far, that have been
> mainly pointed out by kettenis@, thanks!
>
> Changes:
> - stop resetting the observed drift as it does not affect tsc
> re-initialization on resume, thus
> Date: Tue, 6 Aug 2019 23:29:30 +0300
> From: Paul Irofti
>
> Hi,
>
> Here is a fourth diff addressing all the issues so far, that have been
> mainly pointed out by kettenis@, thanks!
>
> Changes:
> - stop resetting the observed drift as it does not affect tsc
>
On Tue, Aug 06, 2019 at 11:29:30PM +0300, Paul Irofti wrote:
> Hi,
>
> Here is a fourth diff addressing all the issues so far, that have been
> mainly pointed out by kettenis@, thanks!
>
> Changes:
> - stop resetting the observed drift as it does not affect tsc
> re-initialization
/*
* Version of https://marc.info/?l=openbsd-tech=155978126517159=2
* without non-breaking spaces, thus appeasing -Wunicode-whitespace.
*/
#include
#include
#include
#include
int
main(void)
{
int r;
struct timespec tp1, tp2, tout;
tout.tv_sec = 0;
> There is another test program flying around the mailing lists I guess,
> but I could not locate it now so if someone is kind enough to reply with
> the code, that would be lovely!
I think this is the program you're looking for:
https://marc.info/?l=openbsd-tech=155978126517159=2
Hi,
Here is a fourth diff addressing all the issues so far, that have been
mainly pointed out by kettenis@, thanks!
Changes:
- stop resetting the observed drift as it does not affect tsc
re-initialization on resume, thus removing all changes from
acpi_machdep.c
On Tue, Aug 06, 2019 at 12:38:51AM +0200, Mark Kettenis wrote:
> > Date: Mon, 5 Aug 2019 16:58:27 +0300
> > From: Paul Irofti
> >
> > On Fri, Aug 02, 2019 at 01:29:37PM +0300, Paul Irofti wrote:
> > > On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > > > > Date: Thu, 27 Jun 2019
> Date: Mon, 5 Aug 2019 16:58:27 +0300
> From: Paul Irofti
>
> On Fri, Aug 02, 2019 at 01:29:37PM +0300, Paul Irofti wrote:
> > On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > > > Date: Thu, 27 Jun 2019 15:08:00 +0300
> > > > From: Paul Irofti
> > > >
> > > > Hi,
> > > >
>
> Date: Mon, 5 Aug 2019 16:58:27 +0300
> From: Paul Irofti
>
> On Fri, Aug 02, 2019 at 01:29:37PM +0300, Paul Irofti wrote:
> > On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > > > Date: Thu, 27 Jun 2019 15:08:00 +0300
> > > > From: Paul Irofti
> > > >
> > > > Hi,
> > > >
>
On Mon, Aug 05, 2019 at 04:58:27PM +0300, Paul Irofti wrote:
> Hi,
>
> Here is a third version of the TSC diff that also take into
> consideration the suspend-resume path which was ignored by the previous
> thus rendering resume broken.
>
> Have a go at it. Reports are welcome. So far I only got
On Fri, Aug 02, 2019 at 01:29:37PM +0300, Paul Irofti wrote:
> On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > > Date: Thu, 27 Jun 2019 15:08:00 +0300
> > > From: Paul Irofti
> > >
> > > Hi,
> > >
> > > Here is an initial diff, adapted from NetBSD, that synchronizes TSC
> > >
On Fri, Aug 02, 2019 at 01:29:37PM +0300, Paul Irofti wrote:
> Hi,
>
> Here is an updated diff with a few bugs eliminated from the previous and
> with most of the concerns I got in private and from Mark fixed.
>
> I will do the TSC_ADJUST_MSR dance in another iteration if the current
>
> Date: Fri, 2 Aug 2019 13:29:37 +0300
> From: Paul Irofti
>
> On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > > Date: Thu, 27 Jun 2019 15:08:00 +0300
> > > From: Paul Irofti
> > >
> > > Hi,
> > >
> > > Here is an initial diff, adapted from NetBSD, that synchronizes TSC
> >
On Mon, Jul 01, 2019 at 10:32:51AM +0200, Mark Kettenis wrote:
> > Date: Thu, 27 Jun 2019 15:08:00 +0300
> > From: Paul Irofti
> >
> > Hi,
> >
> > Here is an initial diff, adapted from NetBSD, that synchronizes TSC
> > clocks across cores.
> >
> > CPU0 is the reference clock and all others are
> Date: Thu, 27 Jun 2019 15:08:00 +0300
> From: Paul Irofti
>
> Hi,
>
> Here is an initial diff, adapted from NetBSD, that synchronizes TSC
> clocks across cores.
>
> CPU0 is the reference clock and all others are skewed. During CPU
> initialization the clocks synchronize by keeping a registry
Hi,
Thanks for the report!
This does not look correct.
TSC skew=-6129185140 drift=170
TSC skew=-6129184900 drift=-10
TSC skew=-6129184890 drift=-20
TSC skew=-6129184910 drift=30
TSC skew=-6129184910 drift=10
TSC skew=-6129184900 drift=20
TSC skew=-6129184910 drift=30
I'll be back with some
Paul Irofti writes:
> Hi,
>
> Here is an initial diff, adapted from NetBSD, that synchronizes TSC
> clocks across cores.
>
> CPU0 is the reference clock and all others are skewed. During CPU
> initialization the clocks synchronize by keeping a registry of each CPU
> clock skewness and adapting
Hi,
Here is an initial diff, adapted from NetBSD, that synchronizes TSC
clocks across cores.
CPU0 is the reference clock and all others are skewed. During CPU
initialization the clocks synchronize by keeping a registry of each CPU
clock skewness and adapting the TSC read routine accordingly.
I
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