On 2019/11/21 07:59, Patrick Wildt wrote:
> On Thu, Nov 21, 2019 at 06:52:36AM +, sc.dy...@gmail.com wrote:
>> Hi,
>>
>> On 2019/11/18 20:34, Marcus Glocker wrote:
>>> On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote:
>>>
While recently testing UDL on XHCI I faced a lot of US
On Thu, Nov 21, 2019 at 06:52:36AM +, sc.dy...@gmail.com wrote:
> Hi,
>
> On 2019/11/18 20:34, Marcus Glocker wrote:
> > On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote:
> >
> >> While recently testing UDL on XHCI I faced a lot of USB timeouts, and
> >> therefore screen renderi
Hi,
On 2019/11/18 20:34, Marcus Glocker wrote:
> On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote:
>
>> While recently testing UDL on XHCI I faced a lot of USB timeouts, and
>> therefore screen rendering issues.
>> The reason is that XHCI currently only supports single bulk transfer
On Sun, Nov 17, 2019 at 12:36:49PM +0100, Marcus Glocker wrote:
> While recently testing UDL on XHCI I faced a lot of USB timeouts, and
> therefore screen rendering issues.
> The reason is that XHCI currently only supports single bulk transfers
> up to 64k, while UDL can schedule a bulk transfer u
While recently testing UDL on XHCI I faced a lot of USB timeouts, and
therefore screen rendering issues.
The reason is that XHCI currently only supports single bulk transfers
up to 64k, while UDL can schedule a bulk transfer up to 1m.
The following diff adds XHCI bulk transfer support >64k and mak
