Re: additional drm fixes from linux-stable 3.10.y
On Sat, Jan 31, 2015 at 08:25:23PM +1100, Jonathan Gray wrote: Some test reports with this would be great. In particular for radeon. Been running this patch with i915 for 2 days now without any perceivable issues. OpenBSD 5.7-beta (GENERIC.MP) #23: Tue Feb 3 17:07:19 GMT 2015 r...@darkstar.2f30.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 8451125248 (8059MB) avail mem = 877632 (7841MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 2.6 @ 0xdae9c000 (63 entries) bios0: vendor LENOVO version 83ET76WW (1.46 ) date 07/05/2013 bios0: LENOVO 4236MBG acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP SLIC SSDT SSDT SSDT HPET APIC MCFG ECDT ASF! TCPA SSDT SSDT DMAR UEFI UEFI UEFI acpi0: wakeup devices LID_(S3) SLPB(S3) IGBE(S4) EXP4(S4) EHC1(S3) EHC2(S3) HDEF(S4) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpihpet0 at acpi0: 14318179 Hz acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Core(TM) i5-2540M CPU @ 2.60GHz, 2591.95 MHz cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,NXE,LONG,LAHF,PERF,ITSC cpu0: 256KB 64b/line 8-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 99MHz cpu0: mwait min=64, max=64, C-substates=0.2.1.1.2, IBE cpu1 at mainbus0: apid 1 (application processor) cpu1: Intel(R) Core(TM) i5-2540M CPU @ 2.60GHz, 2591.58 MHz cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,NXE,LONG,LAHF,PERF,ITSC cpu1: 256KB 64b/line 8-way L2 cache cpu1: smt 1, core 0, package 0 cpu2 at mainbus0: apid 2 (application processor) cpu2: Intel(R) Core(TM) i5-2540M CPU @ 2.60GHz, 2591.58 MHz cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,NXE,LONG,LAHF,PERF,ITSC cpu2: 256KB 64b/line 8-way L2 cache cpu2: smt 0, core 1, package 0 cpu3 at mainbus0: apid 3 (application processor) cpu3: Intel(R) Core(TM) i5-2540M CPU @ 2.60GHz, 2591.58 MHz cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,SMX,EST,TM2,SSSE3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,POPCNT,DEADLINE,AES,XSAVE,AVX,NXE,LONG,LAHF,PERF,ITSC cpu3: 256KB 64b/line 8-way L2 cache cpu3: smt 1, core 1, package 0 ioapic0 at mainbus0: apid 2 pa 0xfec0, version 20, 24 pins acpimcfg0 at acpi0 addr 0xf800, bus 0-63 acpiec0 at acpi0 acpiprt0 at acpi0: bus 0 (PCI0) acpiprt1 at acpi0: bus -1 (PEG_) acpiprt2 at acpi0: bus 2 (EXP1) acpiprt3 at acpi0: bus 3 (EXP2) acpiprt4 at acpi0: bus -1 (EXP4) acpiprt5 at acpi0: bus 13 (EXP5) acpicpu0 at acpi0: C3, C1, PSS acpicpu1 at acpi0: C3, C1, PSS acpicpu2 at acpi0: C3, C1, PSS acpicpu3 at acpi0: C3, C1, PSS acpipwrres0 at acpi0: PUBS, resource for EHC1, EHC2 acpitz0 at acpi0: critical temperature is 98 degC acpibtn0 at acpi0: LID_ acpibtn1 at acpi0: SLPB acpibat0 at acpi0: BAT0 model 45N1173 serial 26283 type LION oem SANYO acpibat1 at acpi0: BAT1 not present acpiac0 at acpi0: AC unit online acpithinkpad0 at acpi0 cpu0: Enhanced SpeedStep 2591 MHz: speeds: 2601, 2600, 2400, 2200, 2000, 1800, 1600, 1400, 1200, 1000, 800 MHz pci0 at mainbus0 bus 0 pchb0 at pci0 dev 0 function 0 Intel Core 2G Host rev 0x09 vga1 at pci0 dev 2 function 0 Intel HD Graphics 3000 rev 0x09 intagp at vga1 not configured inteldrm0 at vga1 drm0 at inteldrm0 drm: Memory usable by graphics device = 2048M inteldrm0: 1600x900 wsdisplay0 at vga1 mux 1: console (std, vt100 emulation) wsdisplay0: screen 1-5 added (std, vt100 emulation) Intel 6 Series MEI rev 0x04 at pci0 dev 22 function 0 not configured puc0 at pci0 dev 22 function 3 Intel 6 Series KT rev 0x04: ports: 1 com com4 at puc0 port 0 apic 2 int 19: ns16550a, 16 byte fifo com4: probed fifo depth: 0 bytes em0 at pci0 dev 25 function 0 Intel 82579LM rev 0x04: msi, address 00:21:cc:5d:e1:40 ehci0 at pci0 dev 26 function 0 Intel 6 Series USB rev 0x04: apic 2 int 16 usb0 at ehci0: USB revision 2.0 uhub0 at usb0 Intel EHCI root hub rev 2.00/1.00 addr 1 azalia0 at pci0 dev 27 function 0 Intel 6 Series HD Audio rev 0x04: msi azalia0: codecs: Conexant/0x506e, Intel/0x2805, using Conexant/0x506e audio0 at azalia0 ppb0 at pci0 dev 28 function 0 Intel 6 Series PCIE rev 0xb4: msi pci1 at ppb0 bus 2 ppb1 at pci0 dev 28 function 1 Intel 6 Series PCIE rev 0xb4: msi pci2 at ppb1
Re: additional drm fixes from linux-stable 3.10.y
On 1/31/2015 4:25 AM, Jonathan Gray wrote: Some test reports with this would be great. In particular for radeon. drm/i915: Fix mutex-owner inspection race under DEBUG_MUTEXES drm/i915: Force the CS stall for invalidate flushes drm/i915: Invalidate media caches on gen7 drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw drm/radeon: check the right ring in radeon_evict_flags() drm/i915: Unlock panel even when LVDS is disabled drm_calc_vbltimestamp_from_scanoutpos with 3.18.0-rc6 drm/radeon: add missing crtc unlock when setting up the MC drm/radeon: add connector quirk for fujitsu board drm/i915: Wait for vblank before enabling the TV encoder drm/i915: Remove bogus __init annotation from DMI callbacks drm/i915: read HEAD register back in init_ring_common() to enforce ordering drm/radeon: load the lm63 driver for an lm64 thermal chip. drm/radeon: avoid leaking edid data drm/radeon: set default bl level to something reasonable drm/radeon: stop poisoning the GART TLB I applied this against -current synced via CVS earlier today. The machine seems to work fine. drm still seems to be broken on this particular machine. I don't particularly care since it seems that 2D acceleration works on this machine which is all I might care about anyway. The Radeon chip in it is ancient so it may be a won't fix type thing but if anyone wants any additional info or wants me to test something on it, let me know. Below is the dmesg: OpenBSD 5.7-beta (GENERIC.MP) #6: Mon Feb 2 14:31:00 EST 2015 r...@test.johnmerriam.net:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 3437608960 (3278MB) avail mem = 3342286848 (3187MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 2.3 @ 0xf0450 (68 entries) bios0: vendor Dell Inc. version 1.1.12 date 06/17/2009 bios0: Dell Inc. OptiPlex 320 acpi0 at bios0: rev 2 acpi0: sleep states S0 S1 S3 S4 S5 acpi0: tables DSDT FACP SSDT APIC BOOT MCFG HPET SLIC SSDT SSDT SSDT acpi0: wakeup devices VBTN(S4) PCI0(S5) PCI7(S5) MAC1(S5) MOU_(S3) USB0(S3) USB1(S3) USB2(S3) USB3(S3) USB4(S3) USB5(S3) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Core(TM)2 Duo CPU E4400 @ 2.00GHz, 2000.35 MHz cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,DTES64,MWAIT,DS-CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,NXE,LONG,LAHF,PERF cpu0: 2MB 64b/line 8-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 8 var ranges, 88 fixed ranges cpu0: apic clock running at 200MHz cpu0: mwait min=64, max=64, C-substates=0.2.2.0.0, IBE cpu1 at mainbus0: apid 1 (application processor) cpu1: Intel(R) Core(TM)2 Duo CPU E4400 @ 2.00GHz, 2000.08 MHz cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,DTES64,MWAIT,DS-CPL,EST,TM2,SSSE3,CX16,xTPR,PDCM,NXE,LONG,LAHF,PERF cpu1: 2MB 64b/line 8-way L2 cache cpu1: smt 0, core 1, package 0 ioapic0 at mainbus0: apid 8 pa 0xfec0, version 21, 24 pins ioapic0: misconfigured as apic 0, remapped to apid 8 acpimcfg0 at acpi0 addr 0xe000, bus 0-255 acpihpet0 at acpi0: 14318180 Hz acpiprt0 at acpi0: bus 1 (PCI1) acpiprt1 at acpi0: bus -1 (PCI2) acpiprt2 at acpi0: bus -1 (PCI3) acpiprt3 at acpi0: bus -1 (PCI4) acpiprt4 at acpi0: bus -1 (PCI5) acpiprt5 at acpi0: bus -1 (PCI6) acpiprt6 at acpi0: bus -1 (PCI8) acpiprt7 at acpi0: bus 2 (PCI7) acpiprt8 at acpi0: bus 0 (PCI0) acpicpu0 at acpi0: PSS acpicpu1 at acpi0: PSS acpibtn0 at acpi0: VBTN cpu0: Enhanced SpeedStep 2000 MHz: speeds: 2000, 1600, 1200 MHz pci0 at mainbus0 bus 0 0:20:0: mem address conflict 0xfed0/0x400 pchb0 at pci0 dev 0 function 0 ATI RC410 Host rev 0x01 ppb0 at pci0 dev 1 function 0 ATI RS480 PCIE rev 0x00 pci1 at ppb0 bus 1 radeondrm0 at pci1 dev 5 function 0 ATI Radeon XPRESS 200 rev 0x00 drm0 at radeondrm0 radeondrm0: apic 8 int 17 ahci0 at pci0 dev 18 function 0 ATI SB600 SATA rev 0x00: apic 8 int 23, AHCI 1.1 scsibus1 at ahci0: 32 targets sd0 at scsibus1 targ 0 lun 0: ATA, WDC WD5000AACS-0, 05.0 SCSI3 0/direct fixed naa.50014ee201ce1451 sd0: 476940MB, 512 bytes/sector, 976773168 sectors cd0 at scsibus1 targ 1 lun 0: PBDS, CDRWDVD DH-48C2S, ND11 ATAPI 5/cdrom removable ohci0 at pci0 dev 19 function 0 ATI SB600 USB rev 0x00: apic 8 int 16, version 1.0, legacy support ohci1 at pci0 dev 19 function 1 ATI SB600 USB rev 0x00: apic 8 int 17, version 1.0, legacy support ohci2 at pci0 dev 19 function 2 ATI SB600 USB rev 0x00: apic 8 int 18, version 1.0, legacy support ohci3 at pci0 dev 19 function 3 ATI SB600 USB rev 0x00: apic 8 int 17, version 1.0, legacy support ohci4 at pci0 dev 19 function 4 ATI SB600 USB rev 0x00: apic 8 int 18, version 1.0, legacy support ehci0 at pci0 dev 19 function 5 ATI SB600 USB2 rev 0x00: apic 8 int 19 usb0 at ehci0: USB revision 2.0 uhub0 at usb0
additional drm fixes from linux-stable 3.10.y
Some test reports with this would be great.
In particular for radeon.
drm/i915: Fix mutex-owner inspection race under DEBUG_MUTEXES
drm/i915: Force the CS stall for invalidate flushes
drm/i915: Invalidate media caches on gen7
drm/radeon: properly filter DP1.2 4k modes on non-DP1.2 hw
drm/radeon: check the right ring in radeon_evict_flags()
drm/i915: Unlock panel even when LVDS is disabled
drm_calc_vbltimestamp_from_scanoutpos with 3.18.0-rc6
drm/radeon: add missing crtc unlock when setting up the MC
drm/radeon: add connector quirk for fujitsu board
drm/i915: Wait for vblank before enabling the TV encoder
drm/i915: Remove bogus __init annotation from DMI callbacks
drm/i915: read HEAD register back in init_ring_common() to enforce ordering
drm/radeon: load the lm63 driver for an lm64 thermal chip.
drm/radeon: avoid leaking edid data
drm/radeon: set default bl level to something reasonable
drm/radeon: stop poisoning the GART TLB
diff --git sys/dev/pci/drm/i915/i915_gem.c sys/dev/pci/drm/i915/i915_gem.c
index d42b923..95e351f 100644
--- sys/dev/pci/drm/i915/i915_gem.c
+++ sys/dev/pci/drm/i915/i915_gem.c
@@ -4596,7 +4596,7 @@ static bool mutex_is_locked_by(struct mutex *mutex,
struct task_struct *task)
if (!mutex_is_locked(mutex))
return false;
-#if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_MUTEXES)
+#if defined(CONFIG_SMP) !defined(CONFIG_DEBUG_MUTEXES)
return mutex-owner == task;
#else
/* Since UP may be pre-empted, we cannot assume that we own the lock */
diff --git sys/dev/pci/drm/i915/i915_reg.h sys/dev/pci/drm/i915/i915_reg.h
index cf447cf..b4b25bc 100644
--- sys/dev/pci/drm/i915/i915_reg.h
+++ sys/dev/pci/drm/i915/i915_reg.h
@@ -305,6 +305,7 @@
#define PIPE_CONTROL_GLOBAL_GTT_IVB (124) /* gen7+ */
#define PIPE_CONTROL_CS_STALL(120)
#define PIPE_CONTROL_TLB_INVALIDATE (118)
+#define PIPE_CONTROL_MEDIA_STATE_CLEAR (116)
#define PIPE_CONTROL_QW_WRITE(114)
#define PIPE_CONTROL_DEPTH_STALL (113)
#define PIPE_CONTROL_WRITE_FLUSH (112)
diff --git sys/dev/pci/drm/i915/intel_bios.c sys/dev/pci/drm/i915/intel_bios.c
index 88406ad..47a0285 100644
--- sys/dev/pci/drm/i915/intel_bios.c
+++ sys/dev/pci/drm/i915/intel_bios.c
@@ -660,7 +660,7 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
DRM_DEBUG_KMS(Set default to SSC at %dMHz\n, dev_priv-lvds_ssc_freq);
}
-static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id
*id)
+static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
{
DRM_DEBUG_KMS(Falling back to manually reading VBT from
VBIOS ROM for %s\n,
diff --git sys/dev/pci/drm/i915/intel_crt.c sys/dev/pci/drm/i915/intel_crt.c
index adbbadf..9e8f01d 100644
--- sys/dev/pci/drm/i915/intel_crt.c
+++ sys/dev/pci/drm/i915/intel_crt.c
@@ -714,7 +714,7 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs =
{
.destroy = intel_encoder_destroy,
};
-static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
+static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
{
printf(Skipping CRT initialization for %s\n, id-ident);
return 1;
diff --git sys/dev/pci/drm/i915/intel_lvds.c sys/dev/pci/drm/i915/intel_lvds.c
index 6c18e63..5b00c6f 100644
--- sys/dev/pci/drm/i915/intel_lvds.c
+++ sys/dev/pci/drm/i915/intel_lvds.c
@@ -636,7 +636,7 @@ static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
.destroy = intel_encoder_destroy,
};
-static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
+static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
{
printf(Skipping LVDS initialization for %s\n, id-ident);
return 1;
@@ -984,6 +984,17 @@ bool intel_lvds_init(struct drm_device *dev)
int pipe;
u8 pin;
+ /*
+* Unlock registers and just leave them unlocked. Do this before
+* checking quirk lists to avoid bogus WARNINGs.
+*/
+ if (HAS_PCH_SPLIT(dev)) {
+ I915_WRITE(PCH_PP_CONTROL,
+ I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
+ } else {
+ I915_WRITE(PP_CONTROL,
+ I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
+ }
if (!intel_lvds_supported(dev))
return false;
@@ -1154,17 +1165,6 @@ bool intel_lvds_init(struct drm_device *dev)
goto failed;
out:
- /*
-* Unlock registers and just
-* leave them unlocked
-*/
- if (HAS_PCH_SPLIT(dev)) {
- I915_WRITE(PCH_PP_CONTROL,
- I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
- } else {
- I915_WRITE(PP_CONTROL,
- I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
- }
