Re: memory barriers and atomic instructions

[Martin Pieuchot]

On 23/05/17(Tue) 17:41, Mark Kettenis wrote:
> So here is a diff that implements what I proposed recently.  This
> recognizes that atomic instructions on amd64 already include an
> implicit memory barrier and allows us to write optimized code that
> avoids a redundant memory barrier.
> 
> Note that I don't have a use-case for membar_exit_before_atomic() yet;
> I merely added it for symmetry reasons.  I can leave it out if that's
> what people prefer.
> 
> This should allow us to use a generic mutex implementation written in
> C without a significant penalty.

This will be used in userland futex-based mutexes as well.

ok mpi@

> Index: sys/atomic.h
> ===
> RCS file: /cvs/src/sys/sys/atomic.h,v
> retrieving revision 1.4
> diff -u -p -r1.4 atomic.h
> --- sys/atomic.h  24 Jan 2017 22:22:20 -  1.4
> +++ sys/atomic.h  23 May 2017 15:01:34 -
> @@ -219,4 +219,12 @@ atomic_sub_long_nv(volatile unsigned lon
>  #define membar_sync() __sync_synchronize()
>  #endif
>  
> +#ifndef membar_enter_after_atomic
> +#define membar_enter_after_atomic() membar_enter()
> +#endif
> +
> +#ifndef membar_exit_before_atomic
> +#define membar_exit_before_atomic() membar_exit()
> +#endif
> +
>  #endif /* _SYS_ATOMIC_H_ */
> Index: arch/amd64/include/atomic.h
> ===
> RCS file: /cvs/src/sys/arch/amd64/include/atomic.h,v
> retrieving revision 1.19
> diff -u -p -r1.19 atomic.h
> --- arch/amd64/include/atomic.h   12 May 2017 08:47:03 -  1.19
> +++ arch/amd64/include/atomic.h   23 May 2017 15:02:23 -
> @@ -276,6 +276,9 @@ _atomic_sub_long_nv(volatile unsigned lo
>  #define membar_sync()__membar("")
>  #endif
>  
> +#define membar_enter_after_atomic()  __membar("")
> +#define membar_exit_before_atomic()  __membar("")
> +
>  #ifdef _KERNEL
>  
>  /* virtio needs MP membars even on SP kernels */
> 

Re: memory barriers and atomic instructions

[Mark Kettenis]

> Date: Tue, 23 May 2017 17:58:56 +0200
> From: Mike Belopuhov 
> 
> On Tue, May 23, 2017 at 17:41 +0200, Mark Kettenis wrote:
> > So here is a diff that implements what I proposed recently.  This
> > recognizes that atomic instructions on amd64 already include an
> > implicit memory barrier and allows us to write optimized code that
> > avoids a redundant memory barrier.
> > 
> > Note that I don't have a use-case for membar_exit_before_atomic() yet;
> > I merely added it for symmetry reasons.  I can leave it out if that's
> > what people prefer.
> > 
> > This should allow us to use a generic mutex implementation written in
> > C without a significant penalty.
> > 
> > ok?
> >
> 
> LGTM, but shouldn't the same thing be done to i386?

Yes.

> > Index: sys/atomic.h
> > ===
> > RCS file: /cvs/src/sys/sys/atomic.h,v
> > retrieving revision 1.4
> > diff -u -p -r1.4 atomic.h
> > --- sys/atomic.h24 Jan 2017 22:22:20 -  1.4
> > +++ sys/atomic.h23 May 2017 15:01:34 -
> > @@ -219,4 +219,12 @@ atomic_sub_long_nv(volatile unsigned lon
> >  #define membar_sync() __sync_synchronize()
> >  #endif
> >  
> > +#ifndef membar_enter_after_atomic
> > +#define membar_enter_after_atomic() membar_enter()
> > +#endif
> > +
> > +#ifndef membar_exit_before_atomic
> > +#define membar_exit_before_atomic() membar_exit()
> > +#endif
> > +
> >  #endif /* _SYS_ATOMIC_H_ */
> > Index: arch/amd64/include/atomic.h
> > ===
> > RCS file: /cvs/src/sys/arch/amd64/include/atomic.h,v
> > retrieving revision 1.19
> > diff -u -p -r1.19 atomic.h
> > --- arch/amd64/include/atomic.h 12 May 2017 08:47:03 -  1.19
> > +++ arch/amd64/include/atomic.h 23 May 2017 15:02:23 -
> > @@ -276,6 +276,9 @@ _atomic_sub_long_nv(volatile unsigned lo
> >  #define membar_sync()  __membar("")
> >  #endif
> >  
> > +#define membar_enter_after_atomic()__membar("")
> > +#define membar_exit_before_atomic()__membar("")
> > +
> >  #ifdef _KERNEL
> >  
> >  /* virtio needs MP membars even on SP kernels */
> > 
> 

Re: memory barriers and atomic instructions

[Mike Belopuhov]

On Tue, May 23, 2017 at 17:41 +0200, Mark Kettenis wrote:
> So here is a diff that implements what I proposed recently.  This
> recognizes that atomic instructions on amd64 already include an
> implicit memory barrier and allows us to write optimized code that
> avoids a redundant memory barrier.
> 
> Note that I don't have a use-case for membar_exit_before_atomic() yet;
> I merely added it for symmetry reasons.  I can leave it out if that's
> what people prefer.
> 
> This should allow us to use a generic mutex implementation written in
> C without a significant penalty.
> 
> ok?
>

LGTM, but shouldn't the same thing be done to i386?

> 
> 
> Index: sys/atomic.h
> ===
> RCS file: /cvs/src/sys/sys/atomic.h,v
> retrieving revision 1.4
> diff -u -p -r1.4 atomic.h
> --- sys/atomic.h  24 Jan 2017 22:22:20 -  1.4
> +++ sys/atomic.h  23 May 2017 15:01:34 -
> @@ -219,4 +219,12 @@ atomic_sub_long_nv(volatile unsigned lon
>  #define membar_sync() __sync_synchronize()
>  #endif
>  
> +#ifndef membar_enter_after_atomic
> +#define membar_enter_after_atomic() membar_enter()
> +#endif
> +
> +#ifndef membar_exit_before_atomic
> +#define membar_exit_before_atomic() membar_exit()
> +#endif
> +
>  #endif /* _SYS_ATOMIC_H_ */
> Index: arch/amd64/include/atomic.h
> ===
> RCS file: /cvs/src/sys/arch/amd64/include/atomic.h,v
> retrieving revision 1.19
> diff -u -p -r1.19 atomic.h
> --- arch/amd64/include/atomic.h   12 May 2017 08:47:03 -  1.19
> +++ arch/amd64/include/atomic.h   23 May 2017 15:02:23 -
> @@ -276,6 +276,9 @@ _atomic_sub_long_nv(volatile unsigned lo
>  #define membar_sync()__membar("")
>  #endif
>  
> +#define membar_enter_after_atomic()  __membar("")
> +#define membar_exit_before_atomic()  __membar("")
> +
>  #ifdef _KERNEL
>  
>  /* virtio needs MP membars even on SP kernels */
> 

memory barriers and atomic instructions

[Mark Kettenis]

So here is a diff that implements what I proposed recently.  This
recognizes that atomic instructions on amd64 already include an
implicit memory barrier and allows us to write optimized code that
avoids a redundant memory barrier.

Note that I don't have a use-case for membar_exit_before_atomic() yet;
I merely added it for symmetry reasons.  I can leave it out if that's
what people prefer.

This should allow us to use a generic mutex implementation written in
C without a significant penalty.

ok?



Index: sys/atomic.h
===
RCS file: /cvs/src/sys/sys/atomic.h,v
retrieving revision 1.4
diff -u -p -r1.4 atomic.h
--- sys/atomic.h24 Jan 2017 22:22:20 -  1.4
+++ sys/atomic.h23 May 2017 15:01:34 -
@@ -219,4 +219,12 @@ atomic_sub_long_nv(volatile unsigned lon
 #define membar_sync() __sync_synchronize()
 #endif
 
+#ifndef membar_enter_after_atomic
+#define membar_enter_after_atomic() membar_enter()
+#endif
+
+#ifndef membar_exit_before_atomic
+#define membar_exit_before_atomic() membar_exit()
+#endif
+
 #endif /* _SYS_ATOMIC_H_ */
Index: arch/amd64/include/atomic.h
===
RCS file: /cvs/src/sys/arch/amd64/include/atomic.h,v
retrieving revision 1.19
diff -u -p -r1.19 atomic.h
--- arch/amd64/include/atomic.h 12 May 2017 08:47:03 -  1.19
+++ arch/amd64/include/atomic.h 23 May 2017 15:02:23 -
@@ -276,6 +276,9 @@ _atomic_sub_long_nv(volatile unsigned lo
 #define membar_sync()  __membar("")
 #endif
 
+#define membar_enter_after_atomic()__membar("")
+#define membar_exit_before_atomic()__membar("")
+
 #ifdef _KERNEL
 
 /* virtio needs MP membars even on SP kernels */