Merge definitions for TX and RX descriptors to the common header file.
The structs have different sizes but all the bit masks can be shared.
Again, tested with:
MAC/BB RTL8188CUS, RF 6052 1T1R
MAC/BB RTL8188EU, RF 6052 1T1R
MAC/BB RTL8192CU, RF 6052 2T2R
MAC/BB RTL8188CE, RF 6052 1T1R
Index: ic/r92creg.h
===================================================================
RCS file: /cvs/src/sys/dev/ic/r92creg.h,v
retrieving revision 1.1
diff -u -p -r1.1 r92creg.h
--- ic/r92creg.h 7 Mar 2016 16:17:35 -0000 1.1
+++ ic/r92creg.h 7 Mar 2016 17:10:21 -0000
@@ -1074,6 +1074,149 @@ struct r88e_rx_cck {
uint8_t reserved4;
} __packed;
+/* Rx MAC descriptor. */
+
+struct r92c_rx_desc_pci {
+ uint32_t rxdw0;
+ uint32_t rxdw1;
+ uint32_t rxdw2;
+ uint32_t rxdw3;
+ uint32_t rxdw4;
+ uint32_t rxdw5;
+ uint32_t rxbufaddr;
+ uint32_t rxbufaddr64;
+} __packed __attribute__((aligned(4)));
+
+struct r92c_rx_desc_usb {
+ uint32_t rxdw0;
+ uint32_t rxdw1;
+ uint32_t rxdw2;
+ uint32_t rxdw3;
+ uint32_t rxdw4;
+ uint32_t rxdw5;
+} __packed __attribute__((aligned(4)));
+
+#define R92C_RXDW0_PKTLEN_M 0x00003fff
+#define R92C_RXDW0_PKTLEN_S 0
+#define R92C_RXDW0_CRCERR 0x00004000
+#define R92C_RXDW0_ICVERR 0x00008000
+#define R92C_RXDW0_INFOSZ_M 0x000f0000
+#define R92C_RXDW0_INFOSZ_S 16
+#define R92C_RXDW0_QOS 0x00800000
+#define R92C_RXDW0_SHIFT_M 0x03000000
+#define R92C_RXDW0_SHIFT_S 24
+#define R92C_RXDW0_PHYST 0x04000000
+#define R92C_RXDW0_DECRYPTED 0x08000000
+#define R92C_RXDW0_LS 0x10000000
+#define R92C_RXDW0_FS 0x20000000
+#define R92C_RXDW0_EOR 0x40000000
+#define R92C_RXDW0_OWN 0x80000000
+
+#define R92C_RXDW2_PKTCNT_M 0x00ff0000
+#define R92C_RXDW2_PKTCNT_S 16
+
+#define R92C_RXDW3_RATE_M 0x0000003f
+#define R92C_RXDW3_RATE_S 0
+#define R92C_RXDW3_HT 0x00000040
+#define R92C_RXDW3_HTC 0x00000400
+
+/* Tx MAC descriptor. */
+
+struct r92c_tx_desc_pci {
+ uint32_t txdw0;
+ uint32_t txdw1;
+ uint32_t txdw2;
+ uint16_t txdw3;
+ uint16_t txdseq;
+ uint32_t txdw4;
+ uint32_t txdw5;
+ uint32_t txdw6;
+ uint16_t txbufsize;
+ uint16_t pad;
+ uint32_t txbufaddr;
+ uint32_t txbufaddr64;
+ uint32_t nextdescaddr;
+ uint32_t nextdescaddr64;
+ uint32_t reserved[4];
+} __packed __attribute__((aligned(4)));
+
+struct r92c_tx_desc_usb {
+ uint32_t txdw0;
+ uint32_t txdw1;
+ uint32_t txdw2;
+ uint16_t txdw3;
+ uint16_t txdseq;
+ uint32_t txdw4;
+ uint32_t txdw5;
+ uint32_t txdw6;
+ uint16_t txdsum;
+ uint16_t pad;
+} __packed __attribute__((aligned(4)));
+
+#define R92C_TXDW0_PKTLEN_M 0x0000ffff
+#define R92C_TXDW0_PKTLEN_S 0
+#define R92C_TXDW0_OFFSET_M 0x00ff0000
+#define R92C_TXDW0_OFFSET_S 16
+#define R92C_TXDW0_BMCAST 0x01000000
+#define R92C_TXDW0_LSG 0x04000000
+#define R92C_TXDW0_FSG 0x08000000
+#define R92C_TXDW0_OWN 0x80000000
+
+#define R92C_TXDW1_MACID_M 0x0000001f
+#define R92C_TXDW1_MACID_S 0
+#define R88E_TXDW1_MACID_M 0x0000003f
+#define R88E_TXDW1_MACID_S 0
+#define R92C_TXDW1_AGGEN 0x00000020
+#define R92C_TXDW1_AGGBK 0x00000040
+#define R92C_TXDW1_QSEL_M 0x00001f00
+#define R92C_TXDW1_QSEL_S 8
+#define R92C_TXDW1_QSEL_BE 0x00
+#define R92C_TXDW1_QSEL_BK 0x02
+#define R92C_TXDW1_QSEL_VI 0x05
+#define R92C_TXDW1_QSEL_VO 0x07
+#define R92C_TXDW1_QSEL_BEACON 0x10
+#define R92C_TXDW1_QSEL_HIGH 0x11
+#define R92C_TXDW1_QSEL_MGNT 0x12
+#define R92C_TXDW1_QSEL_CMD 0x13
+#define R92C_TXDW1_RAID_M 0x000f0000
+#define R92C_TXDW1_RAID_S 16
+#define R92C_TXDW1_CIPHER_M 0x00c00000
+#define R92C_TXDW1_CIPHER_S 22
+#define R92C_TXDW1_CIPHER_NONE 0
+#define R92C_TXDW1_CIPHER_RC4 1
+#define R92C_TXDW1_CIPHER_AES 3
+#define R92C_TXDW1_PKTOFF_M 0x7c000000
+#define R92C_TXDW1_PKTOFF_S 26
+
+#define R88E_TXDW2_AGGBK 0x00010000
+
+#define R92C_TXDW4_RTSRATE_M 0x0000003f
+#define R92C_TXDW4_RTSRATE_S 0
+#define R92C_TXDW4_QOS 0x00000040
+#define R92C_TXDW4_HWSEQ 0x00000080
+#define R92C_TXDW4_DRVRATE 0x00000100
+#define R92C_TXDW4_CTS2SELF 0x00000800
+#define R92C_TXDW4_RTSEN 0x00001000
+#define R92C_TXDW4_HWRTSEN 0x00002000
+#define R92C_TXDW4_SCO_M 0x003f0000
+#define R92C_TXDW4_SCO_S 20
+#define R92C_TXDW4_SCO_SCA 1
+#define R92C_TXDW4_SCO_SCB 2
+#define R92C_TXDW4_40MHZ 0x02000000
+
+#define R92C_TXDW5_DATARATE_M 0x0000003f
+#define R92C_TXDW5_DATARATE_S 0
+#define R92C_TXDW5_SGI 0x00000040
+#define R92C_TXDW5_DATARATE_FBLIMIT_M 0x00001f00
+#define R92C_TXDW5_DATARATE_FBLIMIT_S 8
+#define R92C_TXDW5_RTSRATE_FBLIMIT_M 0x0001e000
+#define R92C_TXDW5_RTSRATE_FBLIMIT_S 13
+#define R92C_TXDW5_RETRY_LIMIT_ENABLE 0x00020000
+#define R92C_TXDW5_DATA_RETRY_LIMIT_M 0x00fc0000
+#define R92C_TXDW5_DATA_RETRY_LIMIT_S 18
+#define R92C_TXDW5_AGGNUM_M 0xff000000
+#define R92C_TXDW5_AGGNUM_S 24
+
/*
* MAC initialization values.
*/
Index: pci/if_rtwn.c
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_rtwn.c,v
retrieving revision 1.13
diff -u -p -r1.13 if_rtwn.c
--- pci/if_rtwn.c 7 Mar 2016 16:17:36 -0000 1.13
+++ pci/if_rtwn.c 7 Mar 2016 17:16:06 -0000
@@ -89,8 +89,8 @@ int rtwn_activate(struct device *, int)
int rtwn_alloc_rx_list(struct rtwn_softc *);
void rtwn_reset_rx_list(struct rtwn_softc *);
void rtwn_free_rx_list(struct rtwn_softc *);
-void rtwn_setup_rx_desc(struct rtwn_softc *, struct r92c_rx_desc *,
- bus_addr_t, size_t, int);
+void rtwn_setup_rx_desc(struct rtwn_softc *,
+ struct r92c_rx_desc_pci *, bus_addr_t, size_t, int);
int rtwn_alloc_tx_list(struct rtwn_softc *, int);
void rtwn_reset_tx_list(struct rtwn_softc *, int);
void rtwn_free_tx_list(struct rtwn_softc *, int);
@@ -124,7 +124,7 @@ void rtwn_delete_key(struct ieee80211co
struct ieee80211_node *, struct ieee80211_key *);
void rtwn_update_avgrssi(struct rtwn_softc *, int, int8_t);
int8_t rtwn_get_rssi(struct rtwn_softc *, int, void *);
-void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc *,
+void rtwn_rx_frame(struct rtwn_softc *, struct r92c_rx_desc_pci *,
struct rtwn_rx_data *, int);
int rtwn_tx(struct rtwn_softc *, struct mbuf *,
struct ieee80211_node *);
@@ -414,7 +414,7 @@ rtwn_activate(struct device *self, int a
}
void
-rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc *desc,
+rtwn_setup_rx_desc(struct rtwn_softc *sc, struct r92c_rx_desc_pci *desc,
bus_addr_t addr, size_t len, int idx)
{
memset(desc, 0, sizeof(*desc));
@@ -435,7 +435,7 @@ rtwn_alloc_rx_list(struct rtwn_softc *sc
int i, error = 0;
/* Allocate Rx descriptors. */
- size = sizeof(struct r92c_rx_desc) * RTWN_RX_LIST_COUNT;
+ size = sizeof(struct r92c_rx_desc_pci) * RTWN_RX_LIST_COUNT;
error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, BUS_DMA_NOWAIT,
&rx_ring->map);
if (error != 0) {
@@ -538,7 +538,8 @@ rtwn_free_rx_list(struct rtwn_softc *sc)
if (rx_ring->desc) {
bus_dmamap_unload(sc->sc_dmat, rx_ring->map);
bus_dmamem_unmap(sc->sc_dmat, (caddr_t)rx_ring->desc,
- sizeof (struct r92c_rx_desc) * RTWN_RX_LIST_COUNT);
+ sizeof (struct r92c_rx_desc_pci) *
+ RTWN_RX_LIST_COUNT);
bus_dmamem_free(sc->sc_dmat, &rx_ring->seg,
rx_ring->nsegs);
rx_ring->desc = NULL;
@@ -570,9 +571,9 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc
int i = 0, error = 0;
error = bus_dmamap_create(sc->sc_dmat,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT, 1,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT, 0,
BUS_DMA_NOWAIT,
- &tx_ring->map);
+ sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT, 1,
+ sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT, 0,
+ BUS_DMA_NOWAIT, &tx_ring->map);
if (error != 0) {
printf("%s: could not create tx ring DMA map\n",
sc->sc_dev.dv_xname);
@@ -580,7 +581,7 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc
}
error = bus_dmamem_alloc(sc->sc_dmat,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT, PAGE_SIZE, 0,
+ sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT, PAGE_SIZE, 0,
&tx_ring->seg, 1, &tx_ring->nsegs, BUS_DMA_NOWAIT | BUS_DMA_ZERO);
if (error != 0) {
printf("%s: could not allocate tx ring DMA memory\n",
@@ -589,7 +590,7 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc
}
error = bus_dmamem_map(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT,
+ sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT,
(caddr_t *)&tx_ring->desc, BUS_DMA_NOWAIT);
if (error != 0) {
bus_dmamem_free(sc->sc_dmat, &tx_ring->seg, tx_ring->nsegs);
@@ -599,7 +600,7 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc
}
error = bus_dmamap_load(sc->sc_dmat, tx_ring->map, tx_ring->desc,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT, NULL,
+ sizeof (struct r92c_tx_desc_pci) * RTWN_TX_LIST_COUNT, NULL,
BUS_DMA_NOWAIT);
if (error != 0) {
printf("%s: could not load tx ring DMA map\n",
@@ -608,11 +609,11 @@ rtwn_alloc_tx_list(struct rtwn_softc *sc
}
for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
- struct r92c_tx_desc *desc = &tx_ring->desc[i];
+ struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
/* setup tx desc */
desc->nextdescaddr = htole32(tx_ring->map->dm_segs[0].ds_addr
- + sizeof(struct r92c_tx_desc)
+ + sizeof(struct r92c_tx_desc_pci)
* ((i + 1) % RTWN_TX_LIST_COUNT));
tx_data = &tx_ring->tx_data[i];
@@ -640,7 +641,7 @@ rtwn_reset_tx_list(struct rtwn_softc *sc
int i;
for (i = 0; i < RTWN_TX_LIST_COUNT; i++) {
- struct r92c_tx_desc *desc = &tx_ring->desc[i];
+ struct r92c_tx_desc_pci *desc = &tx_ring->desc[i];
struct rtwn_tx_data *tx_data = &tx_ring->tx_data[i];
memset(desc, 0, sizeof(*desc) -
@@ -675,7 +676,8 @@ rtwn_free_tx_list(struct rtwn_softc *sc,
if (tx_ring->desc != NULL) {
bus_dmamap_unload(sc->sc_dmat, tx_ring->map);
bus_dmamem_unmap(sc->sc_dmat, (caddr_t)tx_ring->desc,
- sizeof (struct r92c_tx_desc) * RTWN_TX_LIST_COUNT);
+ sizeof (struct r92c_tx_desc_pci) *
+ RTWN_TX_LIST_COUNT);
bus_dmamem_free(sc->sc_dmat, &tx_ring->seg,
tx_ring->nsegs);
}
bus_dmamap_destroy(sc->sc_dmat, tx_ring->map);
@@ -1475,7 +1477,7 @@ rtwn_get_rssi(struct rtwn_softc *sc, int
}
void
-rtwn_rx_frame(struct rtwn_softc *sc, struct r92c_rx_desc *rx_desc,
+rtwn_rx_frame(struct rtwn_softc *sc, struct r92c_rx_desc_pci *rx_desc,
struct rtwn_rx_data *rx_data, int desc_idx)
{
struct ieee80211com *ic = &sc->sc_ic;
@@ -1626,7 +1628,7 @@ rtwn_tx(struct rtwn_softc *sc, struct mb
struct ieee80211_key *k = NULL;
struct rtwn_tx_ring *tx_ring;
struct rtwn_tx_data *data;
- struct r92c_tx_desc *txd;
+ struct r92c_tx_desc_pci *txd;
uint16_t qos;
uint8_t raid, type, tid, qid;
int hasqos, error;
@@ -1816,7 +1818,7 @@ rtwn_tx_done(struct rtwn_softc *sc, int
struct ifnet *ifp = &ic->ic_if;
struct rtwn_tx_ring *tx_ring = &sc->tx_ring[qid];
struct rtwn_tx_data *tx_data;
- struct r92c_tx_desc *tx_desc;
+ struct r92c_tx_desc_pci *tx_desc;
int i;
bus_dmamap_sync(sc->sc_dmat, tx_ring->map, 0, MCLBYTES,
@@ -3522,11 +3524,11 @@ rtwn_intr(void *xsc)
/* Vendor driver treats RX errors like ROK... */
if (status & (R92C_IMR_ROK | R92C_IMR_RXFOVW | R92C_IMR_RDU)) {
bus_dmamap_sync(sc->sc_dmat, sc->rx_ring.map, 0,
- sizeof(struct r92c_rx_desc) * RTWN_RX_LIST_COUNT,
+ sizeof(struct r92c_rx_desc_pci) * RTWN_RX_LIST_COUNT,
BUS_DMASYNC_POSTREAD);
for (i = 0; i < RTWN_RX_LIST_COUNT; i++) {
- struct r92c_rx_desc *rx_desc = &sc->rx_ring.desc[i];
+ struct r92c_rx_desc_pci *rx_desc = &sc->rx_ring.desc[i];
struct rtwn_rx_data *rx_data = &sc->rx_ring.rx_data[i];
if (letoh32(rx_desc->rxdw0) & R92C_RXDW0_OWN)
Index: pci/if_rtwnreg.h
===================================================================
RCS file: /cvs/src/sys/dev/pci/if_rtwnreg.h,v
retrieving revision 1.4
diff -u -p -r1.4 if_rtwnreg.h
--- pci/if_rtwnreg.h 7 Mar 2016 16:17:36 -0000 1.4
+++ pci/if_rtwnreg.h 7 Mar 2016 17:15:18 -0000
@@ -29,128 +29,6 @@
#define R92C_H2C_NBOX 4
-/* Rx MAC descriptor. */
-struct r92c_rx_desc {
- uint32_t rxdw0;
-#define R92C_RXDW0_PKTLEN_M 0x00003fff
-#define R92C_RXDW0_PKTLEN_S 0
-#define R92C_RXDW0_CRCERR 0x00004000
-#define R92C_RXDW0_ICVERR 0x00008000
-#define R92C_RXDW0_INFOSZ_M 0x000f0000
-#define R92C_RXDW0_INFOSZ_S 16
-#define R92C_RXDW0_QOS 0x00800000
-#define R92C_RXDW0_SHIFT_M 0x03000000
-#define R92C_RXDW0_SHIFT_S 24
-#define R92C_RXDW0_PHYST 0x04000000
-#define R92C_RXDW0_DECRYPTED 0x08000000
-#define R92C_RXDW0_LS 0x10000000
-#define R92C_RXDW0_FS 0x20000000
-#define R92C_RXDW0_EOR 0x40000000
-#define R92C_RXDW0_OWN 0x80000000
-
- uint32_t rxdw1;
- uint32_t rxdw2;
-#define R92C_RXDW2_PKTCNT_M 0x00ff0000
-#define R92C_RXDW2_PKTCNT_S 16
-
- uint32_t rxdw3;
-#define R92C_RXDW3_RATE_M 0x0000003f
-#define R92C_RXDW3_RATE_S 0
-#define R92C_RXDW3_HT 0x00000040
-#define R92C_RXDW3_HTC 0x00000400
-
- uint32_t rxdw4;
- uint32_t rxdw5;
-
- uint32_t rxbufaddr;
- uint32_t rxbufaddr64;
-} __packed __attribute__((aligned(4)));
-
-/* Tx MAC descriptor. */
-struct r92c_tx_desc {
- uint32_t txdw0;
-#define R92C_TXDW0_PKTLEN_M 0x0000ffff
-#define R92C_TXDW0_PKTLEN_S 0
-#define R92C_TXDW0_OFFSET_M 0x00ff0000
-#define R92C_TXDW0_OFFSET_S 16
-#define R92C_TXDW0_BMCAST 0x01000000
-#define R92C_TXDW0_LSG 0x04000000
-#define R92C_TXDW0_FSG 0x08000000
-#define R92C_TXDW0_OWN 0x80000000
-
- uint32_t txdw1;
-#define R92C_TXDW1_MACID_M 0x0000001f
-#define R92C_TXDW1_MACID_S 0
-#define R92C_TXDW1_AGGEN 0x00000020
-#define R92C_TXDW1_AGGBK 0x00000040
-#define R92C_TXDW1_QSEL_M 0x00001f00
-#define R92C_TXDW1_QSEL_S 8
-#define R92C_TXDW1_QSEL_BE 0x00
-#define R92C_TXDW1_QSEL_BK 0x02
-#define R92C_TXDW1_QSEL_VI 0x05
-#define R92C_TXDW1_QSEL_VO 0x07
-#define R92C_TXDW1_QSEL_BEACON 0x10
-#define R92C_TXDW1_QSEL_HIGH 0x11
-#define R92C_TXDW1_QSEL_MGNT 0x12
-#define R92C_TXDW1_QSEL_CMD 0x13
-#define R92C_TXDW1_RAID_M 0x000f0000
-#define R92C_TXDW1_RAID_S 16
-#define R92C_TXDW1_CIPHER_M 0x00c00000
-#define R92C_TXDW1_CIPHER_S 22
-#define R92C_TXDW1_CIPHER_NONE 0
-#define R92C_TXDW1_CIPHER_RC4 1
-#define R92C_TXDW1_CIPHER_AES 3
-#define R92C_TXDW1_PKTOFF_M 0x7c000000
-#define R92C_TXDW1_PKTOFF_S 26
-
- uint32_t txdw2;
- uint16_t txdw3;
- uint16_t txdseq;
-
- uint32_t txdw4;
-#define R92C_TXDW4_RTSRATE_M 0x0000003f
-#define R92C_TXDW4_RTSRATE_S 0
-#define R92C_TXDW4_QOS 0x00000040
-#define R92C_TXDW4_HWSEQ 0x00000080
-#define R92C_TXDW4_DRVRATE 0x00000100
-#define R92C_TXDW4_CTS2SELF 0x00000800
-#define R92C_TXDW4_RTSEN 0x00001000
-#define R92C_TXDW4_HWRTSEN 0x00002000
-#define R92C_TXDW4_SCO_M 0x003f0000
-#define R92C_TXDW4_SCO_S 20
-#define R92C_TXDW4_SCO_SCA 1
-#define R92C_TXDW4_SCO_SCB 2
-#define R92C_TXDW4_40MHZ 0x02000000
-
- uint32_t txdw5;
-#define R92C_TXDW5_DATARATE_M 0x0000003f
-#define R92C_TXDW5_DATARATE_S 0
-#define R92C_TXDW5_SGI 0x00000040
-#define R92C_TXDW5_DATARATE_FBLIMIT_M 0x00001f00
-#define R92C_TXDW5_DATARATE_FBLIMIT_S 8
-#define R92C_TXDW5_RTSRATE_FBLIMIT_M 0x0001e000
-#define R92C_TXDW5_RTSRATE_FBLIMIT_S 13
-#define R92C_TXDW5_RETRY_LIMIT_ENABLE 0x00020000
-#define R92C_TXDW5_DATA_RETRY_LIMIT_M 0x00fc0000
-#define R92C_TXDW5_DATA_RETRY_LIMIT_S 18
-#define R92C_TXDW5_AGGNUM_M 0xff000000
-#define R92C_TXDW5_AGGNUM_S 24
-
- uint32_t txdw6;
-
- uint16_t txbufsize;
- uint16_t pad;
-
- uint32_t txbufaddr;
- uint32_t txbufaddr64;
-
- uint32_t nextdescaddr;
- uint32_t nextdescaddr64;
-
- uint32_t reserved[4];
-} __packed __attribute__((aligned(4)));
-
-
/*
* Driver definitions.
*/
@@ -174,7 +52,7 @@ struct r92c_tx_desc {
#define RTWN_RX_QUEUE 0
#define RTWN_RXBUFSZ (16 * 1024)
-#define RTWN_TXBUFSZ (sizeof(struct r92c_tx_desc) + IEEE80211_MAX_LEN)
+#define RTWN_TXBUFSZ (sizeof(struct r92c_tx_desc_pci) + IEEE80211_MAX_LEN)
#define RTWN_RIDX_COUNT 28
@@ -217,7 +95,7 @@ struct rtwn_rx_data {
};
struct rtwn_rx_ring {
- struct r92c_rx_desc *desc;
+ struct r92c_rx_desc_pci *desc;
bus_dmamap_t map;
bus_dma_segment_t seg;
int nsegs;
@@ -234,7 +112,7 @@ struct rtwn_tx_ring {
bus_dmamap_t map;
bus_dma_segment_t seg;
int nsegs;
- struct r92c_tx_desc *desc;
+ struct r92c_tx_desc_pci *desc;
struct rtwn_tx_data tx_data[RTWN_TX_LIST_COUNT];
int queued;
int cur;
Index: usb/if_urtwn.c
===================================================================
RCS file: /cvs/src/sys/dev/usb/if_urtwn.c,v
retrieving revision 1.59
diff -u -p -r1.59 if_urtwn.c
--- usb/if_urtwn.c 7 Mar 2016 16:17:36 -0000 1.59
+++ usb/if_urtwn.c 7 Mar 2016 17:17:16 -0000
@@ -1746,16 +1746,16 @@ urtwn_rx_frame(struct urtwn_softc *sc, u
struct ieee80211_rxinfo rxi;
struct ieee80211_frame *wh;
struct ieee80211_node *ni;
- struct r92c_rx_stat *stat;
+ struct r92c_rx_desc_usb *rxd;
uint32_t rxdw0, rxdw3;
struct mbuf *m;
uint8_t rate;
int8_t rssi = 0;
int s, infosz;
- stat = (struct r92c_rx_stat *)buf;
- rxdw0 = letoh32(stat->rxdw0);
- rxdw3 = letoh32(stat->rxdw3);
+ rxd = (struct r92c_rx_desc_usb *)buf;
+ rxdw0 = letoh32(rxd->rxdw0);
+ rxdw3 = letoh32(rxd->rxdw3);
if (__predict_false(rxdw0 & (R92C_RXDW0_CRCERR | R92C_RXDW0_ICVERR))) {
/*
@@ -1776,9 +1776,9 @@ urtwn_rx_frame(struct urtwn_softc *sc, u
/* Get RSSI from PHY status descriptor if present. */
if (infosz != 0 && (rxdw0 & R92C_RXDW0_PHYST)) {
if (sc->chip & URTWN_CHIP_88E)
- rssi = urtwn_r88e_get_rssi(sc, rate, &stat[1]);
+ rssi = urtwn_r88e_get_rssi(sc, rate, &rxd[1]);
else
- rssi = urtwn_get_rssi(sc, rate, &stat[1]);
+ rssi = urtwn_get_rssi(sc, rate, &rxd[1]);
/* Update our average RSSI. */
urtwn_update_avgrssi(sc, rate, rssi);
}
@@ -1800,7 +1800,7 @@ urtwn_rx_frame(struct urtwn_softc *sc, u
}
}
/* Finalize mbuf. */
- wh = (struct ieee80211_frame *)((uint8_t *)&stat[1] + infosz);
+ wh = (struct ieee80211_frame *)((uint8_t *)&rxd[1] + infosz);
memcpy(mtod(m, uint8_t *), wh, pktlen);
m->m_pkthdr.len = m->m_len = pktlen;
@@ -1864,7 +1864,7 @@ urtwn_rxeof(struct usbd_xfer *xfer, void
{
struct urtwn_rx_data *data = priv;
struct urtwn_softc *sc = data->sc;
- struct r92c_rx_stat *stat;
+ struct r92c_rx_desc_usb *rxd;
uint32_t rxdw0;
uint8_t *buf;
int len, totlen, pktlen, infosz, npkts;
@@ -1879,23 +1879,23 @@ urtwn_rxeof(struct usbd_xfer *xfer, void
}
usbd_get_xfer_status(xfer, NULL, NULL, &len, NULL);
- if (__predict_false(len < sizeof(*stat))) {
+ if (__predict_false(len < sizeof(*rxd))) {
DPRINTF(("xfer too short %d\n", len));
goto resubmit;
}
buf = data->buf;
/* Get the number of encapsulated frames. */
- stat = (struct r92c_rx_stat *)buf;
- npkts = MS(letoh32(stat->rxdw2), R92C_RXDW2_PKTCNT);
+ rxd = (struct r92c_rx_desc_usb *)buf;
+ npkts = MS(letoh32(rxd->rxdw2), R92C_RXDW2_PKTCNT);
DPRINTFN(6, ("Rx %d frames in one chunk\n", npkts));
/* Process all of them. */
while (npkts-- > 0) {
- if (__predict_false(len < sizeof(*stat)))
+ if (__predict_false(len < sizeof(*rxd)))
break;
- stat = (struct r92c_rx_stat *)buf;
- rxdw0 = letoh32(stat->rxdw0);
+ rxd = (struct r92c_rx_desc_usb *)buf;
+ rxdw0 = letoh32(rxd->rxdw0);
pktlen = MS(rxdw0, R92C_RXDW0_PKTLEN);
if (__predict_false(pktlen == 0))
@@ -1904,7 +1904,7 @@ urtwn_rxeof(struct usbd_xfer *xfer, void
infosz = MS(rxdw0, R92C_RXDW0_INFOSZ) * 8;
/* Make sure everything fits in xfer. */
- totlen = sizeof(*stat) + infosz + pktlen;
+ totlen = sizeof(*rxd) + infosz + pktlen;
if (__predict_false(totlen > len))
break;
@@ -1963,7 +1963,7 @@ urtwn_tx(struct urtwn_softc *sc, struct
struct ieee80211_frame *wh;
struct ieee80211_key *k = NULL;
struct urtwn_tx_data *data;
- struct r92c_tx_desc *txd;
+ struct r92c_tx_desc_usb *txd;
struct usbd_pipe *pipe;
uint16_t qos, sum;
uint8_t raid, type, tid, qid;
@@ -1997,7 +1997,7 @@ urtwn_tx(struct urtwn_softc *sc, struct
TAILQ_REMOVE(&sc->tx_free_list, data, next);
/* Fill Tx descriptor. */
- txd = (struct r92c_tx_desc *)data->buf;
+ txd = (struct r92c_tx_desc_usb *)data->buf;
memset(txd, 0, sizeof(*txd));
txd->txdw0 |= htole32(
Index: usb/if_urtwnreg.h
===================================================================
RCS file: /cvs/src/sys/dev/usb/if_urtwnreg.h,v
retrieving revision 1.8
diff -u -p -r1.8 if_urtwnreg.h
--- usb/if_urtwnreg.h 7 Mar 2016 16:17:36 -0000 1.8
+++ usb/if_urtwnreg.h 7 Mar 2016 17:17:34 -0000
@@ -34,103 +34,6 @@
/* USB Requests. */
#define R92C_REQ_REGS 0x05
-/* Rx MAC descriptor. */
-struct r92c_rx_stat {
- uint32_t rxdw0;
-#define R92C_RXDW0_PKTLEN_M 0x00003fff
-#define R92C_RXDW0_PKTLEN_S 0
-#define R92C_RXDW0_CRCERR 0x00004000
-#define R92C_RXDW0_ICVERR 0x00008000
-#define R92C_RXDW0_INFOSZ_M 0x000f0000
-#define R92C_RXDW0_INFOSZ_S 16
-#define R92C_RXDW0_QOS 0x00800000
-#define R92C_RXDW0_SHIFT_M 0x03000000
-#define R92C_RXDW0_SHIFT_S 24
-#define R92C_RXDW0_PHYST 0x04000000
-#define R92C_RXDW0_DECRYPTED 0x08000000
-
- uint32_t rxdw1;
- uint32_t rxdw2;
-#define R92C_RXDW2_PKTCNT_M 0x00ff0000
-#define R92C_RXDW2_PKTCNT_S 16
-
- uint32_t rxdw3;
-#define R92C_RXDW3_RATE_M 0x0000003f
-#define R92C_RXDW3_RATE_S 0
-#define R92C_RXDW3_HT 0x00000040
-#define R92C_RXDW3_HTC 0x00000400
-
- uint32_t rxdw4;
- uint32_t rxdw5;
-} __packed __attribute__((aligned(4)));
-
-/* Tx MAC descriptor. */
-struct r92c_tx_desc {
- uint32_t txdw0;
-#define R92C_TXDW0_PKTLEN_M 0x0000ffff
-#define R92C_TXDW0_PKTLEN_S 0
-#define R92C_TXDW0_OFFSET_M 0x00ff0000
-#define R92C_TXDW0_OFFSET_S 16
-#define R92C_TXDW0_BMCAST 0x01000000
-#define R92C_TXDW0_LSG 0x04000000
-#define R92C_TXDW0_FSG 0x08000000
-#define R92C_TXDW0_OWN 0x80000000
-
- uint32_t txdw1;
-#define R92C_TXDW1_MACID_M 0x0000001f
-#define R92C_TXDW1_MACID_S 0
-#define R88E_TXDW1_MACID_M 0x0000003f
-#define R88E_TXDW1_MACID_S 0
-#define R92C_TXDW1_AGGEN 0x00000020
-#define R92C_TXDW1_AGGBK 0x00000040
-#define R92C_TXDW1_QSEL_M 0x00001f00
-#define R92C_TXDW1_QSEL_S 8
-#define R92C_TXDW1_QSEL_BE 0x00
-#define R92C_TXDW1_QSEL_MGNT 0x12
-#define R92C_TXDW1_RAID_M 0x000f0000
-#define R92C_TXDW1_RAID_S 16
-#define R92C_TXDW1_CIPHER_M 0x00c00000
-#define R92C_TXDW1_CIPHER_S 22
-#define R92C_TXDW1_CIPHER_NONE 0
-#define R92C_TXDW1_CIPHER_RC4 1
-#define R92C_TXDW1_CIPHER_AES 3
-#define R92C_TXDW1_PKTOFF_M 0x7c000000
-#define R92C_TXDW1_PKTOFF_S 26
-
- uint32_t txdw2;
-#define R88E_TXDW2_AGGBK 0x00010000
-
- uint16_t txdw3;
- uint16_t txdseq;
-
- uint32_t txdw4;
-#define R92C_TXDW4_RTSRATE_M 0x0000003f
-#define R92C_TXDW4_RTSRATE_S 0
-#define R92C_TXDW4_QOS 0x00000040
-#define R92C_TXDW4_HWSEQ 0x00000080
-#define R92C_TXDW4_DRVRATE 0x00000100
-#define R92C_TXDW4_CTS2SELF 0x00000800
-#define R92C_TXDW4_RTSEN 0x00001000
-#define R92C_TXDW4_HWRTSEN 0x00002000
-#define R92C_TXDW4_SCO_M 0x003f0000
-#define R92C_TXDW4_SCO_S 20
-#define R92C_TXDW4_SCO_SCA 1
-#define R92C_TXDW4_SCO_SCB 2
-#define R92C_TXDW4_40MHZ 0x02000000
-
- uint32_t txdw5;
-#define R92C_TXDW5_DATARATE_M 0x0000003f
-#define R92C_TXDW5_DATARATE_S 0
-#define R92C_TXDW5_SGI 0x00000040
-#define R92C_TXDW5_AGGNUM_M 0xff000000
-#define R92C_TXDW5_AGGNUM_S 24
-
- uint32_t txdw6;
- uint16_t txdsum;
- uint16_t pad;
-} __packed __attribute__((aligned(4)));
-
-
/*
* Driver definitions.
*/
@@ -139,7 +42,7 @@ struct r92c_tx_desc {
#define URTWN_HOST_CMD_RING_COUNT 32
#define URTWN_RXBUFSZ (16 * 1024)
-#define URTWN_TXBUFSZ (sizeof(struct r92c_tx_desc) + IEEE80211_MAX_LEN)
+#define URTWN_TXBUFSZ (sizeof(struct r92c_tx_desc_usb) + IEEE80211_MAX_LEN)
#define URTWN_RIDX_COUNT 28
