Re: pci_sdhc: Intel eMMC controller fix
On 11/20/19, Patrick Wildt wrote: > > A bit late, but committed, thanks! By the way, now that we > have your glkgpio(4), does that make the SD controller work? > > Patrick > Thanks. The SD slot does not work yet. Needs ACPI gpio bits in pci frontend for card detect.
Re: pci_sdhc: Intel eMMC controller fix
On Fri, Mar 29, 2019 at 05:22:13AM -0400, James Hastings wrote: > Index: dev/pci/pcidevs > === > RCS file: /cvs/src/sys/dev/pci/pcidevs,v > retrieving revision 1.1881 > diff -u -p -r1.1881 pcidevs > --- dev/pci/pcidevs 20 Mar 2019 10:51:25 - 1.1881 > +++ dev/pci/pcidevs 29 Mar 2019 07:57:20 - > @@ -4467,6 +4467,7 @@ product INTEL WL_3165_1 0x3165 Dual Ban > product INTEL WL_3165_2 0x3166 Dual Band Wireless AC 3165 > product INTEL GLK_UHD_6050x3184 UHD Graphics 605 > product INTEL GLK_UHD_6000x3185 UHD Graphics 600 > +product INTEL GLK_EMMC 0x31cc Gemini Lake eMMC > product INTEL 31244 0x3200 31244 SATA > product INTEL 82855PM_HB 0x3340 82855PM Host > product INTEL 82855PM_AGP0x3341 82855PM AGP > Index: dev/pci/sdhc_pci.c > === > RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v > retrieving revision 1.20 > diff -u -p -r1.20 sdhc_pci.c > --- dev/pci/sdhc_pci.c30 Apr 2016 11:32:23 - 1.20 > +++ dev/pci/sdhc_pci.c29 Mar 2019 07:57:20 - > @@ -127,6 +127,12 @@ sdhc_pci_attach(struct device *parent, s > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) > sc->sc.sc_flags |= SDHC_F_NOPWR0; > > + /* Some Intel controllers break if set to 0V bus power. */ > + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL && > + (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC || > + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC)) > + sc->sc.sc_flags |= SDHC_F_NOPWR0; > + > /* Some RICOH controllers need to be bumped into the right mode. */ > if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && > (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 || > A bit late, but committed, thanks! By the way, now that we have your glkgpio(4), does that make the SD controller work? Patrick
Re: pci_sdhc: Intel eMMC controller fix
On 03/29/2019 05:22 AM, James Hastings wrote: > Index: dev/pci/pcidevs > === > RCS file: /cvs/src/sys/dev/pci/pcidevs,v > retrieving revision 1.1881 > diff -u -p -r1.1881 pcidevs > --- dev/pci/pcidevs 20 Mar 2019 10:51:25 - 1.1881 > +++ dev/pci/pcidevs 29 Mar 2019 07:57:20 - > @@ -4467,6 +4467,7 @@ product INTEL WL_3165_1 0x3165 Dual Ban > product INTEL WL_3165_2 0x3166 Dual Band Wireless AC 3165 > product INTEL GLK_UHD_6050x3184 UHD Graphics 605 > product INTEL GLK_UHD_6000x3185 UHD Graphics 600 > +product INTEL GLK_EMMC 0x31cc Gemini Lake eMMC > product INTEL 31244 0x3200 31244 SATA > product INTEL 82855PM_HB 0x3340 82855PM Host > product INTEL 82855PM_AGP0x3341 82855PM AGP > Index: dev/pci/sdhc_pci.c > === > RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v > retrieving revision 1.20 > diff -u -p -r1.20 sdhc_pci.c > --- dev/pci/sdhc_pci.c30 Apr 2016 11:32:23 - 1.20 > +++ dev/pci/sdhc_pci.c29 Mar 2019 07:57:20 - > @@ -127,6 +127,12 @@ sdhc_pci_attach(struct device *parent, s > PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) > sc->sc.sc_flags |= SDHC_F_NOPWR0; > > + /* Some Intel controllers break if set to 0V bus power. */ > + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL && > + (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC || > + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC)) > + sc->sc.sc_flags |= SDHC_F_NOPWR0; > + > /* Some RICOH controllers need to be bumped into the right mode. */ > if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && > (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 || > My apologies @tech, last dmesg was subtly mangled. Once more with card in slot, patch and sdmmcdebug=1 I believe the SD controller depends on GPIO support; for which there is no driver on this system. However eMMC is working well. dmesg: OpenBSD 6.5 (GENERIC.MP) #4: Tue Apr 9 19:56:22 EDT 2019 r...@sandisk.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 451104 (3920MB) avail mem = 3976933376 (3792MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 3.0 @ 0x78758000 (23 entries) bios0: vendor Insyde Corp. version "V1.07" date 04/13/2018 bios0: Acer Spin SP111-32N acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP MSDM UEFI SSDT DBG2 LPIT MCFG PRAM SSDT SSDT SSDT SSDT DMAR BDAT TPM2 HPET NPKT SSDT SSDT FPDT UEFI DBGP WSMT SSDT SSDT SSDT APIC WDAT BGRT NHLT acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) XHC_(S3) XDCI(S4) HDAS(S3) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimcfg0 at acpi0 acpimcfg0: addr 0xe000, bus 0-63 acpihpet0 at acpi0: 1920 Hz acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4580.15 MHz, 06-5c-09 cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu0: 1MB 64b/line 16-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 80MHz cpu0: mwait min=64, max=64, C-substates=0.2.0.2.4.2.1.1, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4585.18 MHz, 06-5c-09 cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu1: 1MB 64b/line 16-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4586.01 MHz, 06-5c-09 cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu2: 1MB 64b/line 16-way L2 cache cpu2: smt 0,
Re: pci_sdhc: Intel eMMC controller fix
Index: dev/pci/pcidevs === RCS file: /cvs/src/sys/dev/pci/pcidevs,v retrieving revision 1.1881 diff -u -p -r1.1881 pcidevs --- dev/pci/pcidevs 20 Mar 2019 10:51:25 - 1.1881 +++ dev/pci/pcidevs 29 Mar 2019 07:57:20 - @@ -4467,6 +4467,7 @@ product INTEL WL_3165_1 0x3165 Dual Ban product INTEL WL_3165_20x3166 Dual Band Wireless AC 3165 product INTEL GLK_UHD_605 0x3184 UHD Graphics 605 product INTEL GLK_UHD_600 0x3185 UHD Graphics 600 +product INTEL GLK_EMMC 0x31cc Gemini Lake eMMC product INTEL 312440x3200 31244 SATA product INTEL 82855PM_HB 0x3340 82855PM Host product INTEL 82855PM_AGP 0x3341 82855PM AGP Index: dev/pci/sdhc_pci.c === RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v retrieving revision 1.20 diff -u -p -r1.20 sdhc_pci.c --- dev/pci/sdhc_pci.c 30 Apr 2016 11:32:23 - 1.20 +++ dev/pci/sdhc_pci.c 29 Mar 2019 07:57:20 - @@ -127,6 +127,12 @@ sdhc_pci_attach(struct device *parent, s PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Some Intel controllers break if set to 0V bus power. */ + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL && + (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_APOLLOLAKE_EMMC || + PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_GLK_EMMC)) + sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Some RICOH controllers need to be bumped into the right mode. */ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 ||
Re: pci_sdhc: Intel eMMC controller fix
On 3/26/19, Mark Kettenis wrote: > Did you test this with SD-cards in slots as well as with eMMC? > Tried again with Samsung 16GB card in slot plus NOPWR0 patch and sdmmcdebug=1 eMMC works, SD slot does not work. Also tested with combinations of existing sdhc flags NODDR50, NOPWR0 or none. sdmmc0: can't send memory OCR sdmmc0: can't enable card I do not know how to fix SD/MMC slot right now. Will send patch for eMMC device ids instead of matching only intel vendor id. In the meantime I hope this debug level helps. dmesg: OpenBSD 6.5-beta (GENERIC.MP) #0: Thu Mar 28 22:05:35 EDT 2019 r...@sandisk.my.domain:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 451104 (3920MB) avail mem = 3976196096 (3791MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 3.0 @ 0x78758000 (23 entries) bios0: vendor Insyde Corp. version "V1.07" date 04/13/2018 bios0: Acer Spin SP111-32N acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP MSDM UEFI SSDT DBG2 LPIT MCFG PRAM SSDT SSDT SSDT SSDT DMAR BDAT TPM2 HPET NPKT SSDT SSDT FPDT UEFI DBGP WSMT SSDT SSDT SSDT APIC WDAT BGRT NHLT acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) XHC_(S3) XDCI(S4) HDAS(S3) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimcfg0 at acpi0 acpimcfg0: addr 0xe000, bus 0-63 acpihpet0 at acpi0: 1920 Hz acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4582.18 MHz, 06-5c-09 cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu0: 1MB 64b/line 16-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 80MHz cpu0: mwait min=64, max=64, C-substates=0.2.0.2.4.2.1.1, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu1: 1MB 64b/line 16-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu2: 1MB 64b/line 16-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4583.71 MHz, 06-5c-09 cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu3: 1MB 64b/line 16-way L2 cache cpu3: smt 0, core 3, package 0 ioapic0 at mainbus0: apid 1 pa 0xfec0, version 20, 120 pins acpiprt0 at acpi0: bus 0 (PCI0) acpiprt1 at acpi0: bus -1 (RP01) acpiprt2 at acpi0: bus 1 (RP02) acpiprt3 at acpi0: bus -1 (RP03) acpiprt4 at acpi0: bus -1 (RP04) acpiprt5 at acpi0: bus -1 (RP05) acpiprt6 at acpi0: bus -1 (RP06) acpiec0 at acpi0 acpi0: GPE 0x2c already enabled acpicpu0 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu1 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu2 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpicpu3 at acpi0: C3(10@150 mwait.1@0x60), C2(10@50 mwait.1@0x21), C1(1000@1 mwait.1@0x1), PSS acpipwrres0 at acpi0: FN00 acpitz0 at acpi0: critical temperature is 100 degC acpipci0 at acpi0 PCI0: 0x 0x0011 0x0001 acpiac0 at acpi0: AC unit online acpibat0 at acpi0: BAT0 model "AP16L5J" serial type LION oem
Re: pci_sdhc: Intel eMMC controller fix
Did you test this with SD-cards in slots as well as with eMMC?
pci_sdhc: Intel eMMC controller fix
On Intel Apollo Lake and Gemini Lake systems with pci eMMC sdhc controller I encounter: sdhc1 at pci0 dev 28 function 0 "Intel Apollo Lake eMMC" rev 0x0b: apic 1 int 39 sdhc1: SDHC 3.0, 200 MHz base clock sdmmc1 at sdhc1: 8-bit, sd high-speed, mmc high-speed, dma ... sdmmc1: can't enable card The following patch restores normal sdmmc access. scsibus2 at sdmmc1: 2 targets, initiator 0 sd0 at scsibus2 targ 1 lun 0: SCSI2 0/direct removable sd0: 59640MB, 512 bytes/sector, 122142720 sectors I have tested on various HP and Acer laptops with success. Bay Trail and Braswell systems are not affected, their eMMC controller attaches to acpi and works properly. Index: dev/pci/sdhc_pci.c === RCS file: /cvs/src/sys/dev/pci/sdhc_pci.c,v retrieving revision 1.20 diff -u -p -r1.20 sdhc_pci.c --- dev/pci/sdhc_pci.c 30 Apr 2016 11:32:23 - 1.20 +++ dev/pci/sdhc_pci.c 20 Mar 2019 05:47:13 - @@ -127,6 +127,10 @@ sdhc_pci_attach(struct device *parent, s PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ENE_SDCARD) sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Intel eMMC controllers break if set to 0V bus power. */ + if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_INTEL) + sc->sc.sc_flags |= SDHC_F_NOPWR0; + /* Some RICOH controllers need to be bumped into the right mode. */ if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RICOH && (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RICOH_R5U822 || OpenBSD 6.5-beta (GENERIC.MP) #799: Sat Mar 16 22:33:35 MDT 2019 dera...@amd64.openbsd.org:/usr/src/sys/arch/amd64/compile/GENERIC.MP real mem = 451104 (3920MB) avail mem = 3976237056 (3792MB) mpath0 at root scsibus0 at mpath0: 256 targets mainbus0 at root bios0 at mainbus0: SMBIOS rev. 3.0 @ 0x78758000 (23 entries) bios0: vendor Insyde Corp. version "V1.07" date 04/13/2018 bios0: Acer Spin SP111-32N acpi0 at bios0: rev 2 acpi0: sleep states S0 S3 S4 S5 acpi0: tables DSDT FACP MSDM UEFI SSDT DBG2 LPIT MCFG PRAM SSDT SSDT SSDT SSDT DMAR BDAT TPM2 HPET NPKT SSDT SSDT FPDT UEFI DBGP WSMT SSDT SSDT SSDT APIC WDAT BGRT NHLT acpi0: wakeup devices PXSX(S4) RP01(S4) PXSX(S4) RP02(S4) PXSX(S4) RP03(S4) PXSX(S4) RP04(S4) PXSX(S4) RP05(S4) PXSX(S4) RP06(S4) XHC_(S3) XDCI(S4) HDAS(S3) acpitimer0 at acpi0: 3579545 Hz, 24 bits acpimcfg0 at acpi0 acpimcfg0: addr 0xe000, bus 0-63 acpihpet0 at acpi0: 1920 Hz acpimadt0 at acpi0 addr 0xfee0: PC-AT compat cpu0 at mainbus0: apid 0 (boot processor) cpu0: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4590.51 MHz, 06-5c-09 cpu0: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu0: 1MB 64b/line 16-way L2 cache cpu0: smt 0, core 0, package 0 mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges cpu0: apic clock running at 80MHz cpu0: mwait min=64, max=64, C-substates=0.2.0.2.4.2.1.1, IBE cpu1 at mainbus0: apid 2 (application processor) cpu1: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4591.67 MHz, 06-5c-09 cpu1: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu1: 1MB 64b/line 16-way L2 cache cpu1: smt 0, core 1, package 0 cpu2 at mainbus0: apid 4 (application processor) cpu2: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4591.67 MHz, 06-5c-09 cpu2: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu2: 1MB 64b/line 16-way L2 cache cpu2: smt 0, core 2, package 0 cpu3 at mainbus0: apid 6 (application processor) cpu3: Intel(R) Pentium(R) CPU N4200 @ 1.10GHz, 4591.67 MHz, 06-5c-09 cpu3: FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,CX16,xTPR,PDCM,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,3DNOWP,PERF,ITSC,FSGSBASE,SMEP,ERMS,MPX,RDSEED,SMAP,CLFLUSHOPT,PT,SHA,IBRS,IBPB,STIBP,SENSOR,ARAT,XSAVEOPT,XSAVEC,XGETBV1,XSAVES cpu3: 1MB 64b/line 16-way L2
