Alex Holst wrote:
> Quoting Mark Kettenis (mark.kette...@xs4all.nl):
> > An accurate description would be that the percentage is actually the
> > percentage of "DMA-reachable" physical memory the buffer cache may
> > use. The minimum percentage is 5% and the maximum is 90%.
> >
> > But documentin
Quoting Mark Kettenis (mark.kette...@xs4all.nl):
> An accurate description would be that the percentage is actually the
> percentage of "DMA-reachable" physical memory the buffer cache may
> use. The minimum percentage is 5% and the maximum is 90%.
>
> But documenting it like that needs an explan
> Date: Tue, 29 Jan 2019 12:07:48 +0100
> From: Alex Holst
>
> Quoting Mark Kettenis (mark.kette...@xs4all.nl):
> > >
> > > Hi. It turns out there is a hard cap which might be worth documenting.
> >
> > That isn't true.
>
> I'm just informed the buffer cache limit is an amd64, arm64 and 32-bit
Quoting Mark Kettenis (mark.kette...@xs4all.nl):
> >
> > Hi. It turns out there is a hard cap which might be worth documenting.
>
> That isn't true.
I'm just informed the buffer cache limit is an amd64, arm64 and 32-bit
archs thing.
sparc64 appears to have no such limit. Do you know the details
> Date: Tue, 29 Jan 2019 11:14:20 +0100
> From: Alex Holst
>
> Hi. It turns out there is a hard cap which might be worth documenting.
That isn't true.
> Index: lib/libc/sys/sysctl.2
> ===
> RCS file: /cvs/src/lib/libc/sys/sysctl.2,
Hi. It turns out there is a hard cap which might be worth documenting.
Index: lib/libc/sys/sysctl.2
===
RCS file: /cvs/src/lib/libc/sys/sysctl.2,v
retrieving revision 1.11
diff -u -p -r1.11 sysctl.2
--- lib/libc/sys/sysctl.2 30
