Some people have reported rendering issues with xpdf recently specific to recent changes in the xenocara tree.
Mesa was recently updated to 17.1.6. Here is a diff that adds the changes from 17.1.8-rc1 (which still identifies as 17.1.7). I am curious if it helps. The planned release schedule for the rest of the Mesa 17.1 branch is: 17.1.8 2017-08-28 17.1.9 2017-09-08 To test, apply the patch, rebuild xenocara and restart xorg so the updated dri driver is used. Index: lib/mesa/VERSION =================================================================== RCS file: /cvs/xenocara/lib/mesa/VERSION,v retrieving revision 1.1.1.9 diff -u -p -r1.1.1.9 VERSION --- lib/mesa/VERSION 14 Aug 2017 09:30:06 -0000 1.1.1.9 +++ lib/mesa/VERSION 26 Aug 2017 03:19:32 -0000 @@ -1 +1 @@ -17.1.6 +17.1.7 Index: lib/mesa/configure =================================================================== RCS file: /cvs/xenocara/lib/mesa/configure,v retrieving revision 1.12 diff -u -p -r1.12 configure --- lib/mesa/configure 14 Aug 2017 09:57:57 -0000 1.12 +++ lib/mesa/configure 26 Aug 2017 03:19:32 -0000 @@ -1,6 +1,6 @@ #! /bin/sh # Guess values for system-dependent variables and create Makefiles. -# Generated by GNU Autoconf 2.69 for Mesa 17.1.6. +# Generated by GNU Autoconf 2.69 for Mesa 17.1.7. # # Report bugs to <https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa>. # @@ -591,8 +591,8 @@ MAKEFLAGS= # Identity of this package. PACKAGE_NAME='Mesa' PACKAGE_TARNAME='mesa' -PACKAGE_VERSION='17.1.6' -PACKAGE_STRING='Mesa 17.1.6' +PACKAGE_VERSION='17.1.7' +PACKAGE_STRING='Mesa 17.1.7' PACKAGE_BUGREPORT='https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa' PACKAGE_URL='' @@ -1815,7 +1815,7 @@ if test "$ac_init_help" = "long"; then # Omit some internal or obsolete options to make the list less imposing. # This message is too long to be a string in the A/UX 3.1 sh. cat <<_ACEOF -\`configure' configures Mesa 17.1.6 to adapt to many kinds of systems. +\`configure' configures Mesa 17.1.7 to adapt to many kinds of systems. Usage: $0 [OPTION]... [VAR=VALUE]... @@ -1886,7 +1886,7 @@ fi if test -n "$ac_init_help"; then case $ac_init_help in - short | recursive ) echo "Configuration of Mesa 17.1.6:";; + short | recursive ) echo "Configuration of Mesa 17.1.7:";; esac cat <<\_ACEOF @@ -2224,7 +2224,7 @@ fi test -n "$ac_init_help" && exit $ac_status if $ac_init_version; then cat <<\_ACEOF -Mesa configure 17.1.6 +Mesa configure 17.1.7 generated by GNU Autoconf 2.69 Copyright (C) 2012 Free Software Foundation, Inc. @@ -2943,7 +2943,7 @@ cat >config.log <<_ACEOF This file contains any messages produced by compilers while running configure, to aid debugging if configure makes a mistake. -It was created by Mesa $as_me 17.1.6, which was +It was created by Mesa $as_me 17.1.7, which was generated by GNU Autoconf 2.69. Invocation command line was $ $0 $@ @@ -3879,7 +3879,7 @@ fi # Define the identity of the package. PACKAGE='mesa' - VERSION='17.1.6' + VERSION='17.1.7' cat >>confdefs.h <<_ACEOF @@ -28533,7 +28533,7 @@ cat >>$CONFIG_STATUS <<\_ACEOF || ac_wri # report actual input values of CONFIG_FILES etc. instead of their # values after options handling. ac_log=" -This file was extended by Mesa $as_me 17.1.6, which was +This file was extended by Mesa $as_me 17.1.7, which was generated by GNU Autoconf 2.69. Invocation command line was CONFIG_FILES = $CONFIG_FILES @@ -28590,7 +28590,7 @@ _ACEOF cat >>$CONFIG_STATUS <<_ACEOF || ac_write_fail=1 ac_cs_config="`$as_echo "$ac_configure_args" | sed 's/^ //; s/[\\""\`\$]/\\\\&/g'`" ac_cs_version="\\ -Mesa config.status 17.1.6 +Mesa config.status 17.1.7 configured by $0, generated by GNU Autoconf 2.69, with options \\"\$ac_cs_config\\" Index: lib/mesa/src/amd/common/ac_binary.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/common/ac_binary.c,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 ac_binary.c --- lib/mesa/src/amd/common/ac_binary.c 14 Aug 2017 09:41:47 -0000 1.1.1.2 +++ lib/mesa/src/amd/common/ac_binary.c 26 Aug 2017 03:19:32 -0000 @@ -109,7 +109,7 @@ static void parse_relocs(Elf *elf, Elf_D } } -void ac_elf_read(const char *elf_data, unsigned elf_size, +bool ac_elf_read(const char *elf_data, unsigned elf_size, struct ac_shader_binary *binary) { char *elf_buffer; @@ -118,6 +118,7 @@ void ac_elf_read(const char *elf_data, u Elf_Data *symbols = NULL, *relocs = NULL; size_t section_str_index; unsigned symbol_sh_link = 0; + bool success = true; /* One of the libelf implementations * (http://www.mr511.de/software/english.htm) requires calling @@ -137,7 +138,8 @@ void ac_elf_read(const char *elf_data, u GElf_Shdr section_header; if (gelf_getshdr(section, §ion_header) != §ion_header) { fprintf(stderr, "Failed to read ELF section header\n"); - return; + success = false; + break; } name = elf_strptr(elf, section_str_index, section_header.sh_name); if (!strcmp(name, ".text")) { @@ -148,6 +150,11 @@ void ac_elf_read(const char *elf_data, u } else if (!strcmp(name, ".AMDGPU.config")) { section_data = elf_getdata(section, section_data); binary->config_size = section_data->d_size; + if (!binary->config_size) { + fprintf(stderr, ".AMDGPU.config is empty!\n"); + success = false; + break; + } binary->config = MALLOC(binary->config_size * sizeof(unsigned char)); memcpy(binary->config, section_data->d_buf, binary->config_size); } else if (!strcmp(name, ".AMDGPU.disasm")) { @@ -186,6 +193,7 @@ void ac_elf_read(const char *elf_data, u binary->global_symbol_count = 1; binary->config_size_per_symbol = binary->config_size; } + return success; } const unsigned char *ac_shader_binary_config_start( Index: lib/mesa/src/amd/common/ac_binary.h =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/common/ac_binary.h,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 ac_binary.h --- lib/mesa/src/amd/common/ac_binary.h 14 Aug 2017 09:41:27 -0000 1.1.1.2 +++ lib/mesa/src/amd/common/ac_binary.h 26 Aug 2017 03:19:32 -0000 @@ -83,7 +83,7 @@ struct ac_shader_config { * Parse the elf binary stored in \p elf_data and create a * ac_shader_binary object. */ -void ac_elf_read(const char *elf_data, unsigned elf_size, +bool ac_elf_read(const char *elf_data, unsigned elf_size, struct ac_shader_binary *binary); /** Index: lib/mesa/src/amd/common/ac_nir_to_llvm.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/common/ac_nir_to_llvm.c,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 ac_nir_to_llvm.c --- lib/mesa/src/amd/common/ac_nir_to_llvm.c 14 Aug 2017 09:41:47 -0000 1.1.1.5 +++ lib/mesa/src/amd/common/ac_nir_to_llvm.c 26 Aug 2017 03:19:32 -0000 @@ -1135,7 +1135,17 @@ static LLVMValueRef emit_find_lsb(struct */ LLVMConstInt(ctx->i32, 1, false), }; - return ac_build_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, params, 2, AC_FUNC_ATTR_READNONE); + + LLVMValueRef lsb = ac_build_intrinsic(&ctx->ac, "llvm.cttz.i32", ctx->i32, + params, 2, + AC_FUNC_ATTR_READNONE); + + /* TODO: We need an intrinsic to skip this conditional. */ + /* Check for zero: */ + return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder, + LLVMIntEQ, src0, + ctx->i32zero, ""), + LLVMConstInt(ctx->i32, -1, 0), lsb, ""); } static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx, @@ -1239,7 +1249,6 @@ static LLVMValueRef emit_f2f16(struct ni src0 = to_float(ctx, src0); result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, ""); - /* TODO SI/CIK options here */ if (ctx->options->chip_class >= VI) { LLVMValueRef args[2]; /* Check if the result is a denormal - and flush to 0 if so. */ @@ -1253,7 +1262,22 @@ static LLVMValueRef emit_f2f16(struct ni if (ctx->options->chip_class >= VI) result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, ""); - + else { + /* for SI/CIK */ + /* 0x38800000 is smallest half float value (2^-14) in 32-bit float, + * so compare the result and flush to 0 if it's smaller. + */ + LLVMValueRef temp, cond2; + temp = emit_intrin_1f_param(&ctx->ac, "llvm.fabs", + ctx->f32, result); + cond = LLVMBuildFCmp(ctx->builder, LLVMRealUGT, + LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""), + temp, ""); + cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealUNE, + temp, ctx->f32zero, ""); + cond = LLVMBuildAnd(ctx->builder, cond, cond2, ""); + result = LLVMBuildSelect(ctx->builder, cond, ctx->f32zero, result, ""); + } return result; } Index: lib/mesa/src/amd/vulkan/radv_cmd_buffer.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/vulkan/radv_cmd_buffer.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 radv_cmd_buffer.c --- lib/mesa/src/amd/vulkan/radv_cmd_buffer.c 14 Aug 2017 09:41:58 -0000 1.1.1.4 +++ lib/mesa/src/amd/vulkan/radv_cmd_buffer.c 26 Aug 2017 03:19:32 -0000 @@ -1106,6 +1106,10 @@ radv_emit_framebuffer_state(struct radv_ const struct radv_subpass *subpass = cmd_buffer->state.subpass; int dst_resolve_micro_tile_mode = -1; + /* this may happen for inherited secondary recording */ + if (!framebuffer) + return; + if (subpass->has_resolve) { uint32_t a = subpass->resolve_attachments[0].attachment; const struct radv_image *image = framebuffer->attachments[a].attachment->image; @@ -2093,8 +2097,11 @@ VkResult radv_EndCommandBuffer( { RADV_FROM_HANDLE(radv_cmd_buffer, cmd_buffer, commandBuffer); - if (cmd_buffer->queue_family_index != RADV_QUEUE_TRANSFER) + if (cmd_buffer->queue_family_index != RADV_QUEUE_TRANSFER) { + if (cmd_buffer->device->physical_device->rad_info.chip_class == SI) + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_CS_PARTIAL_FLUSH | RADV_CMD_FLAG_PS_PARTIAL_FLUSH | RADV_CMD_FLAG_WRITEBACK_GLOBAL_L2; si_emit_cache_flush(cmd_buffer); + } if (!cmd_buffer->device->ws->cs_finalize(cmd_buffer->cs) || cmd_buffer->record_fail) Index: lib/mesa/src/amd/vulkan/radv_device.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/vulkan/radv_device.c,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 radv_device.c --- lib/mesa/src/amd/vulkan/radv_device.c 14 Aug 2017 09:41:52 -0000 1.1.1.5 +++ lib/mesa/src/amd/vulkan/radv_device.c 26 Aug 2017 03:19:32 -0000 @@ -2730,9 +2730,13 @@ radv_initialise_color_surface(struct rad format != V_028C70_COLOR_24_8) | S_028C70_NUMBER_TYPE(ntype) | S_028C70_ENDIAN(endian); - if (iview->image->samples > 1) - if (iview->image->fmask.size) - cb->cb_color_info |= S_028C70_COMPRESSION(1); + if ((iview->image->samples > 1) && iview->image->fmask.size) { + cb->cb_color_info |= S_028C70_COMPRESSION(1); + if (device->physical_device->rad_info.chip_class == SI) { + unsigned fmask_bankh = util_logbase2(iview->image->fmask.bank_height); + cb->cb_color_attrib |= S_028C74_FMASK_BANK_HEIGHT(fmask_bankh); + } + } if (iview->image->cmask.size && !(device->debug_flags & RADV_DEBUG_NO_FAST_CLEARS)) Index: lib/mesa/src/amd/vulkan/radv_meta_resolve.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/amd/vulkan/radv_meta_resolve.c,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 radv_meta_resolve.c --- lib/mesa/src/amd/vulkan/radv_meta_resolve.c 14 Aug 2017 09:41:50 -0000 1.1.1.2 +++ lib/mesa/src/amd/vulkan/radv_meta_resolve.c 26 Aug 2017 03:19:32 -0000 @@ -436,6 +436,11 @@ void radv_CmdResolveImage( radv_meta_save_graphics_reset_vport_scissor(&saved_state, cmd_buffer); assert(src_image->samples > 1); + if (src_image->samples <= 1) { + /* this causes GPU hangs if we get past here */ + fprintf(stderr, "radv: Illegal resolve operation (src not multisampled), will hang GPU."); + return; + } assert(dest_image->samples == 1); if (src_image->samples >= 16) { Index: lib/mesa/src/compiler/glsl/ast_to_hir.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/compiler/glsl/ast_to_hir.cpp,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 ast_to_hir.cpp --- lib/mesa/src/compiler/glsl/ast_to_hir.cpp 14 Aug 2017 09:37:53 -0000 1.1.1.4 +++ lib/mesa/src/compiler/glsl/ast_to_hir.cpp 26 Aug 2017 03:19:32 -0000 @@ -4281,7 +4281,7 @@ process_initializer(ir_variable *var, as } else { if (var->type->is_numeric()) { /* Reduce cascading errors. */ - var->constant_value = type->qualifier.flags.q.constant + rhs = var->constant_value = type->qualifier.flags.q.constant ? ir_constant::zero(state, var->type) : NULL; } } Index: lib/mesa/src/compiler/glsl/ir_constant_expression.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/compiler/glsl/ir_constant_expression.cpp,v retrieving revision 1.1.1.3 diff -u -p -r1.1.1.3 ir_constant_expression.cpp --- lib/mesa/src/compiler/glsl/ir_constant_expression.cpp 14 Aug 2017 09:38:03 -0000 1.1.1.3 +++ lib/mesa/src/compiler/glsl/ir_constant_expression.cpp 26 Aug 2017 03:19:32 -0000 @@ -725,6 +725,8 @@ ir_swizzle::constant_expression_value(st case GLSL_TYPE_FLOAT: data.f[i] = v->value.f[swiz_idx[i]]; break; case GLSL_TYPE_BOOL: data.b[i] = v->value.b[swiz_idx[i]]; break; case GLSL_TYPE_DOUBLE:data.d[i] = v->value.d[swiz_idx[i]]; break; + case GLSL_TYPE_UINT64:data.u64[i] = v->value.u64[swiz_idx[i]]; break; + case GLSL_TYPE_INT64: data.i64[i] = v->value.i64[swiz_idx[i]]; break; default: assert(!"Should not get here."); break; } } Index: lib/mesa/src/compiler/glsl/opt_constant_propagation.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/compiler/glsl/opt_constant_propagation.cpp,v retrieving revision 1.1.1.3 diff -u -p -r1.1.1.3 opt_constant_propagation.cpp --- lib/mesa/src/compiler/glsl/opt_constant_propagation.cpp 14 Aug 2017 09:37:42 -0000 1.1.1.3 +++ lib/mesa/src/compiler/glsl/opt_constant_propagation.cpp 26 Aug 2017 03:19:32 -0000 @@ -237,6 +237,12 @@ ir_constant_propagation_visitor::constan case GLSL_TYPE_BOOL: data.b[i] = found->constant->value.b[rhs_channel]; break; + case GLSL_TYPE_UINT64: + data.u64[i] = found->constant->value.u64[rhs_channel]; + break; + case GLSL_TYPE_INT64: + data.i64[i] = found->constant->value.i64[rhs_channel]; + break; default: assert(!"not reached"); break; Index: lib/mesa/src/egl/drivers/dri2/platform_wayland.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/egl/drivers/dri2/platform_wayland.c,v retrieving revision 1.1.1.6 diff -u -p -r1.1.1.6 platform_wayland.c --- lib/mesa/src/egl/drivers/dri2/platform_wayland.c 14 Aug 2017 09:37:24 -0000 1.1.1.6 +++ lib/mesa/src/egl/drivers/dri2/platform_wayland.c 26 Aug 2017 03:19:32 -0000 @@ -370,8 +370,13 @@ get_back_bo(struct dri2_egl_surface *dri break; /* If we don't have a buffer, then block on the server to release one for - * us, and try again. */ - if (wl_display_dispatch_queue(dri2_dpy->wl_dpy, dri2_surf->wl_queue) < 0) + * us, and try again. wl_display_dispatch_queue will process any pending + * events, however not all servers flush on issuing a buffer release + * event. So, we spam the server with roundtrips as they always cause a + * client flush. + */ + if (wl_display_roundtrip_queue(dri2_dpy->wl_dpy, + dri2_surf->wl_queue) < 0) return -1; } Index: lib/mesa/src/egl/drivers/dri2/platform_x11.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/egl/drivers/dri2/platform_x11.c,v retrieving revision 1.5 diff -u -p -r1.5 platform_x11.c --- lib/mesa/src/egl/drivers/dri2/platform_x11.c 14 Aug 2017 09:57:57 -0000 1.5 +++ lib/mesa/src/egl/drivers/dri2/platform_x11.c 26 Aug 2017 03:19:32 -0000 @@ -647,6 +647,7 @@ dri2_x11_connect(struct dri2_egl_display error != NULL || xfixes_query->major_version < 2) { _eglLog(_EGL_WARNING, "DRI2: failed to query xfixes version"); free(error); + free(xfixes_query); return EGL_FALSE; } free(xfixes_query); Index: lib/mesa/src/egl/main/eglapi.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/egl/main/eglapi.c,v retrieving revision 1.1.1.6 diff -u -p -r1.1.1.6 eglapi.c --- lib/mesa/src/egl/main/eglapi.c 14 Aug 2017 09:37:31 -0000 1.1.1.6 +++ lib/mesa/src/egl/main/eglapi.c 26 Aug 2017 03:19:32 -0000 @@ -920,7 +920,7 @@ static void * _fixupNativeWindow(_EGLDisplay *disp, void *native_window) { #ifdef HAVE_X11_PLATFORM - if (disp->Platform == _EGL_PLATFORM_X11 && native_window != NULL) { + if (disp && disp->Platform == _EGL_PLATFORM_X11 && native_window != NULL) { /* The `native_window` parameter for the X11 platform differs between * eglCreateWindowSurface() and eglCreatePlatformPixmapSurfaceEXT(). In * eglCreateWindowSurface(), the type of `native_window` is an Xlib @@ -982,7 +982,7 @@ _fixupNativePixmap(_EGLDisplay *disp, vo * `Pixmap*`. Convert `Pixmap*` to `Pixmap` because that's what * dri2_x11_create_pixmap_surface() expects. */ - if (disp->Platform == _EGL_PLATFORM_X11 && native_pixmap != NULL) + if (disp && disp->Platform == _EGL_PLATFORM_X11 && native_pixmap != NULL) return (void *)(* (Pixmap*) native_pixmap); #endif return native_pixmap; Index: lib/mesa/src/gallium/auxiliary/os/os_time.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/auxiliary/os/os_time.c,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 os_time.c --- lib/mesa/src/gallium/auxiliary/os/os_time.c 11 Dec 2016 08:31:35 -0000 1.1.1.2 +++ lib/mesa/src/gallium/auxiliary/os/os_time.c 26 Aug 2017 03:19:33 -0000 @@ -69,10 +69,17 @@ os_time_get_nano(void) static LARGE_INTEGER frequency; LARGE_INTEGER counter; + int64_t secs, nanosecs; if(!frequency.QuadPart) QueryPerformanceFrequency(&frequency); QueryPerformanceCounter(&counter); - return counter.QuadPart*INT64_C(1000000000)/frequency.QuadPart; + /* Compute seconds and nanoseconds parts separately to + * reduce severity of precision loss. + */ + secs = counter.QuadPart / frequency.QuadPart; + nanosecs = (counter.QuadPart % frequency.QuadPart) * INT64_C(1000000000) + / frequency.QuadPart; + return secs*INT64_C(1000000000) + nanosecs; #else Index: lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 nv50_ir.cpp --- lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 14 Aug 2017 09:34:48 -0000 1.1.1.4 +++ lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir.cpp 26 Aug 2017 03:19:33 -0000 @@ -905,6 +905,9 @@ TexInstruction::TexInstruction(Function tex.rIndirectSrc = -1; tex.sIndirectSrc = -1; + + if (op == OP_TXF) + sType = TYPE_U32; } TexInstruction::~TexInstruction() Index: lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 nv50_ir_emit_nvc0.cpp --- lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp 14 Aug 2017 09:34:42 -0000 1.1.1.5 +++ lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp 26 Aug 2017 03:19:33 -0000 @@ -2006,6 +2006,7 @@ CodeEmitterNVC0::getSRegEncoding(const V void CodeEmitterNVC0::emitMOV(const Instruction *i) { + assert(!i->saturate); if (i->def(0).getFile() == FILE_PREDICATE) { if (i->src(0).getFile() == FILE_GPR) { code[0] = 0xfc01c003; Index: lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 nv50_ir_from_tgsi.cpp --- lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 14 Aug 2017 09:34:47 -0000 1.1.1.5 +++ lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp 26 Aug 2017 03:19:33 -0000 @@ -305,6 +305,8 @@ unsigned int Instruction::srcMask(unsign case TGSI_OPCODE_TXD: case TGSI_OPCODE_TXL: case TGSI_OPCODE_TXP: + case TGSI_OPCODE_TXF: + case TGSI_OPCODE_TG4: case TGSI_OPCODE_TEX_LZ: case TGSI_OPCODE_TXF_LZ: case TGSI_OPCODE_LODQ: @@ -343,6 +345,8 @@ unsigned int Instruction::srcMask(unsign } } return mask; + case TGSI_OPCODE_TXQ: + return 1; case TGSI_OPCODE_XPD: { unsigned int x = 0; Index: lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp,v retrieving revision 1.1.1.6 diff -u -p -r1.1.1.6 nv50_ir_peephole.cpp --- lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 14 Aug 2017 09:34:44 -0000 1.1.1.6 +++ lib/mesa/src/gallium/drivers/nouveau/codegen/nv50_ir_peephole.cpp 26 Aug 2017 03:19:33 -0000 @@ -727,7 +727,9 @@ ConstantFolding::expr(Instruction *i, // Leave PFETCH alone... we just folded its 2 args into 1. break; default: - i->op = i->saturate ? OP_SAT : OP_MOV; /* SAT handled by unary() */ + i->op = i->saturate ? OP_SAT : OP_MOV; + if (i->saturate) + unary(i, *i->getSrc(0)->asImm()); break; } i->subOp = 0; @@ -1509,6 +1511,17 @@ ConstantFolding::opnd(Instruction *i, Im default: return; } + + // This can get left behind some of the optimizations which simplify + // saturatable values. + if (newi->op == OP_MOV && newi->saturate) { + ImmediateValue tmp; + newi->saturate = 0; + newi->op = OP_SAT; + if (newi->src(0).getImmediate(tmp)) + unary(newi, tmp); + } + if (newi->op != op) foldCount++; } Index: lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.c,v retrieving revision 1.1.1.6 diff -u -p -r1.1.1.6 r600_pipe_common.c --- lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.c 14 Aug 2017 09:32:10 -0000 1.1.1.6 +++ lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.c 26 Aug 2017 03:19:33 -0000 @@ -769,6 +769,7 @@ static const struct debug_named_value co { "norbplus", DBG_NO_RB_PLUS, "Disable RB+." }, { "sisched", DBG_SI_SCHED, "Enable LLVM SI Machine Instruction Scheduler." }, { "mono", DBG_MONOLITHIC_SHADERS, "Use old-style monolithic shaders compiled on demand" }, + { "ce", DBG_CE, "Force enable the constant engine" }, { "noce", DBG_NO_CE, "Disable the constant engine"}, { "unsafemath", DBG_UNSAFE_MATH, "Enable unsafe math shader optimizations" }, { "nodccfb", DBG_NO_DCC_FB, "Disable separate DCC on the main framebuffer" }, Index: lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.h =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.h,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 r600_pipe_common.h --- lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.h 14 Aug 2017 09:32:09 -0000 1.1.1.5 +++ lib/mesa/src/gallium/drivers/radeon/r600_pipe_common.h 26 Aug 2017 03:19:33 -0000 @@ -64,12 +64,12 @@ #define R600_PRIM_RECTANGLE_LIST PIPE_PRIM_MAX /* Debug flags. */ -/* logging */ +/* logging and features */ #define DBG_TEX (1 << 0) /* gap - reuse */ #define DBG_COMPUTE (1 << 2) #define DBG_VM (1 << 3) -/* gap - reuse */ +#define DBG_CE (1 << 4) /* shader logging */ #define DBG_FS (1 << 5) #define DBG_VS (1 << 6) Index: lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 si_pipe.c --- lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c 14 Aug 2017 09:32:59 -0000 1.1.1.5 +++ lib/mesa/src/gallium/drivers/radeonsi/si_pipe.c 26 Aug 2017 03:19:33 -0000 @@ -185,15 +185,24 @@ static struct pipe_context *si_create_co sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX, si_context_gfx_flush, sctx); - /* SI + AMDGPU + CE = GPU hang */ - if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib && - sscreen->b.chip_class != SI && - /* These can't use CE due to a power gating bug in the kernel. */ - sscreen->b.family != CHIP_CARRIZO && - sscreen->b.family != CHIP_STONEY && - /* Some CE bug is causing green screen corruption w/ MPV video - * playback and occasional corruption w/ 3D. */ - sscreen->b.chip_class != GFX9) { + bool enable_ce = sscreen->b.chip_class != SI && /* SI hangs */ + /* These can't use CE due to a power gating bug in the kernel. */ + sscreen->b.family != CHIP_CARRIZO && + sscreen->b.family != CHIP_STONEY; + + /* CE is currently disabled by default, because it makes s_load latency + * worse, because CE IB doesn't run in lockstep with DE. + * Remove this line after that performance issue has been resolved. + */ + enable_ce = false; + + /* Apply CE overrides. */ + if (sscreen->b.debug_flags & DBG_NO_CE) + enable_ce = false; + else if (sscreen->b.debug_flags & DBG_CE) + enable_ce = true; + + if (ws->cs_add_const_ib && enable_ce) { sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs); if (!sctx->ce_ib) goto fail; Index: lib/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 si_shader_tgsi_setup.c --- lib/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c 14 Aug 2017 09:33:05 -0000 1.1.1.2 +++ lib/mesa/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c 26 Aug 2017 03:19:33 -0000 @@ -243,7 +243,10 @@ unsigned si_llvm_compile(LLVMModuleRef M buffer_size = LLVMGetBufferSize(out_buffer); buffer_data = LLVMGetBufferStart(out_buffer); - ac_elf_read(buffer_data, buffer_size, binary); + if (!ac_elf_read(buffer_data, buffer_size, binary)) { + fprintf(stderr, "radeonsi: cannot read an ELF shader binary\n"); + diag.retval = 1; + } /* Clean up */ LLVMDisposeMemoryBuffer(out_buffer); Index: lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c,v retrieving revision 1.1.1.8 diff -u -p -r1.1.1.8 si_state_draw.c --- lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c 14 Aug 2017 09:33:05 -0000 1.1.1.8 +++ lib/mesa/src/gallium/drivers/radeonsi/si_state_draw.c 26 Aug 2017 03:19:33 -0000 @@ -181,7 +181,11 @@ static void si_emit_derived_tess_state(s *num_patches = MIN2(*num_patches, 40); /* SI bug workaround - limit LS-HS threadgroups to only one wave. */ - if (sctx->b.chip_class == SI) { + if (sctx->b.chip_class == SI || + /* TODO: fix GFX9 where a threadgroup contains more than 1 wave and + * LS vertices per patch > HS vertices per patch. Piglit: 16in-1out */ + (sctx->b.chip_class == GFX9 && + num_tcs_input_cp > num_tcs_output_cp)) { unsigned one_wave = 64 / MAX2(num_tcs_input_cp, num_tcs_output_cp); *num_patches = MIN2(*num_patches, one_wave); } Index: lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.cpp,v retrieving revision 1.1.1.1 diff -u -p -r1.1.1.1 gen_knobs.cpp --- lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.cpp 14 Aug 2017 09:33:55 -0000 1.1.1.1 +++ lib/mesa/src/gallium/drivers/swr/rasterizer/codegen/templates/gen_knobs.cpp 26 Aug 2017 03:19:33 -0000 @@ -1,19 +1,24 @@ /****************************************************************************** +* Copyright (C) 2015-2017 Intel Corporation. All Rights Reserved. * -* Copyright 2015-2017 -* Intel Corporation +* Permission is hereby granted, free of charge, to any person obtaining a +* copy of this software and associated documentation files (the "Software"), +* to deal in the Software without restriction, including without limitation +* the rights to use, copy, modify, merge, publish, distribute, sublicense, +* and/or sell copies of the Software, and to permit persons to whom the +* Software is furnished to do so, subject to the following conditions: * -* Licensed under the Apache License, Version 2.0 (the "License"); -* you may not use this file except in compliance with the License. -* You may obtain a copy of the License at +* The above copyright notice and this permission notice (including the next +* paragraph) shall be included in all copies or substantial portions of the +* Software. * -* http ://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an "AS IS" BASIS, -* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. +* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL +* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING +* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS +* IN THE SOFTWARE. * % if gen_header: * @file ${filename}.h Index: lib/mesa/src/gallium/drivers/swr/rasterizer/core/api.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/swr/rasterizer/core/api.cpp,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 api.cpp --- lib/mesa/src/gallium/drivers/swr/rasterizer/core/api.cpp 14 Aug 2017 09:33:47 -0000 1.1.1.2 +++ lib/mesa/src/gallium/drivers/swr/rasterizer/core/api.cpp 26 Aug 2017 03:19:33 -0000 @@ -192,7 +192,7 @@ void QueueWork(SWR_CONTEXT *pContext) if (IsDraw) { - InterlockedIncrement((volatile LONG*)&pContext->drawsOutstandingFE); + InterlockedIncrement(&pContext->drawsOutstandingFE); } _ReadWriteBarrier(); Index: lib/mesa/src/gallium/drivers/swr/rasterizer/core/context.h =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/swr/rasterizer/core/context.h,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 context.h --- lib/mesa/src/gallium/drivers/swr/rasterizer/core/context.h 14 Aug 2017 09:33:45 -0000 1.1.1.2 +++ lib/mesa/src/gallium/drivers/swr/rasterizer/core/context.h 26 Aug 2017 03:19:33 -0000 @@ -408,12 +408,12 @@ struct DRAW_CONTEXT bool dependent; // Backend work is dependent on all previous BE bool isCompute; // Is this DC a compute context? bool cleanupState; // True if this is the last draw using an entry in the state ring. - volatile bool doneFE; // Is FE work done for this draw? FE_WORK FeWork; + volatile OSALIGNLINE(bool) doneFE; // Is FE work done for this draw? volatile OSALIGNLINE(uint32_t) FeLock; - volatile int32_t threadsDone; + volatile OSALIGNLINE(uint32_t) threadsDone; SYNC_DESC retireCallback; // Call this func when this DC is retired. @@ -504,9 +504,9 @@ struct SWR_CONTEXT // Scratch space for workers. uint8_t** ppScratch; - volatile int32_t drawsOutstandingFE; + volatile OSALIGNLINE(uint32_t) drawsOutstandingFE; - CachingAllocator cachingArenaAllocator; + OSALIGNLINE(CachingAllocator) cachingArenaAllocator; uint32_t frameCount; uint32_t lastFrameChecked; Index: lib/mesa/src/gallium/drivers/swr/rasterizer/core/threads.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/drivers/swr/rasterizer/core/threads.cpp,v retrieving revision 1.1.1.3 diff -u -p -r1.1.1.3 threads.cpp --- lib/mesa/src/gallium/drivers/swr/rasterizer/core/threads.cpp 14 Aug 2017 09:33:39 -0000 1.1.1.3 +++ lib/mesa/src/gallium/drivers/swr/rasterizer/core/threads.cpp 26 Aug 2017 03:19:33 -0000 @@ -393,7 +393,7 @@ INLINE void ExecuteCallbacks(SWR_CONTEXT // inlined-only version INLINE int32_t CompleteDrawContextInl(SWR_CONTEXT* pContext, uint32_t workerId, DRAW_CONTEXT* pDC) { - int32_t result = InterlockedDecrement((volatile LONG*)&pDC->threadsDone); + int32_t result = static_cast<int32_t>(InterlockedDecrement(&pDC->threadsDone)); SWR_ASSERT(result >= 0); AR_FLUSH(pDC->drawId); @@ -639,7 +639,7 @@ INLINE void CompleteDrawFE(SWR_CONTEXT* _mm_mfence(); pDC->doneFE = true; - InterlockedDecrement((volatile LONG*)&pContext->drawsOutstandingFE); + InterlockedDecrement(&pContext->drawsOutstandingFE); } void WorkOnFifoFE(SWR_CONTEXT *pContext, uint32_t workerId, uint32_t &curDrawFE) Index: lib/mesa/src/gallium/state_trackers/wgl/stw_framebuffer.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/gallium/state_trackers/wgl/stw_framebuffer.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 stw_framebuffer.c --- lib/mesa/src/gallium/state_trackers/wgl/stw_framebuffer.c 14 Aug 2017 09:35:54 -0000 1.1.1.4 +++ lib/mesa/src/gallium/state_trackers/wgl/stw_framebuffer.c 26 Aug 2017 03:19:33 -0000 @@ -601,8 +601,11 @@ wait_swap_interval(struct stw_framebuffe int64_t min_swap_period = 1.0e6 / stw_dev->refresh_rate * stw_dev->swap_interval; - /* if time since last swap is less than wait period, wait */ - if (delta < min_swap_period) { + /* If time since last swap is less than wait period, wait. + * Note that it's possible for the delta to be negative because of + * rollover. See https://bugs.freedesktop.org/show_bug.cgi?id=102241 + */ + if ((delta >= 0) && (delta < min_swap_period)) { float fudge = 1.75f; /* emperical fudge factor */ int64_t wait = (min_swap_period - delta) * fudge; os_time_sleep(wait); Index: lib/mesa/src/intel/blorp/blorp_blit.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/intel/blorp/blorp_blit.c,v retrieving revision 1.1.1.2 diff -u -p -r1.1.1.2 blorp_blit.c --- lib/mesa/src/intel/blorp/blorp_blit.c 14 Aug 2017 09:40:32 -0000 1.1.1.2 +++ lib/mesa/src/intel/blorp/blorp_blit.c 26 Aug 2017 03:19:34 -0000 @@ -1555,6 +1555,7 @@ surf_fake_rgb_with_red(const struct isl_ info->surf.logical_level0_px.width *= 3; info->surf.phys_level0_sa.width *= 3; + info->tile_x_sa *= 3; *x *= 3; *width *= 3; Index: lib/mesa/src/intel/compiler/brw_vec4_gs_visitor.cpp =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/intel/compiler/brw_vec4_gs_visitor.cpp,v retrieving revision 1.1.1.1 diff -u -p -r1.1.1.1 brw_vec4_gs_visitor.cpp --- lib/mesa/src/intel/compiler/brw_vec4_gs_visitor.cpp 14 Aug 2017 09:40:38 -0000 1.1.1.1 +++ lib/mesa/src/intel/compiler/brw_vec4_gs_visitor.cpp 26 Aug 2017 03:19:34 -0000 @@ -897,6 +897,7 @@ brw_compile_gs(const struct brw_compiler memcpy(prog_data->base.base.param, param, sizeof(gl_constant_value*) * param_count); prog_data->base.base.nr_params = param_count; + prog_data->base.base.nr_pull_params = 0; ralloc_free(param); } } Index: lib/mesa/src/intel/vulkan/anv_formats.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/intel/vulkan/anv_formats.c,v retrieving revision 1.1.1.3 diff -u -p -r1.1.1.3 anv_formats.c --- lib/mesa/src/intel/vulkan/anv_formats.c 14 Aug 2017 09:41:09 -0000 1.1.1.3 +++ lib/mesa/src/intel/vulkan/anv_formats.c 26 Aug 2017 03:19:34 -0000 @@ -401,7 +401,8 @@ anv_physical_device_get_format_propertie /* Nothing to do here */ } else if (vk_format_is_depth_or_stencil(format)) { tiled |= VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT; - if (physical_device->info.gen >= 8) + if (vk_format_aspects(format) == VK_IMAGE_ASPECT_DEPTH_BIT || + physical_device->info.gen >= 8) tiled |= VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT; tiled |= VK_FORMAT_FEATURE_BLIT_SRC_BIT | Index: lib/mesa/src/mesa/drivers/dri/i965/brw_performance_query.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/brw_performance_query.c,v retrieving revision 1.1.1.1 diff -u -p -r1.1.1.1 brw_performance_query.c --- lib/mesa/src/mesa/drivers/dri/i965/brw_performance_query.c 14 Aug 2017 09:42:28 -0000 1.1.1.1 +++ lib/mesa/src/mesa/drivers/dri/i965/brw_performance_query.c 26 Aug 2017 03:19:34 -0000 @@ -1095,6 +1095,14 @@ brw_end_perf_query(struct gl_context *ct obj->oa.begin_report_id + 1); } + /* We flush the batchbuffer here to minimize the chances that MI_RPC + * delimiting commands end up in different batchbuffers. If that's the + * case, the measurement will include the time it takes for the kernel + * scheduler to load a new request into the hardware. This is manifested + * in tools like frameretrace by spikes in the "GPU Core Clocks" + * counter. + */ + intel_batchbuffer_flush(brw); --brw->perfquery.n_active_oa_queries; /* NB: even though the query has now ended, it can't be accumulated Index: lib/mesa/src/mesa/drivers/dri/i965/gen7_l3_state.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/gen7_l3_state.c,v retrieving revision 1.1.1.3 diff -u -p -r1.1.1.3 gen7_l3_state.c --- lib/mesa/src/mesa/drivers/dri/i965/gen7_l3_state.c 14 Aug 2017 09:42:29 -0000 1.1.1.3 +++ lib/mesa/src/mesa/drivers/dri/i965/gen7_l3_state.c 26 Aug 2017 03:19:34 -0000 @@ -204,6 +204,15 @@ update_urb_size(struct brw_context *brw, if (brw->urb.size != sz) { brw->urb.size = sz; brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE; + + /* If we change the total URB size, reset the individual stage sizes to + * zero so that, even if there is no URB size change, gen7_upload_urb + * still re-emits 3DSTATE_URB_*. + */ + brw->urb.vsize = 0; + brw->urb.gsize = 0; + brw->urb.hsize = 0; + brw->urb.dsize = 0; } } Index: lib/mesa/src/mesa/drivers/dri/i965/gen7_urb.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/gen7_urb.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 gen7_urb.c --- lib/mesa/src/mesa/drivers/dri/i965/gen7_urb.c 14 Aug 2017 09:42:20 -0000 1.1.1.4 +++ lib/mesa/src/mesa/drivers/dri/i965/gen7_urb.c 26 Aug 2017 03:19:34 -0000 @@ -197,9 +197,7 @@ gen7_upload_urb(struct brw_context *brw, /* If we're just switching between programs with the same URB requirements, * skip the rest of the logic. */ - if (!(brw->ctx.NewDriverState & BRW_NEW_CONTEXT) && - !(brw->ctx.NewDriverState & BRW_NEW_URB_SIZE) && - brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] && + if (brw->urb.vsize == entry_size[MESA_SHADER_VERTEX] && brw->urb.gs_present == gs_present && brw->urb.gsize == entry_size[MESA_SHADER_GEOMETRY] && brw->urb.tess_present == tess_present && Index: lib/mesa/src/mesa/drivers/dri/i965/genX_blorp_exec.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/genX_blorp_exec.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 genX_blorp_exec.c --- lib/mesa/src/mesa/drivers/dri/i965/genX_blorp_exec.c 14 Aug 2017 09:42:29 -0000 1.1.1.4 +++ lib/mesa/src/mesa/drivers/dri/i965/genX_blorp_exec.c 26 Aug 2017 03:19:34 -0000 @@ -161,8 +161,7 @@ blorp_emit_urb_config(struct blorp_batch struct brw_context *brw = batch->driver_batch; #if GEN_GEN >= 7 - if (!(brw->ctx.NewDriverState & (BRW_NEW_CONTEXT | BRW_NEW_URB_SIZE)) && - brw->urb.vsize >= vs_entry_size) + if (brw->urb.vsize >= vs_entry_size) return; brw->ctx.NewDriverState |= BRW_NEW_URB_SIZE; Index: lib/mesa/src/mesa/drivers/dri/i965/intel_blit.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/intel_blit.c,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 intel_blit.c --- lib/mesa/src/mesa/drivers/dri/i965/intel_blit.c 14 Aug 2017 09:42:16 -0000 1.1.1.5 +++ lib/mesa/src/mesa/drivers/dri/i965/intel_blit.c 26 Aug 2017 03:19:34 -0000 @@ -188,7 +188,6 @@ get_blit_intratile_offset_el(const struc * The offsets we get from ISL in the tiled case are already aligned. * In the linear case, we need to do some of our own aligning. */ - assert(mt->pitch % 64 == 0); uint32_t delta = *base_address_offset & 63; assert(delta % mt->cpp == 0); *base_address_offset -= delta; @@ -826,11 +825,11 @@ intel_miptree_set_alpha_to_one(struct br if (brw->gen >= 8) { OUT_RELOC64(mt->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - offset); + mt->offset + offset); } else { OUT_RELOC(mt->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, - offset); + mt->offset + offset); } OUT_BATCH(0xffffffff); /* white, but only alpha gets written */ ADVANCE_BATCH_TILED(dst_y_tiled, false); Index: lib/mesa/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 intel_pixel_bitmap.c --- lib/mesa/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c 14 Aug 2017 09:42:28 -0000 1.1.1.4 +++ lib/mesa/src/mesa/drivers/dri/i965/intel_pixel_bitmap.c 26 Aug 2017 03:19:34 -0000 @@ -294,7 +294,7 @@ do_blit_bitmap( struct gl_context *ctx, color, irb->mt->pitch, irb->mt->bo, - 0, + irb->mt->offset, irb->mt->tiling, dstx + px, dsty + py, Index: lib/mesa/src/mesa/main/teximage.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/main/teximage.c,v retrieving revision 1.1.1.5 diff -u -p -r1.1.1.5 teximage.c --- lib/mesa/src/mesa/main/teximage.c 14 Aug 2017 09:44:06 -0000 1.1.1.5 +++ lib/mesa/src/mesa/main/teximage.c 26 Aug 2017 03:19:34 -0000 @@ -4766,13 +4766,13 @@ _mesa_CompressedTextureSubImage3D(GLuint } /* Copy in each face. */ - for (i = 0; i < 6; ++i) { + for (i = zoffset; i < zoffset + depth; ++i) { texImage = texObj->Image[i][level]; assert(texImage); _mesa_compressed_texture_sub_image(ctx, 3, texObj, texImage, texObj->Target, level, - xoffset, yoffset, zoffset, + xoffset, yoffset, 0, width, height, 1, format, imageSize, pixels); Index: lib/mesa/src/mesa/state_tracker/st_manager.c =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/mesa/state_tracker/st_manager.c,v retrieving revision 1.1.1.4 diff -u -p -r1.1.1.4 st_manager.c --- lib/mesa/src/mesa/state_tracker/st_manager.c 14 Aug 2017 09:43:26 -0000 1.1.1.4 +++ lib/mesa/src/mesa/state_tracker/st_manager.c 26 Aug 2017 03:19:34 -0000 @@ -496,7 +496,7 @@ st_context_flush(struct st_context_iface st_flush(st, fence, pipe_flags); - if ((flags & ST_FLUSH_WAIT) && fence) { + if ((flags & ST_FLUSH_WAIT) && fence && *fence) { st->pipe->screen->fence_finish(st->pipe->screen, NULL, *fence, PIPE_TIMEOUT_INFINITE); st->pipe->screen->fence_reference(st->pipe->screen, fence, NULL); Index: lib/mesa/src/util/Makefile.am =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/util/Makefile.am,v retrieving revision 1.4 diff -u -p -r1.4 Makefile.am --- lib/mesa/src/util/Makefile.am 14 Aug 2017 09:58:01 -0000 1.4 +++ lib/mesa/src/util/Makefile.am 26 Aug 2017 03:19:34 -0000 @@ -44,7 +44,9 @@ libmesautil_la_SOURCES = \ $(MESA_UTIL_FILES) \ $(MESA_UTIL_GENERATED_FILES) -libmesautil_la_LIBADD = $(ZLIB_LIBS) +libmesautil_la_LIBADD = \ + $(CLOCK_LIB) \ + $(ZLIB_LIBS) roundeven_test_LDADD = -lm Index: lib/mesa/src/util/Makefile.in =================================================================== RCS file: /cvs/xenocara/lib/mesa/src/util/Makefile.in,v retrieving revision 1.8 diff -u -p -r1.8 Makefile.in --- lib/mesa/src/util/Makefile.in 14 Aug 2017 09:58:01 -0000 1.8 +++ lib/mesa/src/util/Makefile.in 26 Aug 2017 03:19:34 -0000 @@ -94,7 +94,8 @@ CONFIG_CLEAN_FILES = CONFIG_CLEAN_VPATH_FILES = LTLIBRARIES = $(noinst_LTLIBRARIES) am__DEPENDENCIES_1 = -libmesautil_la_DEPENDENCIES = $(am__DEPENDENCIES_1) +libmesautil_la_DEPENDENCIES = $(am__DEPENDENCIES_1) \ + $(am__DEPENDENCIES_1) am__dirstamp = $(am__leading_dot)dirstamp am__objects_1 = libmesautil_la-bitscan.lo libmesautil_la-build_id.lo \ libmesautil_la-crc32.lo libmesautil_la-debug.lo \ @@ -596,7 +597,10 @@ libmesautil_la_SOURCES = \ $(MESA_UTIL_FILES) \ $(MESA_UTIL_GENERATED_FILES) -libmesautil_la_LIBADD = $(ZLIB_LIBS) +libmesautil_la_LIBADD = \ + $(CLOCK_LIB) \ + $(ZLIB_LIBS) + roundeven_test_LDADD = -lm TESTS = $(check_PROGRAMS) BUILT_SOURCES = $(MESA_UTIL_GENERATED_FILES)
