Re: blocking software interrupt thread & reentrancy

2010-09-22 Thread Andrew Doran
On Wed, Sep 22, 2010 at 01:42:04PM +0200, Manuel Bouyer wrote: > Hello, > I have a question about software interrupt threads (__HAVE_FAST_SOFTINTS > case). I'm interrested in the mips implementation but I looked at x86 > and didn't find what I looked for either, so my question applies to > both. >

Re: where is my memory?

2010-09-22 Thread matthew sporleder
On Wed, Sep 22, 2010 at 9:18 AM, Johnny Billquist wrote: > der Mouse wrote: > > total memory = 2047 MB > avail memory = 1999 MB total memory = 256 MB avail memory = 239 MB >>> >>> Some graphics chips, especially on lower-end machines, use main >>> memory, thus making it

Re: where is my memory?

2010-09-22 Thread Johnny Billquist
Doh! And I wasn't thinking straight. In the VAX (atleast) the printouts of the two values are actually avail_end (which is physical memory after some small stuff have been reserved away), and uvmexp.free, which is (probably) a fairly different number. I guess more stuff have been allocated away

Re: where is my memory?

2010-09-22 Thread Johnny Billquist
der Mouse wrote: total memory = 2047 MB avail memory = 1999 MB total memory = 256 MB avail memory = 239 MB Some graphics chips, especially on lower-end machines, use main memory, thus making it unavailable to the CPU. It's not that simple. I've seen this for a very long time, including on ma

Re: blocking software interrupt thread & reentrancy

2010-09-22 Thread Manuel Bouyer
On Wed, Sep 22, 2010 at 01:42:04PM +0200, Manuel Bouyer wrote: > Hello, > I have a question about software interrupt threads (__HAVE_FAST_SOFTINTS > case). I'm interrested in the mips implementation but I looked at x86 > and didn't find what I looked for either, so my question applies to > both. >

Re: where is my memory?

2010-09-22 Thread der Mouse
>>> total memory = 2047 MB >>> avail memory = 1999 MB >> total memory = 256 MB >> avail memory = 239 MB > Some graphics chips, especially on lower-end machines, use main > memory, thus making it unavailable to the CPU. It's not that simple. I've seen this for a very long time, including on machin

blocking software interrupt thread & reentrancy

2010-09-22 Thread Manuel Bouyer
Hello, I have a question about software interrupt threads (__HAVE_FAST_SOFTINTS case). I'm interrested in the mips implementation but I looked at x86 and didn't find what I looked for either, so my question applies to both. When a software interrupt is triggered, the CPU switches to the related ke