Matt Thomas wrote:
On Jul 19, 2014, at 2:02 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
the cache instructions are privileged.
Justin Cormack wrote:
On Jul 19, 2014 10:01 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
You surely can't do that, people may be trying
On Jul 19, 2014, at 2:02 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
the cache instructions are privileged. There's a sysarch interface
Hi,
I'd like to commit a private rump component that adds a hypercall for
synching icache. This will help us to test bpfjit and npf on arm and
mips platforms.
I already sent a couple of emails to Antti but because he hasn't
replied yet and the branching date is fast approaching, I thought
I'd
On Jul 19, 2014 10:01 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
You surely can't do that, people may be trying to compile on non mips3
Justin Cormack wrote:
On Jul 19, 2014 10:01 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
You surely can't do that, people may be trying
Alexander Nasonov wrote:
Justin Cormack wrote:
On Jul 19, 2014 10:01 AM, Alexander Nasonov al...@yandex.ru wrote:
To compile mips/cache.h in rump kernel, I needed to add -DMIPS3=1
to Makefile.rump for mips platforms. This is the only change outside
of sljit scope.
You surely
Alexander Nasonov wrote:
Wikipedia (https://en.wikipedia.org/wiki/MIPS_architecture) states that
Each revision is a superset of its predecessors.
This is strictly true for MIPS I to MIPS V but we also have MIPS
32 and MIPS 64. MIPS 32 is based on MIPS II (with some features
from MIPS III, IV
Alexander Nasonov al...@yandex.ru writes:
I'd like to commit a private rump component that adds a hypercall for
synching icache. This will help us to test bpfjit and npf on arm and
mips platforms.
Why is this private? If it's generally necessary, it should become part
of the standard
Greg Troxel wrote:
Why is this private? If it's generally necessary, it should become part
of the standard interface.Is it just that sljit is the only place
that is currently creating code that is later executed?
I made a change to the standard place about a month ago but Antti
objected
Alexander Nasonov al...@yandex.ru writes:
Greg Troxel wrote:
Why is this private? If it's generally necessary, it should become part
of the standard interface.Is it just that sljit is the only place
that is currently creating code that is later executed?
I made a change to the
19.07.2014, 19:57, Greg Troxel g...@ir.bbn.com:
Are you saying that's
the evenntual goal and this is just a temporary hack to make sjlit work
on rump?
Committed code will have a comment stating that it's temporary but because I
don't know what exactly should be in the new interface I can't
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