Re: Driver for PolarFire SoC MSS I2C controller

2022-02-16 Thread Visa Hankala
On Tue, Feb 15, 2022 at 10:58:02PM +0100, Mark Kettenis wrote:
> > +int
> > +mpfiic_i2c_send_stop(void *cookie, int flags)
> > +{
> > +   struct mpfiic_softc *sc = cookie;
> > +
> > +   sc->sc_start_sent = 0;
> > +
> > +   HWRITE4(sc, I2C_CTRL, sc->sc_ctrl | I2C_CTRL_STO);
> > +
> > +   /* Let a few bus clock cycles to pass. */
> 
> /* Let a few bus clock cycles pass. */

Thanks, fixed in the committed file.



Re: Driver for PolarFire SoC MSS I2C controller

2022-02-15 Thread Mark Kettenis
> Date: Mon, 14 Feb 2022 17:50:55 +
> From: Visa Hankala 
> 
> This patch adds a basic driver for the PolarFire SoC MSS I2C controller.
> 
> OK?

Small not below,

Otherwise ok kettenis@

> Index: share/man/man4/iic.4
> ===
> RCS file: src/share/man/man4/iic.4,v
> retrieving revision 1.122
> diff -u -p -r1.122 iic.4
> --- share/man/man4/iic.4  24 Dec 2021 07:05:55 -  1.122
> +++ share/man/man4/iic.4  14 Feb 2022 17:40:51 -
> @@ -48,6 +48,7 @@
>  .Cd "iic* at mviic? # arm64"
>  .Cd "iic* at rkiic? # arm64 armv7"
>  .Cd "iic* at sxitwi?# arm64 armv7"
> +.Cd "iic* at mpfiic?# riscv64"
>  .Cd "iic* at ociic? # riscv64"
>  .Sh DESCRIPTION
>  .Tn I2C
> @@ -113,6 +114,8 @@ Intel ICH SMBus controller
>  Freescale i.MX I2C controller
>  .It Xr kiic 4
>  Apple Kauai I2C controller
> +.It Xr mpfiic 4
> +Microchip PolarFire SoC MSS I2C controller
>  .It Xr mviic 4
>  Marvell Armada 3700 I2C Controller
>  .It Xr nviic 4
> Index: share/man/man4/man4.riscv64/Makefile
> ===
> RCS file: src/share/man/man4/man4.riscv64/Makefile,v
> retrieving revision 1.4
> diff -u -p -r1.4 Makefile
> --- share/man/man4/man4.riscv64/Makefile  5 Jan 2022 03:32:43 -   
> 1.4
> +++ share/man/man4/man4.riscv64/Makefile  14 Feb 2022 17:40:52 -
> @@ -1,6 +1,6 @@
>  #$OpenBSD: Makefile,v 1.4 2022/01/05 03:32:43 visa Exp $
>  
> -MAN= intro.4 mpfclock.4 plic.4 sfcc.4 sfclock.4 sfuart.4
> +MAN= intro.4 mpfclock.4 mpfiic.4 plic.4 sfcc.4 sfclock.4 sfuart.4
>  
>  MANSUBDIR=riscv64
>  
> Index: share/man/man4/man4.riscv64/mpfiic.4
> ===
> RCS file: share/man/man4/man4.riscv64/mpfiic.4
> diff -N share/man/man4/man4.riscv64/mpfiic.4
> --- /dev/null 1 Jan 1970 00:00:00 -
> +++ share/man/man4/man4.riscv64/mpfiic.4  14 Feb 2022 17:40:53 -
> @@ -0,0 +1,40 @@
> +.\"  $OpenBSD$
> +.\"
> +.\" Copyright (c) 2022 Visa Hankala
> +.\"
> +.\" Permission to use, copy, modify, and distribute this software for any
> +.\" purpose with or without fee is hereby granted, provided that the above
> +.\" copyright notice and this permission notice appear in all copies.
> +.\"
> +.\" THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> +.\" WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> +.\" MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
> +.\" ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> +.\" WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
> +.\" ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
> +.\" OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> +.\"
> +.Dd $Mdocdate$
> +.Dt MPFIIC 4 riscv64
> +.Os
> +.Sh NAME
> +.Nm mpfiic
> +.Nd Microchip PolarFire SoC MSS I2C controller
> +.Sh SYNOPSIS
> +.Cd "mpfiic* at fdt?"
> +.Cd "iic* at mpfiic?"
> +.Sh DESCRIPTION
> +The
> +.Nm
> +driver supports the Microchip PolarFire SoC MSS I2C controller
> +for use with the
> +.Xr iic 4
> +framework.
> +.Sh SEE ALSO
> +.Xr iic 4 ,
> +.Xr intro 4
> +.Sh HISTORY
> +The
> +.Nm
> +driver first appeared in
> +.Ox 7.1 .
> Index: sys/arch/riscv64/conf/GENERIC
> ===
> RCS file: src/sys/arch/riscv64/conf/GENERIC,v
> retrieving revision 1.33
> diff -u -p -r1.33 GENERIC
> --- sys/arch/riscv64/conf/GENERIC 18 Jan 2022 07:53:39 -  1.33
> +++ sys/arch/riscv64/conf/GENERIC 14 Feb 2022 17:40:53 -
> @@ -48,6 +48,8 @@ com*at fdt?
>  cdsdhc*  at fdt?
>  sdmmc*   at cdsdhc?
>  mpfclock*at fdt? early 1
> +mpfiic*  at fdt?
> +iic* at mpfiic?
>  
>  # SiFive SoCs
>  sfclock* at fdt? early 1 # PRCI
> Index: sys/arch/riscv64/conf/RAMDISK
> ===
> RCS file: src/sys/arch/riscv64/conf/RAMDISK,v
> retrieving revision 1.29
> diff -u -p -r1.29 RAMDISK
> --- sys/arch/riscv64/conf/RAMDISK 18 Jan 2022 07:53:39 -  1.29
> +++ sys/arch/riscv64/conf/RAMDISK 14 Feb 2022 17:40:53 -
> @@ -39,6 +39,8 @@ com*at fdt?
>  cdsdhc*  at fdt?
>  sdmmc*   at cdsdhc?
>  mpfclock*at fdt? early 1
> +mpfiic*  at fdt?
> +iic* at mpfiic?
>  
>  # SiFive SoCs
>  sfclock* at fdt? early 1 # PRCI
> Index: sys/arch/riscv64/conf/files.riscv64
> ===
> RCS file: src/sys/arch/riscv64/conf/files.riscv64,v
> retrieving revision 1.18
> diff -u -p -r1.18 files.riscv64
> --- sys/arch/riscv64/conf/files.riscv64   5 Jan 2022 03:32:44 -   
> 1.18
> +++ sys/arch/riscv64/conf/files.riscv64   14 Feb 2022