On Wed, Jul 04, 2012 at 04:27:19AM -0400, Brad Smith wrote:
The following diff corrects the Jumbo ring/mini ring setup code
to not write to some registers if the chip doesn't have Jumbo
ring support and moves the mini ring setup out from under the
Jumbo ring support and made to only be done for the BCM5700
family chips as they're the only chips with the mini ring.
There was a copy and paste issue with the original diff
here is a fixed version.
Index: if_bge.c
===
RCS file: /home/cvs/src/sys/dev/pci/if_bge.c,v
retrieving revision 1.311
diff -u -p -r1.311 if_bge.c
--- if_bge.c4 Jul 2012 13:24:41 - 1.311
+++ if_bge.c18 Jul 2012 20:10:19 -
@@ -1423,6 +1423,9 @@ bge_blockinit(struct bge_softc *sc)
CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb-bge_maxlen_flags);
CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb-bge_nicaddr);
+ /* Reset the standard receive producer ring producer index. */
+ bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, 0);
+
/*
* Initialize the Jumbo RX ring control block
* We set the 'ring disabled' bit in the flags
@@ -1446,18 +1449,24 @@ bge_blockinit(struct bge_softc *sc)
rcb-bge_maxlen_flags);
CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR,
rcb-bge_nicaddr);
+ /* Reset the jumbo receive producer ring producer index. */
+ bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0);
+
+ bus_dmamap_sync(sc-bge_dmatag, sc-bge_ring_map,
+ offsetof(struct bge_ring_data, bge_info),
+ sizeof (struct bge_gib),
+ BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+ }
- /* Set up dummy disabled mini ring RCB */
+ /* Set up dummy disabled mini ring RCB */
+ if (BGE_IS_5700_FAMILY(sc)) {
rcb = sc-bge_rdata-bge_info.bge_mini_rx_rcb;
rcb-bge_maxlen_flags =
BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED);
CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS,
rcb-bge_maxlen_flags);
-
- bus_dmamap_sync(sc-bge_dmatag, sc-bge_ring_map,
- offsetof(struct bge_ring_data, bge_info),
- sizeof (struct bge_gib),
- BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+ /* Reset the mini receive producer ring producer index. */
+ bge_writembx(sc, BGE_MBX_RX_MINI_PROD_LO, 0);
}
/* Choose de-pipeline mode for BCM5906 A0, A1 and A2. */
@@ -1477,7 +1486,8 @@ bge_blockinit(struct bge_softc *sc)
* to work around HW bugs.
*/
CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, 8);
- CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, 8);
+ if (BGE_IS_JUMBO_CAPABLE(sc))
+ CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, 8);
if (BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM5717 ||
BGE_ASICREV(sc-bge_chipid) == BGE_ASICREV_BCM57765) {
@@ -1522,11 +1532,6 @@ bge_blockinit(struct bge_softc *sc)
(i * (sizeof(u_int64_t))), 0);
rcb_addr += sizeof(struct bge_rcb);
}
-
- /* Initialize RX ring indexes */
- bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, 0);
- bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0);
- bge_writembx(sc, BGE_MBX_RX_MINI_PROD_LO, 0);
/*
* Set up RX return ring 0
--
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