[time-nuts] Still looking for a maual for an Auston 2110 Disciplined Frequency Standard

Hi:   If anyone has a manual for an Austron 2110 Disciplined Frequency Standard, I would be interested in a copy.  Please feel free to contact me off-list.  This is a really cool instrument that locks the frequency of its internal ovenized crystal oscillator to an external standard having

Re: [time-nuts] Question about frequency counter testing

Hi As you have noticed already, it is amazingly easy to get data plots with more than the real number and less than the real number of digits. Only careful analysis of the underlying hardware and firmware will lead to an accurate estimate of resolution. This is by no means unique to what

Re: [time-nuts] Question about frequency counter testing

Hi From: "Bob kb8tq" Sent: Friday, April 27, 2018 4:38 PM Consider a case where the clocks and signals are all clean and stable: Both are within 2.5 ppb of an integer relationship. ( let’s say one is 10 MHz and the other is 400 MHz ). The amount of information in your data

Re: [time-nuts] Question about frequency counter testing

From: "Azelio Boriani" Sent: Friday, April 27, 2018 12:16 AM If your hardware is capable of capturing up to 10 millions of timestamps per second and calculating LR "on the fly", it is not a so simple hardware, unless you consider simple hardware a 5megagates Spartan3

Re: [time-nuts] Question about frequency counter testing

Hi So what’s going on here? With any of a number of modern (and not so modern) FPGA’s you can run a clock in the 400 MHz region. Clocking with a single edge gives you a 2.5 ns resolution. On some parts, you are not limited to a single edge. You can clock with both the rising and falling

Re: [time-nuts] Question about frequency counter testing

Hi Since you are using averaging to get more bits (much like a CIC ) the idea that you need noise to make it happen is actually pretty common. There are app notes coming at it from various directions on ADC’s and SDR going *way* back (like to when I was in school …. yikes ….). What is a bit

Re: [time-nuts] Question about frequency counter testing

Azelio, the problem with that approach is that the more stable and accurate your DUT & REF sources the less likely there will be transitions, even during millions of samples over one second. A solution is to dither the clock, which is something many old hp frequency counters did. In other

Re: [time-nuts] Question about frequency counter testing

You can measure your clocks down to the ps averaged resolution you want only if they are worse than your one-shot base resolution one WRT the other. In a resonable time, that is how many transitions in your 2.5ns sampling interval you have in 1 second to have a n-digit/second counter. On Fri, Apr

Re: [time-nuts] Question about frequency counter testing

Yes, this is the problem when trying to enhance the resolution from a low one-shot resolution. Averaging 2.5ns resolution samples can give data only if clocks move one with respect to the other and "cross the boundary" of the 2.5ns sampling interval. You can measure your clocks down to the ps

Re: [time-nuts] Question about frequency counter testing

> That might be an interesting way to analyze TICC data. It would work > better/faster if you used a custom divider to trigger the TICC as fast as it > can print rather than using the typical PPS. Hi Hal, Exactly correct. For more details see this posting:

Re: [time-nuts] Hat Creek observatory

Hi, Pat, Oh boy, sounds like quite the place! A tour would be wonderful, but I live even further away than most of you (eastern Ontario, Canada). Hobbies are time-frequency, astronomy and ham radio. Hat Creek sounds like heaven so I hope you get lots of takers. Good luck with the tour.

Re: [time-nuts] Question about frequency counter testing

Hi Consider a case where the clocks and signals are all clean and stable: Both are within 2.5 ppb of an integer relationship. ( let’s say one is 10 MHz and the other is 400 MHz ). The amount of information in your data stream collapses. Over a 1 second period, you get a bit better than 9

Re: [time-nuts] Question about frequency counter testing

olegsky...@gmail.com said: > No, it is much simpler. The hardware saves time-stamps to the memory at each > (event) rise of the input signal (let's consider we have digital logic input > signal for simplicity). So after some time we have many pairs of {event > number, time-stamp}. We can plot