Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Bruce Griffiths wrote:
 michael taylor wrote:
   
 You have made similar comments about I believe the same approach in
 the past. I was wondering if you have ever sketched out a schematic,
 even if only rough. Perhaps with a few suggested components to try
 (i.e. DAC, Op-Amp) that would be a good starting point for anyone who
 wanted to prototype and evaluate the performance of this approach.

 It is beyond my elementary design abilities to convert your
 description into a well implemented design on my own, but I would be
 interested in try to at least see if I could construct an unit using
 these suggested techniques.

 -Michael

   
 
Michael

Attached is the circuit for a 1 bit phase detector.
HCMOS should be perfectly adequate given that the flipflop is allowed
several hundred millisec to settle before being read by the microprocessor.
An RF transformer isolated clock shaper should be used to shape the OCXO
output and avoid low frequency ground loops.
You probably want at least a 2 output distribution amplifier (unless
your OCXO has multiple isolated outputs eg FTS1200 OSA8607, some of the
Wenzel OCXOs, etc.) to allow the OCXO output to be used for other
applications as well.

The position of the divider output transition is adjusted by the control
algorithm with respect to the leading edge of the PPS signal so that the
D flipflop Q has a 50% chance of being 1 when read by the
microprocessor. The effective resolution is determined by the jitter of
the leading edge of the PPS pulse.

Bruce


1BitPhaseDetector.pdf
Description: Adobe PDF document
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Re: [time-nuts] Fury Interface Board simulation results

2007-12-12 Thread Rex
Thanks, Bruce, for the circuit. I don't recognize the transformer 
numbers in your schematic. Can you tell us more about the nature of the 
transformers you have specified?


Bruce Griffiths wrote:
 George

 The circuit schematic for a BJT version of the JFET frequency is attached.
 The biasing is a little more complex as it is necessary set each
 frequency doubler BJT collector current at about 1mA or so to maximise
 conversion gain.
 The input impedance  is also around 50 ohms.
 Have also minimised the number of different component values used.
 Other transistors may be substituted but some care is required as the 
 reverse voltage across the base emitter junction is about 2V for a
 +13dBm input.
 Some filtering of the output waveform is required.
 The intended output load is 50 ohms.

 The 200 ohm emitter series resistors together with the transformed
 source impedance ensure that there is sufficient degeneration to keep
 the phase noise low.

 Obtaining suitable transistors for this circuit should be much easier
 than obtaining suitable JFETS for the JFET doubler.

 Whilst a diode doubler (at higher frequencies this may be the only
 sensible option) could be used it would need both an input amplifier and
 an output amplifier.

 Bruce
   
 

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Re: [time-nuts] Fury Interface Board simulation results

2007-12-12 Thread Bruce Griffiths
Rex wrote:
 Thanks, Bruce, for the circuit. I don't recognize the transformer 
 numbers in your schematic. Can you tell us more about the nature of the 
 transformers you have specified?


   
Rex

These are standard Minicircuits through hole mount RF transformers that
have (with an appropriate termination) low VSWR for frequencies around
5-10MHz or so.
They also make surface mount equivalents.
They have impedance ratios of 16:1 (4:1 turns ratio centre tapped on the
high impedance side). Although a centre tapped transformer isnt needed
for the output I elected to use the same part to keep the number of
different parts down especially when they appear very similar.

Bruce

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Re: [time-nuts] Fury Interface Board simulation results

2007-12-12 Thread Rex
Thanks. Great! Commonly available part.. I agree one part for both is good.


Bruce Griffiths wrote:
 Rex wrote:
   
 Thanks, Bruce, for the circuit. I don't recognize the transformer 
 numbers in your schematic. Can you tell us more about the nature of the 
 transformers you have specified?


   
 
 Rex

 These are standard Minicircuits through hole mount RF transformers that
 have (with an appropriate termination) low VSWR for frequencies around
 5-10MHz or so.
 They also make surface mount equivalents.
 They have impedance ratios of 16:1 (4:1 turns ratio centre tapped on the
 high impedance side). Although a centre tapped transformer isnt needed
 for the output I elected to use the same part to keep the number of
 different parts down especially when they appear very similar.

 Bruce

   


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Re: [time-nuts] need recomendation for a portable 10mhz reference oscilator

2007-12-12 Thread Magnus Danielson
From: bg [EMAIL PROTECTED]
Subject: Re: [time-nuts] need recomendation for a portable 10mhz reference 
oscilator
Date: Wed, 12 Dec 2007 06:58:15 +0100
Message-ID: [EMAIL PROTECTED]

 
 On Tue, 2007-12-11 at 18:38 -0500, John Ackermann N8UR wrote:
 
  To get decent (for some definition of decent) timing, you need to
  operate the receiver in 0-D mode, telling it where it is and letting
  it solve just for time.  I haven't done the experiments myself but I
  believe that the time accuracy is pretty dramatically degraded when
  operating in 2-D or 3-D mode.
  
   How long does a survey take (in good conditions) and what sort of time 
   constant would you want to use with a navigation box?
  
  It depends on the receiver, but usually it's a few hours to a full day.
   Of course, if you use external software you can use whatever time
  period you want.
  
  John
 
 I am surprised surveying mode is needed anymore. In a SA environment it
 makes sense, but for me its hard to understand with the current accuracy
 given by the GPS system.

For the 2,13E-9 precission needed, very simple arrangements should be needed
around a standard GPS receiver. No fancy features like sawtooth correction and
TRAIM needed. My little bluetooth-GPS would do after a very mild modification
(PPS output).

If you use a OSA 8712 together with a simple GPS, only very simple control
should be needed. Powerbudget and price could be held fairly low.

The optimum design does not always relate to optimum Allan Deviation curve you
know. :)

Cheers,
Magnus

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Re: [time-nuts] Fury Interface Board simulation results

2007-12-12 Thread Bruce Griffiths
Rex wrote:
 Thanks. Great! Commonly available part.. I agree one part for both is good.


   
Rex

One caveat is the dc current flowing in the output transformer may cause
too much distortion (actual specification on the data sheet is somewhat
unclear/ambiguous), in which case capacitively coupling the output
transformer and using an inductive shunt feed arrangement will cure this
problem. Of course the ideal location for series tuned shunt traps
(tuned to fundamental and say 4th harmonic) is from the output
collectors to ground. These short unwanted harmonic currents to ground
allowing a relatively simple low pass filter to be used to cleanup the
output without contributing significant phase shift and associated
tempco to the desired second harmonic output. The net dc current flowing
in the input transformer secondary will be very small.

Bruce

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Luis Cupido
Hi Bruce,


Fine, you don't like the words far better performance... okay ;-)
you do recognize the small advantage in noise but
gave no relevance to the other aspects namely the
lock acquisition, the fact that I can monitor the jitter over time
etc. (all of them were contained in my word performance
not just the noise).

you wrote,
  By all means try them,

Humm?! I did tried them, that's exactly what I said !!!
Note that I do have the hardware on a CPLD so schemes
can be done on type-compile-and-test basis without
soldering wires hi ;-)

  but why add the power consumption and complexity
  of a CPLD if it offers little improvement in performance?

G, using a CPLD does not add complexity, it is just one chip
and it offers the commodity of being easily configured etc.
Also the power consumption is surely not an issue, if you
are not happy with the 50 to 100mA you may draw from 3.3v
just use a low power CPLD (like tha maxIIZ) and get
only 10 to 20mA.

On the comments about the filter and bandwidth I do agree
with you it would be good to have most of it digital
(doesn't need to be necessarily on a CPU... inside the CPLD
is the same) I do have versions with integration also
in digital and I'm still in the process of improving it.
I believe I may get rid off of some of the inconvenient
analog filtering, in the next VHDL iterations hi ;-)


One thing is puzzling me, if you suggest using a
single D flip-flop and want it simple as you say
I presume you have also to filter in analog ?!
So you end up with a slightly worst phase comparator
and the less convenient analog filter :-(

Or do you need to add a microcontroller and a DAC ?
If that is the case, there goes off your complexity issue
much higher than a simple CPLD.


Luis Cupido.
ct1dmk






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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Luis Cupido wrote:
 Hi Bruce,


 Fine, you don't like the words far better performance... okay ;-)
 you do recognize the small advantage in noise but
 gave no relevance to the other aspects namely the
 lock acquisition, the fact that I can monitor the jitter over time
 etc. (all of them were contained in my word performance
 not just the noise).
   
Its not too difficult to add a couple of extra flipflops plus associated
delays to allow reasonably accurate estimation of noise if thats useful.
 you wrote,
   By all means try them,

 Humm?! I did tried them, that's exactly what I said !!!
 Note that I do have the hardware on a CPLD so schemes
 can be done on type-compile-and-test basis without
 soldering wires hi ;-)

   
A theoretical understanding the performance tradeoffs can save a lot of
time and effort.
   but why add the power consumption and complexity
   of a CPLD if it offers little improvement in performance?

 G, using a CPLD does not add complexity, it is just one chip
 and it offers the commodity of being easily configured etc.
 Also the power consumption is surely not an issue, if you
 are not happy with the 50 to 100mA you may draw from 3.3v
 just use a low power CPLD (like tha maxIIZ) and get
 only 10 to 20mA.

   
You have to keep in mind that not everyone on this list can or wants to
program a CPLD.
 On the comments about the filter and bandwidth I do agree
 with you it would be good to have most of it digital
 (doesn't need to be necessarily on a CPU... inside the CPLD
 is the same) I do have versions with integration also
 in digital and I'm still in the process of improving it.
 I believe I may get rid off of some of the inconvenient
 analog filtering, in the next VHDL iterations hi ;-)


 One thing is puzzling me, if you suggest using a
 single D flip-flop and want it simple as you say
 I presume you have also to filter in analog ?!
   
Where did you get that from??
No analog filtering of the D flipflop output is required.
 So you end up with a slightly worst phase comparator
 and the less convenient analog filter :-(
   
Try reading up on how the radio astronomers digitise their noise like
signals.
You should also look at why a 1-2 bit ADC suffices for most GPS timing
receivers.
 Or do you need to add a microcontroller and a DAC ?
 If that is the case, there goes off your complexity issue
 much higher than a simple CPLD.

   
I've used plenty of CPLDs but see no reason to use one when it isnt
necessary.
If you want really high phase measurement resolution then the high noise
internal environment of a CPLD can add plenty of jitter and unwanted
crosstalk.
You are unlikely to ever achieve a jitter of 10picosec or less with a
standard CPLD whereas this is readily achieved using a single flipflop
or a wideband ADC used as a phase detector.
 Luis Cupido.
 ct1dmk

   
Bruce

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Re: [time-nuts] Using a Vectron OCXO 5mhz oscilator with ntpd

2007-12-12 Thread Hal Murray

 I have started to see this 5mhz frequency quartz oscilators that are
 really inexpensive (see http://www.alltronics.com/cgi-bin/
 category.cgi?item=04P010 ).  My question, how would you get this to
 work with ntpd?  Seems like it work great for my situation where I can
 just put inside the rack behind the server, use some ntp servers to
 get the time to within 1 msec usually and then use this to get into
 the nanosecond accuracy. 

There are two issues with keeping time.

The first is to get your clock to tick at the right frequency, or to know how 
fast your clock is actually ticking.

ntpd is pretty good at that.  If you haven't done it already, turn on 
loopstats and graph the offset and drift columns.  The drift is basically the 
difference between the nominal frequency and the measured frequency, aka the 
inaccuracy of the crystal.  Most crystals make reasonable thermometers.

The other issue is lining up the seconds ticks.  You can get reasonable 
results by asking nearby ntp servers that know the answer.  How good you get 
depends mostly on your network connection.  If you want better than a few 
milliseconds, you need a local PPS source.

If you want to get started, I recommend the Garmin GPS 18 LVC.  Under $100.  
Some soldering required.  Not much.  (It needs 5V.  You can get it from USB.)
  http://support.ntp.org/bin/view/Support/ConfiguringGarminRefclocks
I got mine at ProVantage.com  There are some on eBay, but the picture is the 
USB version.

You want the OEM version - without maps or software.


The main advantage you will get from a good OCXO will be that ntpd doesn't 
have to spend any time tracking the thermal drift of your local crystal.  You 
still need to find the seconds ticks.




-- 
These are my opinions, not necessarily my employer's.  I hate spam.




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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Luis Cupido
Bruce,

  I've used plenty of CPLDs but see no reason to use one when it isnt
  necessary.

The sentence in my perspective sounds a bit like this:
I've used plenty of TTL and CMOS but see no reason to use them
when I could fit them all on a CPLD.

I do understand that some may not want to get into this kind of
devices, however I see not much of a difference of
learning you way with microcontrollers, CPLDs or with any
digital IC's these days.

CPLDs in general do bring simplicity but do require learning
how to use them and for various reasons that may be undesirable
and be confused with a complexity issue while it is just a learning
issue.
Very good, I do respect the usage of a bunch of CMOS/TTL chips if 
someone doesn't want to spend the
effort of learning how to use a CPLD. When it comes to use CPUs for
tasks better done by straight logic (and there are many examples
out there) then I think it is not the right option.
All understood so let's not discuss that any further.

---


  No analog filtering of the D flipflop output is required.

Now you got me lost.

We were talking about a GPSDO, that is locking
an VCXO on the GPS time (1pps or else)
So by the end of it you need an analog
signal to control the voltage input of the VCXO. Right ?

Where you get that from ?
If not by filtering your flip-flop output
what else you have in between the 1pps and the VCXO ?
CPU's DAC's 
if so how does your complexity arguments still apply ?


Luis Cupido





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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread michael taylor
On Dec 12, 2007 7:33 AM, Luis Cupido [EMAIL PROTECTED] wrote:
 Very good, I do respect the usage of a bunch of CMOS/TTL chips if
 someone doesn't want to spend the
 effort of learning how to use a CPLD. When it comes to use CPUs for
 tasks better done by straight logic (and there are many examples
 out there) then I think it is not the right option.
 All understood so let's not discuss that any further.

Bruce also alludes to the higher jitters of CPLD versus Advanced/High
Speed CMOS logic gates (AC or HC families).

This has to do with the programmable nature of CPLD / FPGA ICs as I
understand it.
Ref: http://www.febo.com/pipermail/time-nuts/2007-April/025299.html

-Michael

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Scott Burris
Bruce Griffiths wrote:

 Do you also want a circuit for a sawtooth corrector using one of the
 Maxim/Dallas programmable delay lines?

   
Yes!  I now feel inspired to go spin a design after studying all of 
these messages in this
thread.  My only constraint is that the parts have to pass the Digikey 
test, i.e. I have to
be able to order small quantities from Digikey, Mouser, or the like.  
It's nearly impossible
for a hobbyist like me to get small quantities of more exotic parts.  
The big distributors have
gotten better in the last decade about taking small orders, but still 
often have minimum qty/piece
requirements that they won't waive.  Even worse are orderable, but 
unobtainable parts -- Maxim
seems to have a huge library of such virtual chips that have lead 
times of 1/2 year or more.

Scott


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[time-nuts] Time hackers

2007-12-12 Thread Alberto di Bene
http://www.wired.com/science/discoveries/news/2007/12/time_hackers

73  Alberto  I2PHD


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Re: [time-nuts] Big Picture View

2007-12-12 Thread John Ackermann N8UR
Keith E. Brandt, M.D. wrote:
As a relative newbie to the who time-nut scene, I'm still working on
the big picture of how all the hardware fits together. I've
successfully put together a FreeBSD box with a Garmin 18 LVC as an NTP
server and am getting consistent microsecond accuracy. I've been
looking at the next step of adding a stable oscillator to the system.
I'm not seeing how to integrate this into the system.
The way I understand it, the oscillator is there to provide a very
stable frequency reference, regardless of the type used -- VXCO,
rubidium, cesium, etc. What I'm not seeing is how you link the
frequency reference to UTC. For NTP, I'm guessing that you'd have to
sync a PPS pulse with a known time source such as GPS. Am I on the
right track? Pointers to references appreciated.
73, Keith

Hi Keith --

Frequency isn't linked to UTC; phase is.  What you're doing with an 
external oscillator is simply providing the computer with a stable clock 
frequency.  The PPS signal from the GPS provides the phase information 
that tells NTP when the second marker is.  The stable clock frequency 
just makes it easier for NTP to hold the second marker at the proper point.

Even if the reference frequency is inaccurate (and that may be the 
question your asking), NTP is still better off as it can correct for a 
frequency offset more easily than it can a clock that is erratic.

Hope this helps.

73,
John

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Luis Cupido wrote:
 Bruce,

   No analog filtering of the D flipflop output is required.

 Now you got me lost.

 We were talking about a GPSDO, that is locking
 an VCXO on the GPS time (1pps or else)
 So by the end of it you need an analog
 signal to control the voltage input of the VCXO. Right ?

 Where you get that from ?
 If not by filtering your flip-flop output
 what else you have in between the 1pps and the VCXO ?
 CPU's DAC's 
   
Some software, including a sigma delta DAC, the effect of which is no
different, in principle, than the filtering etc required by any of your
phase detector implementations.
The 1 bit phase error samples are processed in software (or hardware
depending on one's inclinations, expertise, etc) in a similar way that
samples from an N (1) phase detector samples are, to produce a digital
output for a DAC which drives the OCXO EFC input. The only difference is
that a sigma delta DAC is used instead of a conventional DAC.

 if so how does your complexity arguments still apply ?


   
The interpretation of complexity  depends on ones background and
experience.
The originator of the thread indicated that they had some microprocessor
software experience.
 Luis Cupido
   
I was trying to tailor the design to the stated strengths of the
originator of the thread.

If one is trying to squeeze the ultimate in performance when using a
GPS receiver to discipline an OCXO, then carrier phase measurements
potentially offer much higher performance than can be achieved by using
the PPS output of a typical GPS timing receiver.
However only a few commercially available GPS receivers are suitable for
this application.
The GPS receiver oscillators all have to be phase locked to the OCXO
being disciplined.
This approach has been used in at least one commercially available GPSDOCXO.
In principle a GPS receiver has all the required measurement hardware,
so all that is required are suitable algorithms implemented in either
software running on a DSP, microprocessor, etc, or implemented in
hardware (CPLD etc).

Bruce

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Re: [time-nuts] Big Picture View

2007-12-12 Thread Keith E. Brandt, M.D.
John,
That's a good start towards answering my question. Given my set-up of 
GPS referenced NTP server, how would I integrate a frequency 
reference into the system?

Keith

 As a relative newbie to the who time-nut scene, I'm still working on
 the big picture of how all the hardware fits together. I've
 successfully put together a FreeBSD box with a Garmin 18 LVC as an NTP
 server and am getting consistent microsecond accuracy. I've been
 looking at the next step of adding a stable oscillator to the system.
 I'm not seeing how to integrate this into the system.
 The way I understand it, the oscillator is there to provide a very
 stable frequency reference, regardless of the type used -- VXCO,
 rubidium, cesium, etc. What I'm not seeing is how you link the
 frequency reference to UTC. For NTP, I'm guessing that you'd have to
 sync a PPS pulse with a known time source such as GPS. Am I on the
 right track? Pointers to references appreciated.
 73, Keith

Hi Keith --

Frequency isn't linked to UTC; phase is.  What you're doing with an
external oscillator is simply providing the computer with a stable clock
frequency.  The PPS signal from the GPS provides the phase information
that tells NTP when the second marker is.  The stable clock frequency
just makes it easier for NTP to hold the second marker at the proper point.

Even if the reference frequency is inaccurate (and that may be the
question your asking), NTP is still better off as it can correct for a
frequency offset more easily than it can a clock that is erratic.

Hope this helps.

73,
John


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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Scott Burris wrote:
 Bruce Griffiths wrote:
   
 Do you also want a circuit for a sawtooth corrector using one of the
 Maxim/Dallas programmable delay lines?

   
 
 Yes!  I now feel inspired to go spin a design after studying all of 
 these messages in this
 thread.  My only constraint is that the parts have to pass the Digikey 
 test, i.e. I have to
 be able to order small quantities from Digikey, Mouser, or the like.  
 It's nearly impossible
 for a hobbyist like me to get small quantities of more exotic parts.  
 The big distributors have
 gotten better in the last decade about taking small orders, but still 
 often have minimum qty/piece
 requirements that they won't waive.  Even worse are orderable, but 
 unobtainable parts -- Maxim
 seems to have a huge library of such virtual chips that have lead 
 times of 1/2 year or more.

 Scott
   
Scott

I usually checkout the availability of parts in small quantity from such
sources, although which suppliers to check depends on your location.
Locally RS Components and Farnell are very good (they are also good
sources in Europe). I have a Digikey printed catalog with prices in my
local currency($NZ) (I have ordered a few things from them when I cant
easily get them locally). Linear Technologies on line ordering facility
works well for some of their more exotic parts and evaluation kits.

As far as I know Dallas/Maxim appears to be the only source of suitable
affordable programmable delay chips for this particular application.
In principle one could use a tapped chain of gates in a CPLD, however
continuous calibration of the delay is required (a delay locked loop
controlling the gate propagation delay by adjusting its power supply
voltage to compensate for the effect of temperature variations is one
technique). However unless the Dallas chips become hard to obtain its
probably best to leave this as a backup option.

What processor are you intending to use to decipher the sawtooth
correction messages from the GPS timing receiver?
You could use an inexpensive microprocessor dedicated to this simple task.
Another microprocessor can be used to discipline the OCXO.
Depending on your experience, this can be easier than using a single
microprocessor to do everything.

Bruce

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Re: [time-nuts] Big Picture View

2007-12-12 Thread John Ackermann N8UR
Keith E. Brandt, M.D. wrote:
 John,
 That's a good start towards answering my question. Given my set-up of 
 GPS referenced NTP server, how would I integrate a frequency 
 reference into the system?

You'd replace the crystal oscillator on the motherboard with a more 
stable reference.  The TAPR Clock-Block 
(http://www.tapr.org/kits_clock-block.html) is a synthesizer designed 
for that purpose; it can take a 5 or 10 or whatever MHz input signal and 
convert it to the clock frequency needed by the motherboard.

An example of doing this is at http://www.febo.com/pages/soekris where I 
convert a single board computer into a very precise timekeeper using a 
Clock-Block and some other hardware hacks.

John

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Re: [time-nuts] need recomendation for a portable 10mhz reference oscilator

2007-12-12 Thread SAIDJACK
 
In a message dated 12/11/2007 22:00:37 Pacific Standard Time,  
[EMAIL PROTECTED] writes:

I am  surprised surveying mode is needed anymore. In a SA environment  it
makes sense, but for me its hard to understand with the current  accuracy
given by the GPS system.

--

Björn




Hi Bjoern,
 
even with a very good M12M or M12+ receiver we will typically see some  
variation of the averaged position over it's ~3 hour (default) auto-survey  
interval. I've seen altitude change by a meter or two for example.
 
Those couple of nanoseconds may be insignificant when compared to  older GPS 
receiver performance (VP Oncore etc), but if one has the time, why  not get 
the best position average possible.
 
I did also note that it does make a difference if the Auto Survey is done  
during the day, at dawn, or during the night etc. Might be caused by multipath  
etc. A 12 hour or 24 hour Auto Survey may reduce the Diurnal effects.
 
We recently added a command to our Fury firmware that allows the user  to set 
any time from 1s to 10,000s for the Auto Survey process to finish.  This was 
done because the differences are so small between any given  single-second 
position, and an auto-surveyed position (less than 5 meters  or so). The error 
due to this is much less than 100ns which is more than  adequate for a lot of 
applications.
 
We have some customers that want the unit to do only 3 to 5 minutes of Auto  
Surveying for a particular mobile military application, and the resulting  
100ns UTC accuracy is way better than their requirement.
 
In that case the Auto Survey time is insignificant when compared to the  OCXO 
warmup time.
 
It all depends on your particular accuracy requirement.
 
bye,
Said
 
 



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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Scott Burris wrote:

 Yes!  I now feel inspired to go spin a design after studying all of 
 these messages in this
 thread.  My only constraint is that the parts have to pass the Digikey 
 test, i.e. I have to
 be able to order small quantities from Digikey, Mouser, or the like.  
 It's nearly impossible
 for a hobbyist like me to get small quantities of more exotic parts.  
 The big distributors have
 gotten better in the last decade about taking small orders, but still 
 often have minimum qty/piece
 requirements that they won't waive.  Even worse are orderable, but 
 unobtainable parts -- Maxim
 seems to have a huge library of such virtual chips that have lead 
 times of 1/2 year or more.

 Scott
   
Scott

On checking the Mouser and Digikey websites the DS1020 series
programmable delay lines are non stock items.
However I can obtain the DS1020-25 locally from RS Components.
The D1020-15 would be preferable for use with an M12M GPS timing
receiver, however the DS1020-25 could be used.

Maybe we need to consider using a CPLD or another implementation (eg
ramp generator plus DAC (8bit) and comparator).
Analog Devices used to make a single chip implementation of the ramp
plus DAC and comparator programmable delay system.
However such devices need to be calibrated, preferably continuously.
The saving grace is that with a dedicated processor, there's plenty of
time and processing power to do this once a second (between successive
PPS pulses).

Calibration technique is simple:

1) Adjust the programmed delay so that the programmed delay is exactly 1
(OCXO) clock period record the DAC data required to achieve this.

2) Adjust the programmed delay so that the programmed delay is exactly 2
(OCXO) clock periods, record the DAC data required to achieve this.

3) calculate the OFFSET and GAIN parameters from the above data.

Of course such a scheme can be elaborated to include delays greater than
a couple clock periods and exponential averaging of results can be
employed to reduce the noise.
The calibration technique assumes that the delay is a linear function of
the DAC input.
A D flipflop plus some additional logic (synchroniser) can be used to
detect coincidence between the clock edge and the output of the delay
device.

Bruce

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Re: [time-nuts] need recomendation for a portable 10mhz referenceoscilator

2007-12-12 Thread Rex Moncur
Hi Said and All

I have been following this thread with a lot of interest because my
application is also in portable Microwave operations with narrowband modes
such as WSJT.  The main issue here is not so much long term frequency
stability as one only has to find a signal in an SSB passband, but the
short-term stability should preferably be better than a few Hz over a 46
second transmission. A second issue as others have mentioned is that one
needs to have a stable signal at a new location within a relatively short
period for many rover operations (say 15 mins).

(Note: I earlier asked a question about short term stability with my Trimble
Min-T and this has been solved by increasing the Time constant from the
default value of 10 seconds to 200 seconds. The short-term stability is now
better than one part in 10^10 which is the limit to which I can measure)

Now to my Question: I note the importance of the self survey for absolute
time but I wonder if a self survey is important for accurate frequency where
the absolute time is not an issue?

There are number of things that it seems one could do to achieve frequency
stability as fast as possible at a new location.

1. Run the Oven off batteries full time - this can be typically only 3 to 5
watts - for the Mini-T or the Fury.
2. Record the EFC voltage at the home location and insert this in software
as starting point at the portable location.
3. Insert the position information in software of the portable location as a
staring point.
4. As Said suggests run a short self survey of only a few minutes.

Now I am not sure which of any of the above points are necessary or
important but I would be grateful for the thoughts of others.

Regards Rex VK7MO



We have some customers that want the unit to do only 3 to 5 minutes of Auto

Surveying for a particular mobile military application, and the resulting  
100ns UTC accuracy is way better than their requirement.
 
In that case the Auto Survey time is insignificant when compared to the
OCXO 
warmup time.
 
It all depends on your particular accuracy requirement.
 
bye,
Said
 
 



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Re: [time-nuts] need recomendation for a portable 10mhz referenceoscilator

2007-12-12 Thread SAIDJACK
 
In a message dated 12/12/2007 14:11:50 Pacific Standard Time,  
[EMAIL PROTECTED] writes:

Now  I am not sure which of any of the above points are necessary  or
important but I would be grateful for the thoughts of  others.

Regards Rex VK7MO





Hi Rex,
 
that's a lot of great information! Since you are not too concerned about  
overall frequency accuracy (I assume 1 to 5E-09 would be acceptable) you may 
not  
need to or want to lock to GPS at all. With a typical OCXO retrace of 5E-09 
you  would have a (fairly stable) frequency offset of 235Hz or so at 47GHz.
 
As you mentioned your requirement to be ~2Hz deviation at 47GHz this  
calculates to about 4.3E-011 stability over 46 seconds.
 
GPS itself cannot deliver that, but a good OCXO flywheel will do that. Any  
GPSDO with ADEV better than 5E-011 should be sufficient locked to GPS or not,  
but you may have to keep the oven on at all times as you said.
 
Tom measured the Fury's ADEV (double oven) to achieve this performance  above 
measurement intervals of 0.01 seconds already so that should work really  
well, and in this short time frame (46 seconds) it's pretty much all up to the  
OCXO (aging and tempco correction by the processor should not be a factor at 
46s  intervals either).
 
Thus a good MTI double oven OCXO should do the trick for you and GPS  locking 
is not really needed, except maybe for getting initial frequency  accuracy.
 
The advantage of this is that a typical MTI Eurocan double-oven OCXO  
consumes only about 1.7W and can thus be safely and easily powered by a car  
battery.
 
bye,
Said
 
 
 
 



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Re: [time-nuts] need recomendation for a portable 10mhz referenceoscilator

2007-12-12 Thread Bruce Griffiths
Rex Moncur wrote:
 Hi Said and All

 I have been following this thread with a lot of interest because my
 application is also in portable Microwave operations with narrowband modes
 such as WSJT.  The main issue here is not so much long term frequency
 stability as one only has to find a signal in an SSB passband, but the
 short-term stability should preferably be better than a few Hz over a 46
 second transmission. A second issue as others have mentioned is that one
 needs to have a stable signal at a new location within a relatively short
 period for many rover operations (say 15 mins).

 (Note: I earlier asked a question about short term stability with my Trimble
 Min-T and this has been solved by increasing the Time constant from the
 default value of 10 seconds to 200 seconds. The short-term stability is now
 better than one part in 10^10 which is the limit to which I can measure)

 Now to my Question: I note the importance of the self survey for absolute
 time but I wonder if a self survey is important for accurate frequency where
 the absolute time is not an issue?

 There are number of things that it seems one could do to achieve frequency
 stability as fast as possible at a new location.

 1. Run the Oven off batteries full time - this can be typically only 3 to 5
 watts - for the Mini-T or the Fury.
 2. Record the EFC voltage at the home location and insert this in software
 as starting point at the portable location.
 3. Insert the position information in software of the portable location as a
 staring point.
 4. As Said suggests run a short self survey of only a few minutes.

 Now I am not sure which of any of the above points are necessary or
 important but I would be grateful for the thoughts of others.

 Regards Rex VK7MO
   
Rex

If you make provision for multiple power sources with preassigned
priority its not necessary to run of a battery all the time, however the
battery needs to be present as a backup when the other power supplies
are disconnected.

Achieving this without disturbing the power supply voltages when
switching between various power sources requires careful design, a
simple diode OR circuit is in general inadequate particularly if more
than 2 sources (mains, external dc, internal battery) are available,
however the required circuity need not be overly complex.

Bruce


Bruce

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Scott Burris
Bruce Griffiths wrote:

 As far as I know Dallas/Maxim appears to be the only source of suitable
 affordable programmable delay chips for this particular application.
 In principle one could use a tapped chain of gates in a CPLD, however
 continuous calibration of the delay is required (a delay locked loop
 controlling the gate propagation delay by adjusting its power supply
 voltage to compensate for the effect of temperature variations is one
 technique). However unless the Dallas chips become hard to obtain its
 probably best to leave this as a backup option.
   
What about sending the 1PPS signal through a number of HC family gates 
and using a mux
to select a tap -- is that better than using a CPLD? Hmm, probably the 
delay varies too much from manufacturer to manufacturer
to make this work reliably.  Probably temperature sensitive too.

What kind of delay characteristics are needed?  I see some other delay 
lines with 100ps
steps available, see:

http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=408-1127-ND

and put that through a mux?

Looks like some of the DS1020's are available through Maxim's e-commerce 
site, but some have
a 15 week lead time, depending on the particular model.
 What processor are you intending to use to decipher the sawtooth
 correction messages from the GPS timing receiver?
 You could use an inexpensive microprocessor dedicated to this simple task.
 Another microprocessor can be used to discipline the OCXO.
 Depending on your experience, this can be easier than using a single
 microprocessor to do everything.

   
I have experience with PICs, Atmel AVRs, and various ARM flavors, and 
limited experience
with SOC processors in Xilinx FPGAs (Picoblaze and the like).  PICs and 
AVRs are cheap, so no problem
dedicating one to this task.

Anyone have a list of GPS units which provide sawtooth correction data?  
I have a few flavors of
Motorola products and a Trimble Lassen IQ laying around.  They all 
provide 1PPS signals, but I bet
some don't have the necessary features.

Scott

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Luis Cupido
Hi Michael,

Yes that may be true (but I did not test any of that...)
Well... with digital prog. logic devices that operate
at similar speed than HC and AC should be true yes.
On the fast CPLDs that run past 300MHz the jitter
should have scale down proportionally (I imagine)
but I have no clue if that is similar, better or still
worst than HC or AC.

Yeap... Nice thing to test
Hummm... I'm still thinking how to test such... :-)

Luis Cupido.
ct1dmk.




michael taylor wrote:
 On Dec 12, 2007 7:33 AM, Luis Cupido [EMAIL PROTECTED] wrote:
 Very good, I do respect the usage of a bunch of CMOS/TTL chips if
 someone doesn't want to spend the
 effort of learning how to use a CPLD. When it comes to use CPUs for
 tasks better done by straight logic (and there are many examples
 out there) then I think it is not the right option.
 All understood so let's not discuss that any further.
 
 Bruce also alludes to the higher jitters of CPLD versus Advanced/High
 Speed CMOS logic gates (AC or HC families).
 
 This has to do with the programmable nature of CPLD / FPGA ICs as I
 understand it.
 Ref: http://www.febo.com/pipermail/time-nuts/2007-April/025299.html
 
 -Michael
 
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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Luis Cupido
Ok. I understand now what you suggest.
Thanks for the explanation.

Luis Cupido.
ct1dmk.




Bruce Griffiths wrote:
 Luis Cupido wrote:
 Bruce,

   No analog filtering of the D flipflop output is required.

 Now you got me lost.

 We were talking about a GPSDO, that is locking
 an VCXO on the GPS time (1pps or else)
 So by the end of it you need an analog
 signal to control the voltage input of the VCXO. Right ?

 Where you get that from ?
 If not by filtering your flip-flop output
 what else you have in between the 1pps and the VCXO ?
 CPU's DAC's 
   
 Some software, including a sigma delta DAC, the effect of which is no
 different, in principle, than the filtering etc required by any of your
 phase detector implementations.
 The 1 bit phase error samples are processed in software (or hardware
 depending on one's inclinations, expertise, etc) in a similar way that
 samples from an N (1) phase detector samples are, to produce a digital
 output for a DAC which drives the OCXO EFC input. The only difference is
 that a sigma delta DAC is used instead of a conventional DAC.
 
 if so how does your complexity arguments still apply ?


   
 The interpretation of complexity  depends on ones background and
 experience.
 The originator of the thread indicated that they had some microprocessor
 software experience.
 Luis Cupido
   
 I was trying to tailor the design to the stated strengths of the
 originator of the thread.
 
 If one is trying to squeeze the ultimate in performance when using a
 GPS receiver to discipline an OCXO, then carrier phase measurements
 potentially offer much higher performance than can be achieved by using
 the PPS output of a typical GPS timing receiver.
 However only a few commercially available GPS receivers are suitable for
 this application.
 The GPS receiver oscillators all have to be phase locked to the OCXO
 being disciplined.
 This approach has been used in at least one commercially available GPSDOCXO.
 In principle a GPS receiver has all the required measurement hardware,
 so all that is required are suitable algorithms implemented in either
 software running on a DSP, microprocessor, etc, or implemented in
 hardware (CPLD etc).
 
 Bruce
 
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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Scott
Scott Burris wrote:
 Bruce Griffiths wrote:
   
 As far as I know Dallas/Maxim appears to be the only source of suitable
 affordable programmable delay chips for this particular application.
 In principle one could use a tapped chain of gates in a CPLD, however
 continuous calibration of the delay is required (a delay locked loop
 controlling the gate propagation delay by adjusting its power supply
 voltage to compensate for the effect of temperature variations is one
 technique). However unless the Dallas chips become hard to obtain its
 probably best to leave this as a backup option.
   
 
 What about sending the 1PPS signal through a number of HC family gates 
 and using a mux
 to select a tap -- is that better than using a CPLD? Hmm, probably the 
 delay varies too much from manufacturer to manufacturer
 to make this work reliably.  Probably temperature sensitive too.

   
All of the above, however the major problems are that the individual
gate delay is too long and the designing a suitable multiplexer isnt easy.
I dont think that cascading 30 or more 1ns delay gates all in different
packages is going to work that well.
CPLDs have the advantage that to a first approximation all the gate
delays are identical.
However you have to force the configuration to interconnect them
appropriately software so as not to spoil the performance.
 What kind of delay characteristics are needed?  I see some other delay 
 lines with 100ps
 steps available, see:

   
With an M12+T you need a minimum variable delay range of about 20ns or
so with a step size, accuracy and stability of better than 1ns
(resolution of sawtooth correction message) to avoid degrading performance.
Tom Clark suggested that the DS1020-15 with 150ps resolution is OK for
this receiver, however it needs to be calibrated over the delay range used.
Other receivers (particularly older ones) will need larger delay ranges.
The required delay range is around 0.5 to 1x  the receiver timing clock
period for the Motorola receivers.
Autocalibration techniques can be used to track the effects of
temperature and aging.
 http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail?name=408-1127-ND

 and put that through a mux?
   
In principle this would work, the devil lies in the detail of the mux
design.
The mux delay needs to be independent of the selected tap.
The delay range provided by one of these devices is too small.
As a fallback option I have produced a draft schematic of a ramp style
delay generator with a resolution of 100ps and a range of 400ns or so.
The extended range allows calibration against a 10MHz OCXO derived clock
and should allow it to be used with most of the older Motorola Timing
receivers that provide sawtooth correction data.
Such calibrations can be interleaved between successive PPS pulses.
A 12 bit resolution DAC with a settling time (to 0.01%) of around
100millisec or so is required for this DAC.
It may be feasible to use a PWM DAC for this.
 Looks like some of the DS1020's are available through Maxim's e-commerce 
 site, but some have
 a 15 week lead time, depending on the particular model.
   
 What processor are you intending to use to decipher the sawtooth
 correction messages from the GPS timing receiver?
 You could use an inexpensive microprocessor dedicated to this simple task.
 Another microprocessor can be used to discipline the OCXO.
 Depending on your experience, this can be easier than using a single
 microprocessor to do everything.

   
 
 I have experience with PICs, Atmel AVRs, and various ARM flavors, and 
 limited experience
 with SOC processors in Xilinx FPGAs (Picoblaze and the like).  PICs and 
 AVRs are cheap, so no problem
 dedicating one to this task.

 Anyone have a list of GPS units which provide sawtooth correction data?  
 I have a few flavors of
 Motorola products and a Trimble Lassen IQ laying around.  They all 
 provide 1PPS signals, but I bet
 some don't have the necessary features.

   
M12MT, M12+T, Trimble  Resolution-T all provide sawtooth correction data.
 Scott
   



Bruce

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[time-nuts] SVN37 offline

2007-12-12 Thread Jeff Mock
I'm sure you all noticed, SVN37 (PRN07) went offline today.  I tracked 
it yesterday afternoon, but it is gone today:

http://www.mock.com/test/z3801a/

Looks like it might be gone for good, now we only have 29 GPS satellites 
online...
ftp://tycho.usno.navy.mil/pub/gps/gps.txt

jeff


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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Scott

Data delay devices (http://www.datadelay.com) also do programmable delay
lines their minimum order is $US75 which isnt too bad particularly if
more than one sawtooth corrector is to be built.
They even do ECL programmable delays as do Micrel (http://www.micrel.com).
However these ECL programmable delay devices dont have enough range for
this application.

If you solve the multiplexer problem and use embedded calibration you
could use circuit board traces to implement the delay line sections,
however a lot of PCB real estate would be required.
Such delays also have significant tempcos when using fibre glass PCB
substrates.

Bruce

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread michael taylor
On Dec 12, 2007 2:32 AM, Bruce Griffiths [EMAIL PROTECTED] wrote:
 Michael

 The analog circuitry for a sigma-delta DAC is attached.
 The input is optically isolated using a high speed low jitter CMOS
 optocoupler (Avago produce an equivalent device) to break low frequency
 ground loops.

I was wondering if the Avago HCPL-9000 or Analog's ADUM1100 iCoupler
would be suitable alternatives to the HCPL-7100.

 Similarly an RF transformer should be used to couple the OCXO output to
 the Digital board breaking another potential low frequency ground loop.

For the RF transformer I am considering a Coilcraft WB1-6(S)L
transformer to decouple the OCXO output.
http://www.coilcraft.com/wb_th.cfm

I want to do some more reading, but I think I'm might have some
questions about DAC input data (from the microprocessor).

Would there be any problems, or benefits to using AHC versus AC logic
family flipflops and the inverting Schmitt triggers?

In regards to the sawtooth correction, I am undecided. If I understand
correctly, even without not addressing it there should be an
improvement over existing public designs (Shera, Miller). If I
remember correctly, you were keen on a software/firmware based
sawtooth approach, if so that might be more flexible and cheaper than
fiddling with a uncalibrated DS1020 delay line.

Thank you,
 Michael

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Re: [time-nuts] SVN37 offline

2007-12-12 Thread Chris Kuethe
On Dec 12, 2007 8:55 PM, Jeff Mock [EMAIL PROTECTED] wrote:
 I'm sure you all noticed, SVN37 (PRN07) went offline today.  I tracked
 it yesterday afternoon, but it is gone today:

 http://www.mock.com/test/z3801a/

 Looks like it might be gone for good, now we only have 29 GPS satellites
 online...
 ftp://tycho.usno.navy.mil/pub/gps/gps.txt

There's a chance it'll come back, though it's SVN suggests that maybe
it's getting old and tired. It did go active 14.5 yrs ago... maybe
they just want cut the springs, bolt a wing on the back and add some
racing stripes?

NANU 2007010 - SVN27 offline 1hr
NANU 2007166 - SVN32 offline 45min
NANU 2007123 - SVN41 offline 5hr
NANU 2007115 - SVN32 offline 3hr
NANU 2007111 - SVN40 offline 3.5wk

does any of this correlate with some orbital maneuvering?

CK

-- 
GDB has a 'break' feature; why doesn't it have 'fix' too?

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Re: [time-nuts] is there a best bet advanced hobbyist buildable GPSDOdesign?

2007-12-12 Thread Bruce Griffiths
Michael
michael taylor wrote:
 On Dec 12, 2007 2:32 AM, Bruce Griffiths [EMAIL PROTECTED] wrote:
   
 Michael

 The analog circuitry for a sigma-delta DAC is attached.
 The input is optically isolated using a high speed low jitter CMOS
 optocoupler (Avago produce an equivalent device) to break low frequency
 ground loops.
 

 I was wondering if the Avago HCPL-9000 or Analog's ADUM1100 iCoupler
 would be suitable alternatives to the HCPL-7100.

   
Check the jitter, no jitter specs given for the iCouplers.
You may have to measure it on a sample.

The HCPL9000 should be fine but measure the jitter.
Circuit is actually reasonably tolerant to jitter as the low pass filter
averages such effects over many cycles.
If jitter proves a problem then if the micro or other logic generating
the sigma delta DAC bit-stream is clocked by the OCXO a D flipflop can
be used to retime the bitstream after the optocoupler/isolator reducing
the bit stream jitter to a few tens of picoseconds or so.
 Similarly an RF transformer should be used to couple the OCXO output to
 the Digital board breaking another potential low frequency ground loop.
 

 For the RF transformer I am considering a Coilcraft WB1-6(S)L
 transformer to decouple the OCXO output.
 http://www.coilcraft.com/wb_th.cfm
   
Probably OK although there appear to be no VSWR specs for these.
 I want to do some more reading, but I think I'm might have some
 questions about DAC input data (from the microprocessor).

 Would there be any problems, or benefits to using AHC versus AC logic
 family flipflops and the inverting Schmitt triggers?
   
Whilst HC logic performance is adequate there is probably not too much
harm in using AHC or even AC as long as you use a ground plane together
with suitable layout techniques.
Metastability rates would go down by a large factor however the rate
with HC logic should be well below once every 1E10 years.
 In regards to the sawtooth correction, I am undecided. If I understand
 correctly, even without not addressing it there should be an
 improvement over existing public designs (Shera, Miller). If I
 remember correctly, you were keen on a software/firmware based
 sawtooth approach, if so that might be more flexible and cheaper than
 fiddling with a uncalibrated DS1020 delay line.

   
Depends on the entire system cost a single chip programmable delay plus
a D flipflop and little else should be cheaper than most high resolution
phase detector approaches.
As long as one can calibrate the DS1020 to improve its performance over
the datasheet specs. If it is sufficient to do this once (using a 5370
or equivalent) then the cost may be lower.
There are a lot of legacy devices/systems in use that actually require a
low jitter PPS pulse.

Most phase detectors with resolution, stability and accuracy better than
1ns (needs to be better than 500ps or so avoid significantly degrading
the quality of the correction) also require calibration unless one has a
suitable (2??) GHz clock (or equivalent) locked to the OCXO being
disciplined.
1ns accuracy and stability are perhaps easier to achieve when using a
sampled quadrature pair sine wave interpolator but even this requires
significant support logic to facilitate measuring harmonic content ,
quadrature error etc.
 Thank you,
  Michael

   
Bruce

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