On Mon, 25 Mar 2013 00:43:02 -0400
Daniel Schultz n8...@usa.net wrote:
Another great ham passes on, I'm sorry I never had a chance to meet him.
Definitly a sad day
Is the GPS controller that Brooks published still useful today, or has it been
superseded by something newer?
That highly
I think Brooks' design is worth studying. It is simple enough and
uses 20 year old technology so even use old folks can follow how it
works. Then you go off and build something else using current parts
I have one of those cheaper Rb units too. But you set them by sending
a command over the
Chris,
Can you point me to the web site where the TI Launch Pad is sold for $5
including
shipping ?
Thank you,
BillWB6BNQ
Chris Albertson wrote:
snip
I plan to use a $5 TI Launch Pad. But
basically the same over all ideas he used. At $5 each with shipping
included TI is losing
Hello Bill.
Here link : http://www.ti.com/ww/en/launchpad/overview_head.html
10 - 13$ TI kits.
Regards.
-Original Message-
From: time-nuts-boun...@febo.com [mailto:time-nuts-boun...@febo.com] On
Behalf Of WB6BNQ
Sent: Monday, March 25, 2013 10:01 AM
To: Discussion of precise time and
Brooks GPSDO may be 15 years old but is still perfect for today's
applications. If you look at tvb's Tbolt plot or Ulrich's plots with and
without
sawtooth correction for a day or two the limit is GPS. The basic unit has a
resolution of 1.73 E-13 in mode 7. Brooks uses a 40 bit filter. I
The lack of synchronisers when crossing clock domains is a design flaw
that should be corrected.
Bruce
ewkeh...@aol.com wrote:
Brooks GPSDO may be 15 years old but is still perfect for today's
applications. If you look at tvb's Tbolt plot or Ulrich's plots with and without
sawtooth correction
Bruce, would you mind being more specific and offer a solution.
Thanks Bert Kehren
In a message dated 3/25/2013 7:09:41 A.M. Eastern Daylight Time,
bruce.griffi...@xtra.co.nz writes:
The lack of synchronisers when crossing clock domains is a design flaw
that should be corrected.
Bruce
On Mon, 25 Mar 2013 07:53:40 -0400 (EDT)
ewkeh...@aol.com wrote:
In a message dated 3/25/2013 7:09:41 A.M. Eastern Daylight Time,
bruce.griffi...@xtra.co.nz writes:
The lack of synchronisers when crossing clock domains is a design flaw
that should be corrected.
Bruce, would you
On 3/24/13 8:22 PM, Chris Albertson wrote:
On Sun, Mar 24, 2013 at 7:34 PM, EB4APL eb4...@cembreros.jazztel.es wrote:
I wanted to build a GPSDO using the Brooks Shera design since I read the QST
article. I asked him in Jan 2009 about his source code, because I wanted to
change the PIC to a
Let's get everyone on the same page:
http://www.microsoft.com/en-us/windows/endofsupport.aspx
Also, do we all have the latest updates?
That being said even with all the updates, my daughter missed the bus
this AM, because my WinXP machine said it was 7:01 am EST, when in fact
my phone told me
The lack of synchronisers when crossing clock domains is a design flaw
that should be corrected.
Bruce
I think with these it becomes obvious where the problem lies and what
the solution is.
Attila Kinali
I realize there are many cases where clock domain considerations are important.
I'm possibly looking for a 40 MHz source and I know some of the
rubidiums are programmable. But can any of the affordable ones be
programmed to work at 40.0 MHz?
I was looking for a source to drive this 144 MHz - 10 GHz transceiver.
http://www.chris-bartram.co.uk/products.html
The TCXO
Let's get everyone on the same page:
http://www.microsoft.com/en-us/windows/endofsupport.aspx
Also, do we all have the latest updates?
That being said even with all the updates, my daughter missed the bus
this AM, because my WinXP machine said it was 7:01 am EST, when in fact
my phone told me
On 3/25/13 7:17 AM, David Kirkby wrote:
I'm possibly looking for a 40 MHz source and I know some of the
rubidiums are programmable. But can any of the affordable ones be
programmed to work at 40.0 MHz?
I was looking for a source to drive this 144 MHz - 10 GHz transceiver.
On 25 March 2013 13:36, Jim Lux jim...@earthlink.net wrote:
On 3/24/13 8:22 PM, Chris Albertson wrote:
This is a perfect example of why people need to publish the source.
Make it GPL or whatever.
That's a decision that the author gets to make. I've been on both the
supplier and consumer
On Mon, Mar 25, 2013 at 5:44 AM, Attila Kinali att...@kinali.ch wrote:
On Mon, 25 Mar 2013 07:53:40 -0400 (EDT)
ewkeh...@aol.com wrote:
In a message dated 3/25/2013 7:09:41 A.M. Eastern Daylight Time,
bruce.griffi...@xtra.co.nz writes:
The lack of synchronisers when crossing clock domains
On Mon, Mar 25, 2013 at 6:36 AM, Jim Lux jim...@earthlink.net wrote:
The algorithms are well known and understood, and not very complex. Perhaps
starting from scratch wouldn't be a bad thing if you're going to an entirely
new platform.
They are well known to people who already know. If you
A system like that would protect the author, but ensure that in the
event of their death, the code is public. That license could be GPL,
freeware of whatever else the author choses. I suspect Brooks Shera
would have agreed to do something like that.
We don't have to guess. Brooks wrote near
Hi
One key point in an earlier reference:
...Brooks made 300 pre-programmed (PIC) chips for people..
I'm sure I didn't get that exactly verbatim, but 300 is the number
mentioned. We could debate endlessly weather the number is accurate or not,
for the moment assume it's correct.
The cost of
On Mon, Mar 25, 2013 at 2:56 PM, Tom Van Baak t...@leapsecond.com wrote:
I realize there are many cases where clock domain considerations are
important. But why does it matter in a device that is simply doing long-term
1PPS statistical sampling?
Could one of you clock domain specialists
Thomas Cheney, October 1979:
In closing, there is a great deal of theoretical and experimental
evidence that a region of anomalous behavior exists for every device
that has two stable states. The maturity of this topic is now such that
papers making contrary claims without theoretical or
On 25 March 2013 14:36, Jim Lux jim...@earthlink.net wrote:
On 3/25/13 7:17 AM, David Kirkby wrote:
The TCXO oscillator is off the board and a separate item, but costs
£40 and then one ideally wants to lock that to a more precise source.
The oscillator will lock to an external 10 MHz source,
Epic fail:
Not fancy SPICE simulations.
Note there are many situations where you force the result (if you call
hysteresis a biased scheme) simply because to do otherwise is a more serious
problem.
-Original Message-
From: Azelio Boriani azelio.bori...@screen.it
Sender:
Dave
I think you're going down the right road with the Chris Bartram transceiver.
My suggestion for a 40MHz source would be to take a 10MHz source and
feed it into two successive doublers, with a bit of inter-stage and
post-stage buffering and filtering.
Frequency doublers can be very
On Mon, 25 Mar 2013 06:56:30 -0700
Tom Van Baak t...@leapsecond.com wrote:
I think with these it becomes obvious where the problem lies and what
the solution is.
I realize there are many cases where clock domain considerations are
important. But why does it matter in a device that is
Actually, most modern FFs are hardened against metastability so often a
single synchronizer will do especially if it is feeding a synchronous
circuit.
David
On 3/25/13 1:56 PM, Attila Kinali wrote:
On Mon, 25 Mar 2013 06:56:30 -0700
Tom Van Baak t...@leapsecond.com wrote:
I think with
On Mon, 25 Mar 2013 18:56:34 +0100
Attila Kinali att...@kinali.ch wrote:
Because of this, the behaviour of the
counter is undefined and can lead not only to missing one count (which
would be caught by the PI control loop as additional noise), but the output
of the D-flip flops in the counter
Hello,
I am deeply affected by Brookes Shera' s death.
Years ago I had only a few mail-contacts with him and he's been very
helpful and friendly.
I believe that he would have assisted to introduce improvements and
further details in his design if he would have been able to.
He did provide me
Because, up until today, windows time did what I needed it to do. It may
still, if the fault turns out to be network related.
In reality, it's more software to learn to administer, and setup and run
on bunch of PC's. As a time nut, I know exactly how much time I need for
all of my other
On Mon, 25 Mar 2013 09:23:21 -0700
Chris Albertson albertson.ch...@gmail.com wrote:
On Mon, Mar 25, 2013 at 6:36 AM, Jim Lux jim...@earthlink.net wrote:
The algorithms are well known and understood, and not very complex. Perhaps
starting from scratch wouldn't be a bad thing if you're going
Ie the output of the counter becomes
(more or less) random. Which in turn means the lower 4 bit of the
input to the PI control loop are wrong[1]. Or in terms of time, we
might be off by +/-2^4*42ns=672ns, which is a major hit against the
PI loop (like knocking it with a sledge hammer).
But
On Mon, 25 Mar 2013 14:03:23 -0400
David McGaw n1...@alum.dartmouth.org wrote:
Actually, most modern FFs are hardened against metastability so often a
single synchronizer will do especially if it is feeding a synchronous
circuit.
I would not count on that. Most 74xx that hobbyists use are
On Mon, 25 Mar 2013 11:18:06 -0700
Chris Albertson albertson.ch...@gmail.com wrote:
Ie the output of the counter becomes
(more or less) random. Which in turn means the lower 4 bit of the
input to the PI control loop are wrong[1]. Or in terms of time, we
might be off by +/-2^4*42ns=672ns,
There is a company Death Switch which offers a service which sends out an email
or multiple emails upon your demise or incapacitation
The basic idea if you keep sending the service keepalives it does not send the
email. Sort of like a dead mans switch on a locomotive
Sent from my iPhone
On
Minimum clock width is not the window for metastability. That is
usually 10s to 100s of picoseconds.
On 3/25/13 3:20 PM, Attila Kinali wrote:
On Mon, 25 Mar 2013 11:18:06 -0700
Chris Albertson albertson.ch...@gmail.com wrote:
Ie the output of the counter becomes
(more or less) random.
S/LS logic was introduced in the mid 70's, F/AS/ALS around 1980, HC was
early 80's. By the third 7400 generation (F/AS/ALS) the problem was
well known with parameters available and the logic fairly hard to it.
On 3/25/13 2:56 PM, Attila Kinali wrote:
On Mon, 25 Mar 2013 14:03:23 -0400
David
There are essentially 4 clock domains in the circuit
1) PPS
2) Divided down 10MHz (~300kHz)
3) 24 MHz
4) The microprocessor internal clock ( the micro probably has internal
synchronisers for at least some external inputs).
Depending on internal delays and jitter this may be regarded as
On Mon, Mar 25, 2013 at 12:20 PM, Attila Kinali att...@kinali.ch wrote:
The PPS signal is not sent direct to the 74HC4520. The PPS first
drives Phase Detector 3 that is built into the 4046 chip. this is
an RS flip flop. Notice it is RS3 OUT that drives the 4520.RS3
uses both the PPS signal
On Mon, Mar 25, 2013 at 12:45 PM, David McGaw n1...@alum.dartmouth.org wrote:
S/LS logic was introduced in the mid 70's, F/AS/ALS around 1980, HC was
early 80's. By the third 7400 generation (F/AS/ALS) the problem was well
known with parameters available and the logic fairly hard to it
I
Both edges of the 24MHz clock gating pulse are asynchronous with respect
to the signal being gated.
Metastability can result with clock pulse widths that lie within a
critical range.
Bruce
Chris Albertson wrote:
On Mon, Mar 25, 2013 at 12:45 PM, David McGawn1...@alum.dartmouth.org wrote:
Hi
With the 24 MHz clock in the circuit, and the logic families shown, the most
likely metastability issues are edge rather than clock pulse width related.
When you hit the magic window (think picoseconds) there is a probability
of going metastable. It's not a 100% thing. Even with multiple
Because, up until today, windows time did what I needed it to do. It may
still, if the fault turns out to be network related.
In reality, it's more software to learn to administer, and setup and run
on bunch of PC's. As a time nut, I know exactly how much time I need for
all of my other hobbies,
First off we have the answer. This thing works very reliably well.
The question is why?
In the normal steady state case the phase of the VCXO is held to be
1024/24,000,000 seconds. This means the plus from pin 15 of the 4046
would be about 4,000 nanoseconds long and would never be anything so
n1...@alum.dartmouth.org said:
S/LS logic was introduced in the mid 70's, F/AS/ALS around 1980, HC was
early 80's. By the third 7400 generation (F/AS/ALS) the problem was well
known with parameters available and the logic fairly hard to it.
The problem is well understood in the right
Hi
In normal operation, the counter is clocking back and forth across the 1024 /
24,000,000 boundary. It has to do this for the control loop to see anything.
Put another way, if it's always 1024 / 24,000,000 the loop does nothing at all.
It's the race between things like enable and clock or
I have version 1.34a that he sent me in 2008. In light of his wishes,
please contact me directly if you would like a copy.
David
On 3/24/13 7:12 AM, Stephen Tompsett (G8LYB) wrote:
Here's a copy of the source package (that claims to be for version
1.28) that he sent me when I enquired about
Hi
The reason you don't see MTBF's is that they are indeed hard to find. Even the
formulas that come up with them are not particularly easy to deal with. What
they very much want you to do is to spend big bucks on the analysis program and
the data to drive it.
To put some numbers on it:
At
On Mon, 25 Mar 2013 14:56:25 -0700, Hal Murray
hmur...@megapathdsl.net wrote:
n1...@alum.dartmouth.org said:
S/LS logic was introduced in the mid 70's, F/AS/ALS around 1980, HC was
early 80's. By the third 7400 generation (F/AS/ALS) the problem was well
known with parameters available and
Both edges of the 24MHz clock gating pulse are asynchronous with respect
to the signal being gated.
Metastability can result with clock pulse widths that lie within a
critical range.
Bruce
I don't disagree with your statement above, but my question was -- does it
matter in a GPSDO; does
On Mon, Mar 25, 2013 at 3:02 PM, Bob Camp li...@rtty.us wrote:
Hi
In normal operation, the counter is clocking back and forth across the 1024 /
24,000,000 boundary. It has to do this for the control loop to see
anything. Put another way, if it's always 1024 / 24,000,000 the loop does
On Mon, Mar 25, 2013 at 3:41 PM, Chris Albertson
albertson.ch...@gmail.com wrote:
In normal operation, the counter is clocking back and forth across the 1024
/ 24,000,000 boundary. It has to do this for the control loop to see
anything. Put another way, if it's always 1024 / 24,000,000 the
Tom Van Baak wrote:
Both edges of the 24MHz clock gating pulse are asynchronous with respect
to the signal being gated.
Metastability can result with clock pulse widths that lie within a
critical range.
Bruce
I don't disagree with your statement above, but my question was -- does it
There is an AMD patent where they actually drive the input pin to make it
decide rather than hang. I have no first hand knowledge with the design (well
other than knowing the designer) since I couldn't use the scheme in my own
designs.
-Original Message-
From: Bob Camp li...@rtty.us
Hi
The gotcha with using the XO as a spreading source is the hanging bridge
issue. As long as temperature (or what ever) is constantly changing the XO all
the averaging stuff works out. A GPS with a sawtooth output (and no correction)
is doing the same thing. The problem comes in when the XO
As to the latest code Brooks did not release compiled or ASM code. Prior
codes where released with an agreement. In due time his wife Karen Stoll will
make a decision that will satisfy time nuts.
Stay tuned.
Bert Kehren
In a message dated 3/25/2013 6:13:56 P.M. Eastern Daylight Time,
Hi Tom,
In the Shera design the instability of the XO timebase is
a key factor in improving the 30-second update resolution.
With the XO drift varying the sample point across the 1PPS
and 312.5 KHz edges the samples are constantly varying and
the average of the samples has a resolution much
Richard H McCorkle wrote:
Hi Tom,
In the Shera design the instability of the XO timebase is
a key factor in improving the 30-second update resolution.
With the XO drift varying the sample point across the 1PPS
and 312.5 KHz edges the samples are constantly varying and
the average of the samples
Hi
Using the GPS sawtooth as a source of randomness is dangerous. It can stop
moving for minutes at a time if the conditions happen to be just right (or in
this case wrong). Of course lack of randomization isn't your only problem when
this happens. The (likely substantial) offset in the data
Hello Dave,
The problem I experienced with a Rb at 10 MHz stabilizing a AD6IW PLL at
106.5 MHz
for a DB6NT 10 GHz G2 transverter,
was the significant microphonics after multiplication.
The original xtal oscillator did not have microphonics, but would drift.
My solution was to add a ISO-Temp
li...@rtty.us said:
If the data is changing as the clock fires, the flip flop oscillates rather
than goes to a single state.
It may not oscillate. Some sit at halfway and then wander off, slowly at
first but with an exponential speedup.
The usual way to describe metastability is how much
On 3/25/13 8:27 AM, David Kirkby wrote:
On 25 March 2013 14:36, Jim Lux jim...@earthlink.net wrote:
On 3/25/13 7:17 AM, David Kirkby wrote:
The TCXO oscillator is off the board and a separate item, but costs
£40 and then one ideally wants to lock that to a more precise source.
The oscillator
Bob,
You are preaching to the choir and although Brooks felt that
using an XO and asynchronous gating to improve the resolution
was sufficient and GPS sawtooth correction was not needed with
the long averaging times in his controller that doesn't mean
that I agreed. The early work I did just
Dan (I think) writes:
Because, up until today, windows time did what I needed it to do. It may
still, if the fault turns out to be network related.
In reality, it's more software to learn to administer, and setup and run
on bunch of PC's. As a time nut, I know exactly how much time I need
albertson.ch...@gmail.com said:
I think you can get Windows to run at the few milliseconds of error range
with the standard NTP distribution.
I assume you are talking about getting time from the net rather than a local
GPS/GPSDO or such.
The accuracy depends upon your network connection
Please tell us if I am parsing the content of your message correctly
with my inserted comments.
On 3/25/2013 9:09 AM, Stan, W1LE wrote:
Hello Dave,
The problem I experienced with a Rb at 10 MHz stabilizing a AD6IW PLL
at 106.5 MHz
for a DB6NT 10 GHz G2 transverter,
I assume by stabilizing
On Mon, Mar 25, 2013 at 9:05 PM, Anthony G. Atkielski
anth...@atkielski.com wrote:
I've been using the standard NTP client in Windows XP for ages, and it
works just fine. I tried third-party stuff. It was just more work for
no apparent gain. The XP desktop is synchronized with my NTP server
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