Re: [time-nuts] Range of Sawtooth values?

2014-03-10 Thread Hal Murray

albertson.ch...@gmail.com said:
 The M12 user manual hints at why, they say the newer receiver runs on a
 faster internal clock. 

Roughly, it's going to be within 1/2 clock cycle.  If newer units have faster 
clocks, the peak-peak sawtooth should be smaller.


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Re: [time-nuts] Range of Sawtooth values?

2014-03-10 Thread Bob Camp
Hi

If you watch long enough and know the clock frequency, you will find 
corrections over the entire period of the clock. In most modules that shows up 
as a +/- 1/2 clock period correction.

Bob

On Mar 10, 2014, at 2:03 AM, Hal Murray hmur...@megapathdsl.net wrote:

 
 albertson.ch...@gmail.com said:
 The M12 user manual hints at why, they say the newer receiver runs on a
 faster internal clock. 
 
 Roughly, it's going to be within 1/2 clock cycle.  If newer units have faster 
 clocks, the peak-peak sawtooth should be smaller.
 
 
 -- 
 These are my opinions.  I hate spam.
 
 
 
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Re: [time-nuts] ADEV from phase or frequency measurement

2014-03-10 Thread Volker Esper
Even if the -3dB were an issue, I'd have much more faith in a clear, passive
resistor network than in a complex amplifier with all it's unknown non linear
characteristics, temperature dependent time delays, noise sources, etc., etc.
This simple home made network is a useful, manageable gadget.
Volker

 Bob Camp li...@rtty.us hat am 10. März 2014 um 01:47 geschrieben:


 Hi

 So far, I have not found the 3db lost in a a passive splitter to be a problem
 with anything I have played with. With proper termination , they seem to be a
 good thing to use.

 Bob

 On Mar 9, 2014, at 7:55 PM, Volker Esper ail...@t-online.de wrote:

  Bob,
 
  I sometimes indeed do arc welding, as well as forging... But that's
  another story.
 
  When waiting for an ADEV measurement I sit still, trying not to move a
  millimeter. Seriously, I try to avoid any rf noise, e.g. ham radio, any
  airflow, any temperature change. I log supply voltages and check, if
  there's anything odd. I avoid any switching supply. I regularely check,
  if any switching voltage regulator (TV, monitors, PC,...) disturbs my rf
  ether...
 
  As the legends of my plots tell, I do use a passive splitter to get two
  similar signals (start and stop) for phase measurement. But I haven't
  used it for splitting the 10MHz for frequency measurement (reference and
  input).
 
  Lower level is a concern, since it increases phase jitter.
 
  Volker
 
 
  Am 09.03.2014 23:32, schrieb Bob Camp:
  Hi
 
  Do you routinely do arc welding while waiting for an ADEV plot to finish
  :)… (I drink beer, but not everybody is into that …)
 
  You might consider trying a passive splitter on one of the outputs of the
  GPSDO. There aren’t many ways they will mess up a signal other than by
  dropping it’s level. If level is a concern then indeed they could be an
  issue.
 
  Bob
 
  On Mar 9, 2014, at 6:17 PM, Magnus Danielson mag...@rubidium.dyndns.org
  wrote:
 
  On 09/03/14 22:36, Volker Esper wrote:
  Am 09.03.2014 19:46, schrieb Magnus Danielson:
  On 04/03/14 01:05, Volker Esper wrote:
  Am 03.03.2014 23:04, schrieb Magnus Danielson:
  Volker,
 
  On 03/03/14 00:50, Volker Esper wrote:
  Sorry for the time delay...
 
  TIC: SR620 with Z3805 as external reference; signal source
  Nortel/Trimble GPSTM (GPSDO) 10MHz output
 
  Enclosed two plots (SW: Plotter):
  - one is sigma(tau) calculated from phase samples (SR620 TIME mode),
  - the other one is sigma(tau) from frequency data (SR620 FREQ mode)
 
  Whole equipment had a power up time of several days/weeks. Room
  temperature was stable over both measurements (within about 2 degrees
  C).
  The SR620 uses a bit different path through the logic when doing TI
  and FREQ measurements. The frequency measurement has a feature that
  means that the time error between start and stop signal needs to be
  calibrated out. This can be done using the calibration routines given
  in the manual. This should not affect the ADEV measure, but as a
  precaution.
 
  Try doing a pair of noise-floor measurements. That is, feed the
  reference 10 MHz to the A input for the frequency noise measurement.
  Then, for the TI noise-floor measurement, put a T on the A input, put
  it in high-Z mode and then use a 1 m cable to put the signal onto the
  B input which is terminating.
 
  You indeed have a higher level. Your initial shape makes me wonder. I
  would really like to get the TimeLab measurement files and eye-ball
  them closer.
 
  If you plot the phase or frequency, it may be easier to spot
  systematic wobbles. TDEV would also help, as it provides a general
  *tau scaling to the ADEV plot.
 
  Cheers,
  Magnus
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  and follow the instructions there.
  I already did these measurements, I stick the plots at this posting.
 
  - The plot with the long file name shows frequency mode measurement:
  10MHz external reference put into channel A.
  - ...Plot2 shows a phase measurement, where I fed the reference
  signal
  via a home made 50 ohms splitter into both input channels. (I prefer
  feeding the channels symmetrically)
  Both plots show linear negative gradients, but the phase plot is
  steeper. The frequency plot transitions into a horizontal at about
  1000s.
  The 1/sqrt(tau) curve is higher than the background noise of the
  counter. That flicker phase noise is more typical of a buffer or
  source than of the counter.
 
  For shorter taus I would expect the white noise to dominate.
 
  I'm just surprised about the level of flicker phase noise. What is the
  source?
 
  Cheers,
  Magnus
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  and follow the instructions there.
  Source in both cases is an HP Z3805 GPSDO. I didn't insert an 

Re: [time-nuts] ADEV from phase or frequency measurement

2014-03-10 Thread Bob Camp
Hi

I’ve played with both the 6 db loss resistive splitters and the transformer 
based 3 db loss splitters. They both seem to be fine for splitting precision 10 
MHz signals. For a while I avoided the transformer based parts, but not for any 
reason I could prove.

Bob

On Mar 10, 2014, at 7:41 AM, Volker Esper ail...@t-online.de wrote:

 Even if the -3dB were an issue, I'd have much more faith in a clear, passive
 resistor network than in a complex amplifier with all it's unknown non linear
 characteristics, temperature dependent time delays, noise sources, etc., etc.
 This simple home made network is a useful, manageable gadget.
 Volker
 
 Bob Camp li...@rtty.us hat am 10. März 2014 um 01:47 geschrieben:
 
 
 Hi
 
 So far, I have not found the 3db lost in a a passive splitter to be a problem
 with anything I have played with. With proper termination , they seem to be a
 good thing to use.
 
 Bob
 
 On Mar 9, 2014, at 7:55 PM, Volker Esper ail...@t-online.de wrote:
 
 Bob,
 
 I sometimes indeed do arc welding, as well as forging... But that's
 another story.
 
 When waiting for an ADEV measurement I sit still, trying not to move a
 millimeter. Seriously, I try to avoid any rf noise, e.g. ham radio, any
 airflow, any temperature change. I log supply voltages and check, if
 there's anything odd. I avoid any switching supply. I regularely check,
 if any switching voltage regulator (TV, monitors, PC,...) disturbs my rf
 ether...
 
 As the legends of my plots tell, I do use a passive splitter to get two
 similar signals (start and stop) for phase measurement. But I haven't
 used it for splitting the 10MHz for frequency measurement (reference and
 input).
 
 Lower level is a concern, since it increases phase jitter.
 
 Volker
 
 
 Am 09.03.2014 23:32, schrieb Bob Camp:
 Hi
 
 Do you routinely do arc welding while waiting for an ADEV plot to finish
 :)… (I drink beer, but not everybody is into that …)
 
 You might consider trying a passive splitter on one of the outputs of the
 GPSDO. There aren’t many ways they will mess up a signal other than by
 dropping it’s level. If level is a concern then indeed they could be an
 issue.
 
 Bob
 
 On Mar 9, 2014, at 6:17 PM, Magnus Danielson mag...@rubidium.dyndns.org
 wrote:
 
 On 09/03/14 22:36, Volker Esper wrote:
 Am 09.03.2014 19:46, schrieb Magnus Danielson:
 On 04/03/14 01:05, Volker Esper wrote:
 Am 03.03.2014 23:04, schrieb Magnus Danielson:
 Volker,
 
 On 03/03/14 00:50, Volker Esper wrote:
 Sorry for the time delay...
 
 TIC: SR620 with Z3805 as external reference; signal source
 Nortel/Trimble GPSTM (GPSDO) 10MHz output
 
 Enclosed two plots (SW: Plotter):
 - one is sigma(tau) calculated from phase samples (SR620 TIME mode),
 - the other one is sigma(tau) from frequency data (SR620 FREQ mode)
 
 Whole equipment had a power up time of several days/weeks. Room
 temperature was stable over both measurements (within about 2 degrees
 C).
 The SR620 uses a bit different path through the logic when doing TI
 and FREQ measurements. The frequency measurement has a feature that
 means that the time error between start and stop signal needs to be
 calibrated out. This can be done using the calibration routines given
 in the manual. This should not affect the ADEV measure, but as a
 precaution.
 
 Try doing a pair of noise-floor measurements. That is, feed the
 reference 10 MHz to the A input for the frequency noise measurement.
 Then, for the TI noise-floor measurement, put a T on the A input, put
 it in high-Z mode and then use a 1 m cable to put the signal onto the
 B input which is terminating.
 
 You indeed have a higher level. Your initial shape makes me wonder. I
 would really like to get the TimeLab measurement files and eye-ball
 them closer.
 
 If you plot the phase or frequency, it may be easier to spot
 systematic wobbles. TDEV would also help, as it provides a general
 *tau scaling to the ADEV plot.
 
 Cheers,
 Magnus
 ___
 time-nuts mailing list -- time-nuts@febo.com
 To unsubscribe, go to
 https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
 and follow the instructions there.
 I already did these measurements, I stick the plots at this posting.
 
 - The plot with the long file name shows frequency mode measurement:
 10MHz external reference put into channel A.
 - ...Plot2 shows a phase measurement, where I fed the reference
 signal
 via a home made 50 ohms splitter into both input channels. (I prefer
 feeding the channels symmetrically)
 Both plots show linear negative gradients, but the phase plot is
 steeper. The frequency plot transitions into a horizontal at about
 1000s.
 The 1/sqrt(tau) curve is higher than the background noise of the
 counter. That flicker phase noise is more typical of a buffer or
 source than of the counter.
 
 For shorter taus I would expect the white noise to dominate.
 
 I'm just surprised about the level of flicker phase noise. What is the
 source?
 
 Cheers,
 Magnus
 

Re: [time-nuts] Finding a spare part for HP5370B

2014-03-10 Thread Robert Atkinson
It's part No 05370-20206, no longer available from Agilent. I don't think you 
will find one easily. Best bet is to buy some plastic and make one. The 
proper plastic filter material is polarised to increase contrast but thin red 
acrylic sheet will do OK. masking the annciators may be tricky. Try a black on 
clear label maker. A professional one should be able to do the required 
mirrored (you will be sticking it to the inside of the window) and negative 
(clear on black) label.
HTH,
Robert G8RPI.
 


 From: Pascual Arbona Lopez p.arb...@securimar.com
To: Discussion of precise time and frequency measurement time-nuts@febo.com 
Sent: Saturday, 8 March 2014, 7:21
Subject: [time-nuts] Finding a spare part for HP5370B
  

Hello!

I have been given an HP5370B; I have checked  it and it seems to work fine, but 
unfortunately its missing the red plastic in the display window.
If anyone has one of these equipments for spare parts, I would be very grateful 
if I can buy  this part. Please contact me off list if
you can help at p.arb...@securimar.com 
  
    Many thanks
      P. Arbona



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[time-nuts] How to measure phase noise of HCMOS oscillators?

2014-03-10 Thread Anders Time
A while a go i bought some low phase noise Crystek CVHD-950 and now I want
to meas the phase noise of the oscillators.
Is it best to try to impedance match the output signal and filter and
amplify the hcmos before i feed it in to the phase detector? or Just hope
that the signal is high enough to drive the mixer? What about all the
harmonics? Does it alter the phase noise result?
/Anders
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[time-nuts] HP 10811 - 60165 Info Request

2014-03-10 Thread johncroos
I have acquired one of these double oven oscillators. Seems like a useful 
thing. Need info on pin outs, and operating voltages. Also any other useful 
information or links to same would be appreciated. Please reply off list with 
any files of specs etc to my email - johncr...@aol.com

All help appreciated.   

Best regards to all john c roos k6iql


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[time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bob Stewart
Fellow Timenuts:


I'm trying to square reality with the modeling that I did, and nothing makes 
sense.  When I modeled the result of just my 2.4K resistor with the caps and 
resistor the PIC datasheet says it has in it, there's no relationship.  The 
model says 
I'll get millivolts out.  Here's how I calculate what I'm actually 
getting:

ADC VRef is 2.5V
10-bit ADC = 1024 positions


Max ADC from TIC = 975
975/1024*2.5 = 2.38V Max TIC value


Min ADC from TIC = 293
293/1024*2.5 = 0.715V Min TIC value

A range of 0.715V-2.38V is totally outside my expectations.  The only way I can 
get close to these values is if the internal CHOLD in the PIC is only a 
fraction of the 120pf they say it has - say 20pf.  Any thoughts would be 
appreciated.

Bob - AE6RV
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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Hal Murray

b...@evoria.net said:
 A range of 0.715V-2.38V is totally outside my expectations.  The only way I
 can get close to these values is if the internal CHOLD in the PIC is only a
 fraction of the 120pf they say it has - say 20pf.  Any thoughts would be
 appreciated. 

My quick guess is a problem reading the specs.

120 pF is probably an internal cap,  20 pF seems reasonable for the cap on a 
pin.

Lots of people would get unhappy if the pin cap was 120 pF.


-- 
These are my opinions.  I hate spam.



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Re: [time-nuts] HP 10811 - 60165 Info Request

2014-03-10 Thread Tom Knox
1 - BRN Oscillator Return (Com)
2 - RED Oscillator Power (+12V)
3 - ORG Oven Monitor Return (Com)
4 - YEL Oven Monitor Output
5 - GRN Oven Power (+18-24V)
6 - BLU Oven Return (Com)

Thomas Knox



 To: time-nuts@febo.com
 From: johncr...@aol.com
 Date: Mon, 10 Mar 2014 14:17:58 -0400
 Subject: [time-nuts] HP 10811 - 60165 Info Request
 
 I have acquired one of these double oven oscillators. Seems like a useful 
 thing. Need info on pin outs, and operating voltages. Also any other useful 
 information or links to same would be appreciated. Please reply off list with 
 any files of specs etc to my email - johncr...@aol.com
 
 All help appreciated.   
 
 Best regards to all john c roos k6iql
 
 
 ___
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Re: [time-nuts] HP 10811 - 60165 Info Request

2014-03-10 Thread Tom Knox
Thanks to TVB for hosting this manual containing info for most models of the 
venerable 10811.
 
http://www.leapsecond.com/museum/10811a/10811a.pdf
Thomas Knox



 To: time-nuts@febo.com
 From: johncr...@aol.com
 Date: Mon, 10 Mar 2014 14:17:58 -0400
 Subject: [time-nuts] HP 10811 - 60165 Info Request
 
 I have acquired one of these double oven oscillators. Seems like a useful 
 thing. Need info on pin outs, and operating voltages. Also any other useful 
 information or links to same would be appreciated. Please reply off list with 
 any files of specs etc to my email - johncr...@aol.com
 
 All help appreciated.   
 
 Best regards to all john c roos k6iql
 
 
 ___
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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Chris Albertson
On Mon, Mar 10, 2014 at 12:12 PM, Bob Stewart b...@evoria.net wrote:

 A range of 0.715V-2.38V is totally outside my expectations.  The only way I 
 can get close to these values is if the internal CHOLD in the PIC is only a 
 fraction of the 120pf they say it has - say 20pf.  Any thoughts would be 
 appreciated.

Could it be a software issue?  20pf seems about right for a normal
input pin in a typical chip.  They all have diodes protecting from
static and 20 pf seems like what I'd expect. You say there is an
internal 120 pf cap inside the PIC?  If so you'd need to connect that.
 It may be that you are not doing that correctly or at the time you
think you are.   I'm guessing and we'd need both the spec sheet and
your code to know for sure.
-- 

Chris Albertson
Redondo Beach, California
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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bob Stewart
Hi Chris,

I don't think it's a software issue, as the voltage doubled when I halved the 
VRef - which is what would be expected.  Also, the voltages tracked the 5334B 
when I still had it connected, except that the TIC seems more precise and less 
noisy.  Then again, the 5334B was being fed with 8 ft of RG-58U.  What I'm 
seeing with the TIC is exactly what I would expect to see, only better, if that 
makes any sense.  Maybe the LTSpiceIV models are where the problem lies.


Let me clarify the caps.  This is an 18F2220 PIC.  The pin cap is 5pf.  There 
is an internal CHOLD in the ADC which is listed as 120pf.  Here is a screenshot 
of the relevant page.


http://www.evoria.net/AE6RV/TIC/ADC.png

Bob





 From: Chris Albertson albertson.ch...@gmail.com
To: Bob Stewart b...@evoria.net; Discussion of precise time and frequency 
measurement time-nuts@febo.com 
Sent: Monday, March 10, 2014 3:26 PM
Subject: Re: [time-nuts] Modeling vs reality question re my TIC
 

On Mon, Mar 10, 2014 at 12:12 PM, Bob Stewart b...@evoria.net wrote:

 A range of 0.715V-2.38V is totally outside my expectations.  The only way I 
 can get close to these values is if the internal CHOLD in the PIC is only a 
 fraction of the 120pf they say it has - say 20pf.  Any thoughts would be 
 appreciated.

Could it be a software issue?  20pf seems about right for a normal
input pin in a typical chip.  They all have diodes protecting from
static and 20 pf seems like what I'd expect.     You say there is an
internal 120 pf cap inside the PIC?  If so you'd need to connect that.
It may be that you are not doing that correctly or at the time you
think you are.   I'm guessing and we'd need both the spec sheet and
your code to know for sure.
-- 

Chris Albertson
Redondo Beach, California



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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bruce Griffiths

Metastability in the Flipflops?

Charge injection when tristating tristate buffers?

Neither of which are included in your models.

Bruce

Bob Stewart wrote:

Fellow Timenuts:


I'm trying to square reality with the modeling that I did, and nothing makes
sense.  When I modeled the result of just my 2.4K resistor with the caps and 
resistor the PIC datasheet says it has in it, there's no relationship.  The 
model says
I'll get millivolts out.  Here's how I calculate what I'm actually
getting:

ADC VRef is 2.5V
10-bit ADC = 1024 positions


Max ADC from TIC = 975
975/1024*2.5 = 2.38V Max TIC value


Min ADC from TIC = 293
293/1024*2.5 = 0.715V Min TIC value

A range of 0.715V-2.38V is totally outside my expectations.  The only way I can 
get close to these values is if the internal CHOLD in the PIC is only a 
fraction of the 120pf they say it has - say 20pf.  Any thoughts would be 
appreciated.

Bob - AE6RV
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Re: [time-nuts] HP 10811 - 60165 Info Request

2014-03-10 Thread WarrenS


The single oven HP10811's heater supply is spec 20 to 30V, (=18V is mostly 
OK, 19V is better)
The Inner oven voltage spec on the  Dual Oven 10811s that I have is 12 to 
30Volts, (All work good down to ~11V)
Internally my dual oven units use a 5V ref in their heater controller 
instead of a 10V reference. The thermistor bridge is 5V on both)


The outer oven needs ~5V nom to operate at ~115 deg F.
10 Volt max from an outer oven linear controller works good for Lab work.
For best TC, the Dual oven units that I've tested really need an outer oven 
controller.
On a couple of units, the temp TC went from around 1e-10 / deg C without the 
outer oven to 1e-12 /degC.


Outer oven Pin outs;
1-GREY thermistor#1 (100K ohm@ 25C)
2-GREY thermistor lead#2
3-RED Heater#1 (~12 Ohm)
4-RED Heater lead#2
5- NC
6- NC

***


1 - BRN Oscillator Return (Com)
2 - RED Oscillator Power (+12V)
3 - ORG Oven Monitor Return (Com)
4 - YEL Oven Monitor Output
5 - GRN Oven Power (+18-24V)
6 - BLU Oven Return (Com)

Thomas Knox


**

To: time-nuts at febo.com
From: johncroos at aol.com
Date: Mon, 10 Mar 2014 14:17:58 -0400
Subject: [time-nuts] HP 10811 - 60165 Info Request

I have acquired one of these double oven oscillators. Seems like a useful 
thing. Need info on pin outs, and operating voltages. Also any other 
useful information or links to same would be appreciated. Please reply off 
list with any files of specs etc to my email - johncroos at aol.com


All help appreciated.

Best regards to all john c roos k6iql


___ 


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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bob Stewart
Wouldn't those types of problems tend to make the result worse in some obvious 
way, instead of better than expected?  I'm getting an ADC swing from about .7V 
to about 2.4V; which corresponds to the usual diode sink at .7V and probably 
just blind luck with the 2.4V max being so close to the 2.5V VRef.


In the plot below, I zapped the DAC on my system to get a picture of the charge 
ramp.  The red dots are the TIC with the 10ns uncorrected jitter from a nav 
receiver.  The purple is a 30 second rolling average.  Am I right in thinking 
this is a typical RC charge ramp?  Not trying to be argumentative, I'm just 
trying hard to understand.


http://www.evoria.net/AE6RV/TIC/ChargeRamp.png


Bob





 From: Bruce Griffiths bruce.griffi...@xtra.co.nz
To: Bob Stewart b...@evoria.net; Discussion of precise time and frequency 
measurement time-nuts@febo.com 
Sent: Monday, March 10, 2014 3:53 PM
Subject: Re: [time-nuts] Modeling vs reality question re my TIC
 

Metastability in the Flipflops?

Charge injection when tristating tristate buffers?

Neither of which are included in your models.

Bruce


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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bruce Griffiths
Charge injection could well account for the offset from the expected 
minimum.

There are no forward biased diodes in your circuit.

It would be helpful to capture the 125 buffer input signal waveforms 
(and if possible the timing capacitor waveform) rather than trying to 
infer whats going on from the ADC plots.



Bruce

Bob Stewart wrote:

Wouldn't those types of problems tend to make the result worse in some obvious 
way, instead of better than expected?  I'm getting an ADC swing from about .7V 
to about 2.4V; which corresponds to the usual diode sink at .7V and probably 
just blind luck with the 2.4V max being so close to the 2.5V VRef.


In the plot below, I zapped the DAC on my system to get a picture of the charge 
ramp.  The red dots are the TIC with the 10ns uncorrected jitter from a nav 
receiver.  The purple is a 30 second rolling average.  Am I right in thinking 
this is a typical RC charge ramp?  Not trying to be argumentative, I'm just 
trying hard to understand.


http://www.evoria.net/AE6RV/TIC/ChargeRamp.png


Bob




   


From: Bruce Griffithsbruce.griffi...@xtra.co.nz
To: Bob Stewartb...@evoria.net; Discussion of precise time and frequency 
measurementtime-nuts@febo.com
Sent: Monday, March 10, 2014 3:53 PM
Subject: Re: [time-nuts] Modeling vs reality question re my TIC


Metastability in the Flipflops?

Charge injection when tristating tristate buffers?

Neither of which are included in your models.

Bruce


 

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Re: [time-nuts] Modeling vs reality question re my TIC

2014-03-10 Thread Bob Stewart
Unfortunately, I don't have a DSO, and I don't see any way to capture waveforms 
with the equipment I have available to me.  And then there's the insurmountable 
problem of not having access to the 120pf cap in the PIC.  I may have to just 
accept it without understanding it.  At least success is a good problem to have 
and not a bad one.  I'm sending a board to a friend soon, and if the results 
repeat for him, it's not just a fluke.

Bob





 From: Bruce Griffiths bruce.griffi...@xtra.co.nz
To: Bob Stewart b...@evoria.net; Discussion of precise time and frequency 
measurement time-nuts@febo.com 
Sent: Monday, March 10, 2014 5:32 PM
Subject: Re: [time-nuts] Modeling vs reality question re my TIC
 

Charge injection could well account for the offset from the expected 
minimum.
There are no forward biased diodes in your circuit.

It would be helpful to capture the 125 buffer input signal waveforms 
(and if possible the timing capacitor waveform) rather than trying to 
infer whats going on from the ADC plots.


Bruce


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