[time-nuts] GPSDO question
Speaking with Tom recently impressed on me just how much I don't know about what's normal for a GPSDO. The options on the LEA-6T are formidable and have consequences for my GPSDO. The question I'm struggling with now is what's normal during the survey process? The only example of a commercial GPSDO I have is the KS-24361. I believe it leaves the oscillator output available and both the FLL and PLL are functioning. I've set the bit in the LEA-6T so that it doesn't emit the PPS when the time isn't valid. So, with the other restraints I've put on it (TDOP, TAcc, etc), there's no PPS during survey. That means there's no FLL or PLL, and the DAC is frozen, so I might as well shut off the oscillator output. On the one hand, a survey implies the OCXO has just been turned on and all the nastiness of early retrace. And the first several hours of these 34310-T OCXOs are horrible. OTOH, there's the KS which, by default anyway, ignores all that and does the best it can, and does it right quickly. I suppose it wouldn't be all that hard to add still more controls to allow it to work or not work as the user desires. Any input on the state of the art would be appreciated. Bob - AE6RV ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO question
Hi Commercial GPSDO’s are manufactured to a specific customer requirement. The application in the system dictates how it behaves as it it powered up or power cycled. There is no single “always correct” approach. In a Time Nut environment, people seem to be quite happy setting up temperature controlled areas that are stable to a small fraction of a C. They also seem to be able to set up power that never ever goes out. Both are quite different than the constraints on a commercial system. A GPSDO optimized for this sort of environment may be a very different beast. Survey performance varies from module to module. It also is highly dependent on your antenna and sky view. A survey with an antenna on top of a 300 M tall tower will progress very differently than a survey on an antenna at the bottom of a well. Commercial systems are designed with a good antenna location (or not) as part of the spec. Time Nuts seem to often have antennas at the bottom of a well. A full survey on an older GPS may take weeks with a poor antenna location. The same process on a new(er) GPS and a good antenna can complete in under 10 minutes. Thats a wide range. The answer to the survey issue in both cases (commercial and Time Nut) is to lock the GPS in a fixed location mode. Do the survey however you can. Get the best location possible. Load that location into the GPS each time it boots (or save it in the module). That way there is no survey process to mess things up. You also *should* have a much better location this way. The auto-survey process rarely gives a really good location. On Jul 26, 2015, at 12:27 AM, Bob Stewart b...@evoria.net wrote: Speaking with Tom recently impressed on me just how much I don't know about what's normal for a GPSDO. The options on the LEA-6T are formidable and have consequences for my GPSDO. The question I'm struggling with now is what's normal during the survey process? The only example of a commercial GPSDO I have is the KS-24361. It’s a good example of an older GPSDO design that was done back when the GPS signal was being deliberately degraded by the DOD. I believe it leaves the oscillator output available and both the FLL and PLL are functioning. At least on the ones I have looked at, it continues to play with the output quite a bit for the first 12 hours and still is swinging things around over the next couple of days. I've set the bit in the LEA-6T so that it doesn't emit the PPS when the time isn't valid. So, with the other restraints I've put on it (TDOP, TAcc, etc), there's no PPS during survey. That means there's no FLL or PLL, and the DAC is frozen, so I might as well shut off the oscillator output. That depends a lot on when you shut it down and how good a DAC setting you have stored in memory. On the one hand, a survey implies the OCXO has just been turned on and all the nastiness of early retrace. Or (more likely in a commercial environment) there has been a brief power outage and things are trying to get going again. And the first several hours of these 34310-T OCXOs are horrible. …. and how were those OCXO’s treated before you got them …. OTOH, there's the KS which, by default anyway, ignores all that and does the best it can, and does it right quickly. I suppose it wouldn't be all that hard to add still more controls to allow it to work or not work as the user desires. Any input on the state of the art would be appreciated. Well, there are probably a dozen or so “controls” that you can set in a commercial environment. Time Nuts seem to like to fiddle. That would probably up the number into the several dozen range. There are a *lot* of corner cases (I can only see one sat a day for 10 minutes and want to do an auto survey …). If you include them all, there really is no upper bound other than exhaustion on the part of the designer. Consider that (as others have noted), every time you add a user settable control, you also add the likelihood it will be set incorrectly. Each time it is set wrong, you get a support call. So much fun…. Bob Bob - AE6RV ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY He everyone, Just a few points/questions I would like to make regarding the discussion FLL vs PLL vs my design. One question that I have is regarding FLL vs PLL. The statement that a PLL is better than a FLL on a GPSDO may make sense when looked at from an analog loop and discrete phase comparator signal perspective, but what about the software that closes the loop? For example, the software may provide the ability to not make a frequency adjustment if the frequency difference (or phase difference) is too small. How does this come into play when comparing the two approaches? In other words can we make the software-based FLL a better perfromer so that the claim that PLL is better may not be as obvious? I have tried to find a detailed comparison PLL vs FLL for GPSDO on the web and in textbooks but could not see anything other than general (qualitative) statements like the ones I have read so far on this mailing list: PLL is better than FLL. Does this information exist? Could anyone direct me to that data? I am truly interested in understanding the behavioral differences. Finally, just a reminder: I make no claim of mind-blowing performance with my design. From the beginning, it has been clearly stated that the expected short term accuracy of the VE2ZAZ design (assuming a decent OCXO is used) should be better than 1x10^-9. My website also provides the same information. The feedback that I have received from the users correlate with this. I like to see my work as allowing the 100+ users to learn more about disciplining an oscillator and obtain a better 10MHz reference. Nothing more than this. Please keep the discussion open-minded and informative. I like this forum when it is like that. :-) Bert, VE2ZAZ http://ve2zaz.net Ask a question on any topic and get answers from real people. Go to Yahoo! Answers and share what you know at http://ca.answers.yahoo.com ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Bert Bert wrote: He everyone, Just a few points/questions I would like to make regarding the discussion FLL vs PLL vs my design. One question that I have is regarding FLL vs PLL. The statement that a PLL is better than a FLL on a GPSDO may make sense when looked at from an analog loop and discrete phase comparator signal perspective, but what about the software that closes the loop? For example, the software may provide the ability to not make a frequency adjustment if the frequency difference (or phase difference) is too small. How does this come into play when comparing the two approaches? In other words can we make the software-based FLL a better perfromer so that the claim that PLL is better may not be as obvious? Throwing away information as you suggest almost invariably degrades system performance. You could improve your system somewhat by eliminating the 16 second blanking period whilst you wait for the OCXO to settle. This delay is unnecessary, a stable loop is possible without it. The point of the loop is to stabilise the OCXO frequency not to measure it as accurately as possible. Using a PWM DAC as you have is almost never a good idea as the PWM modulation frequency components need to be attenuated by at least 120dB to avoid significantly degrading the OCXO performance via low level modulation of the OCXO frequency by the residual PWM signal. Your simple low pass filter is unlikely to achieve this. Using a conventional DAC (suitable 16 bit DACs are relatively inexpensive these days) minimises this problem, however if it is dithered the dither modulation frequency components need to be attenuated to below the OCXO noise level. If the dither amplitude is only a few bits (it should almost always be greater than 1 bit) then filtering the dither components is a somewhat easier proposition as 60dB attenuation or so should be adequate (with a 16 bit DAC). However feedthrough from the DAC digital control signals also has to be attenuated adequately, this is a more difficult but potentially solvable problem. Did you actually use a ground plane on your PCB? Removing the frequency dividers from the board should also improve performance as they are yet another source of unwanted modulation frequencies for the OCXO EFC input. Ideally you should use a distribution amplifier to feed various systems such as the FLL system and any such dividers a well shielded enclosure. Finally, just a reminder: I make no claim of mind-blowing performance with my design. From the beginning, it has been clearly stated that the expected short term accuracy of the VE2ZAZ design (assuming a decent OCXO is used) should be better than 1x10^-9. My website also provides the same information. The feedback that I have received from the users correlate with this. I like to see my work as allowing the 100+ users to learn more about disciplining an oscillator and obtain a better 10MHz reference. Nothing more than this. Your performance measures are less than satisfactory for an informed decision of whether the performance is adequate for a particular purpose. Plots of the Allan deviation versus tau are desirable as well as some idea of the level of any incidental sidebands. Achieving an accuracy of 1E-9 with a 10811 or similar OCXO is about 10-100 times worse than can be achieved with a relatively inexpensive PLL disciplining technique. Surely if an accuracy stability of 1E-9 is adequate a lower performance (and cheaper) oscillator would suffice. Bert, VE2ZAZ http://ve2zaz.net Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Tom Van Baak [EMAIL PROTECTED] wrote: Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? I can think of a couple applications that use FLL's rather than PLL's, and it's never for good statistics. It's all about either: 1. Artificially speeding up lock 2. Power conservation (surprisingly common concern in consumer battery operated items) 3. Given a choice between a simplistic single-loop PLL with very low reference frequency or a FLL, they chose FLL because of better phase noise performance #3 has become less and less an issue because the fraction of the world confining themselves to single-loop synthesizers has become smaller and smaller. Still, the latest ARRL Handbook shows a clever example by N6NWP. (They call it frequency stabilized rather than frequency locked). Now there are other some other applications that simply ignore frequency and only lock phase through discrete jumps, that some of us call phase-jerk loops, that have incredibly bad phase noise characteristics (meaning that if you listen to the result on a speaker it sounds like a million screaming banshees!) but work fine for clock and data recovery state machines. Incidentally, the LCD WWVB-locked clocks at discount stores fall into this category - they simply jerk their phase to lock to WWVB, and do no frequency correction. Tim. Thanks, /tvb ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY In a message dated 9/2/2007 13:16:32 Pacific Daylight Time, [EMAIL PROTECTED] writes: But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Hi Tom, an FLL has some distinct advantages: * Sometimes quartz crystals exhibit well-documented random jumps in frequency/phase. Causes for this are speculative, but the effect on some crystals can be rather significant. In an FLL, the recovery is only 1/2 as long since only the original frequency has to be attained. In fact if it is just a phase jump, then there won't be any correction needed in an FLL, but the PLL will have to fully recover by pulling the frequency off it's optimum. In a PLL, the original frequency, plus an additional negative frequency offset has to be attained to push-back the phase, so the frequency is off for much longer. * An FLL can exhibit much less frequency error than a PLL. The amount is related to the temperature sensitivity of the OCXO. A PLL has to modify the frequency much more to attain an overall zero phase difference. This is more pronounced the more sensitive the OCXO is to temperature changes. * An FLL can have very low deviation on the crystal and still work correctly, say a maximum of +-1E-014 change per second, as long as the total available frequency change is greater than the total expected frequency error due to temp, aging, motion etc. Thus an FLL will exhibit higher frequency accuracy over time than a PLL. A PLL will have to be much more aggressive on it's control response to maintain phase lock since it has to correct the accrued phase error over time, while the FLL just has to correct for instantaneous error, not integrated error. Of course most of the instruments found in a lab are more sensitive to frequency errors than phase errors, such as a frequency counter (used in frequency mode), Spectrum analyzer, Jitter analyzers, RF signal generators etc so a PLL can actually degrade their performance versus an FLL. Lastly, the phase-error in an FLL is related to the sensitivity (gain) of the loop, and is smaller the better the OCXO is. An FLL can be simply seen as a PID controller where the I and D terms are set to zero. The literature has lot's of mathematical information about why the noise is much less in a proportional-only loop then when adding the integral (phase) part to it. This brings up another question: how good are true PID loops that also make use of the differential term (e.g. correcting for rate of change of the phase)? The literature talks about the differential term being hardly used in the industry because it can add noise and instability to a system... bye, Said ** Get a sneak peek of the all-new AOL at http://discover.aol.com/memed/aolcom30tour ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
From: Poul-Henning Kamp [EMAIL PROTECTED] Subject: Re: [time-nuts] GPSDO Question Date: Mon, 03 Sep 2007 20:06:03 + Message-ID: [EMAIL PROTECTED] In message [EMAIL PROTECTED], [EMAIL PROTECTED] writes: ); SAEximRunCond expanded to false This brings up another question: how good are true PID loops that also make use of the differential term (e.g. correcting for rate of change of the phase)? The literature talks about the differential term being hardly used in the industry because it can add noise and instability to a system... I tried it and found that you could indeed et faster convergence, but I did it with a HP5370B as phase comparator to minimize the noise. With more realistic phase comparators I don't think it is sensible. I personally prefer to start with a very short tempered PLL and then increase the timeconstant as things get better. You can get improved result in the early phase from adding a D-term too, but once you've acheived lock you can reduce it or totally remove it. Just adds noise when locked. The hard part is knowing when to stop increasing the time constant, and I have found that keeping track of phase error zero crossings is the best indicator: If you don't see any (for too long time), your PLL has too long timeconstant. This is where the Kalman filter approach has been proven to be better than PLLs since it will automatically tune itself up. The good people at NIST have described it. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] GPSDO Question - FLL vs PLL
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Bruce, Yes, you're absolutely correct that PLL is the way to go if you need better than 10e-10 but my counters are only able to read 10e-9 anyway :-) Jerry K1JOS ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? Thanks, /tvb ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Tom Van Baak wrote: Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? Thanks, /tvb Hi Tom, I have seen and am familiar with only one FLL loop. It compared a counters registers to a static register loaded with the wanted value. This loop was read to just -1x10^6. With this scheme the granularity is obviously the +/- LSB count, not counting the time base error. BillWB6BNQ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY From: Tom Van Baak [EMAIL PROTECTED] Subject: Re: [time-nuts] GPSDO Question Date: Sun, 2 Sep 2007 13:13:39 -0700 Message-ID: [EMAIL PROTECTED] ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? I'm sure there is alot of it if you only look carefull enougth. There is alot in the GPS tracking camp. As always, FLLs are great ways to get started in tracking in quickly (they certainly beat PLLs) but for stability the FLLs residue errors, it is basically a derivate measure of the incomming phase and errors will result in zig-zagging around the goal. This is a D or PD-regulator, where as a PFD based PLL becomes a PID-regulator. However, onces lock has been acheived the D-term (frequency) can be removed as the PI-regulator is usually supperiour unless you expect very big phase-derivations on the input to cause the the PI-regulator out of lock. This is the classical books. In addition, it is worth mentioning that several PFD detectors have problems with the how internal gate times cause excess push-pull operation in the charge-pump and results in excess pumping in frequency. Works well for some applications, but not for others, especially low-jitter high step-up frequency multiplication. It is clear that a well done PLL is better and FLL. PLLs is however being outperformed by Kalman filters. This is all covered in literature, so I don't think we need to measure things, it is already established. There are FLLed GPSDOs out there. For many purposes they are sufficienly good, so it is not necessarilly a *BAD* thing. Good FLLs is limited by PPS resolution jitter anyway. Cheers, Magnus ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY The 8640B has an FLL, if turned on by the front panel switch. The frequency display number is stored and compared to. - Mike Mike B. Feher, N4FS 89 Arnold Blvd. Howell, NJ, 07731 732-886-5960 -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of WB6BNQ Sent: Sunday, September 02, 2007 4:48 PM To: Tom Van Baak; Discussion of precise time and frequency measurement Subject: Re: [time-nuts] GPSDO Question ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Tom Van Baak wrote: Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? Thanks, /tvb Hi Tom, I have seen and am familiar with only one FLL loop. It compared a counter's registers to a static register loaded with the wanted value. This loop was read to just -1x10^6. With this scheme the granularity is obviously the +/- LSB count, not counting the time base error. BillWB6BNQ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question - Clarification Please
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY I am confused by the PLL vs. FFL lock discussion. Does this concern the Schera board vs. the VE2ZAZ methods of time base discipline? Can someone share their thoughts on the subject? Thanks! 73 de K4TEU (Tom( -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Bruce Griffiths Sent: Saturday, September 01, 2007 10:19 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] GPSDO Question ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY JOS Earthlink wrote: 73 de K1JOS (Jerry) CCA #11906 CRA #1777 -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Behalf Of [EMAIL PROTECTED] Sent: Saturday, September 01, 2007 12:00 PM To: time-nuts@febo.com Subject: time-nuts Digest, Vol 38, Issue 1 ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Send time-nuts mailing list submissions to time-nuts@febo.com To subscribe or unsubscribe via the World Wide Web, visit https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts or, via email, send a message with subject or body 'help' to [EMAIL PROTECTED] You can reach the person managing the list at [EMAIL PROTECTED] When replying, please edit your Subject line so it is more specific than Re: Contents of time-nuts digest... Hi Group, I just recently completed a GPSDO inside a HP5328A. I was going to use the Schera board but opted for the VE2ZAZ. At first I tried to cannibalize the HP5328A's internal power supply for either the +/-15VDC or +5/-5.2VDC supply but I discovered the hard way that they would not supply enough current (burnt out CR1 and Q7) or the supplies would not be well regulated. I opted therefore to include inside the case a +/-12VDC swtiching supply powered externally by a 24VDC wall wart. From the +/-12VDC dual supply I cleaned up the rails with an L7805 and L7905. I was able to bring out to the the rear panel the 10Mhz and 5Mhz references plus the SMA GPS antenna connector. On the side panel I put in a momentary pushbutton switch to reset the GPS if needed plus a DB9 RS232 for serial communicatiosn with either the GPS using software like VisualGPS) or to monitor the VE2ZAZ board status. A simple DPDT switch next to the DB9 connector controls the serial selection. I have complete pictures if anyone is interested and it works very nicely. Jerry K1JOS ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY In a message dated 02/09/2007 04:20:54 GMT Daylight Time, [EMAIL PROTECTED] writes: It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Perhaps it depends on how you define a good approach. If you're looking for the very best you can get then it probably isn't, but I don't recall that being claimed in the first place. However, one of the attractions has to be the simplicity of the circuit and the fact that something offering reasonable performance can be knocked up very quickly. Without the divider and buffers, the circuit proposed by Bertrand Zauhar, VE2ZAZ, in his QEX article reduces to just three ICs. It may not be optimum but it must be a strong contender for the best you can get for very little effort. The Idaho State University version is reported on their web page for the project as having been checked over a 13 day period, by the Idaho National Laboratories Calibration Lab, and found to be accurate to 1.2x10^-10. I don't think that's too bad for a fun project that could probably be put together in an evening, even for one guilty of causing such amusement and/or distress:-) regards Nigel GM8PZR ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Tom Van Baak wrote: Jerry It is amusing/distressing to see that the myth that using an FLL to lock an oscillator to the PPS output of a GPS receiver is a good approach still persists. The optimum solution is a phase lock loop. Whilst building an FLL is instructive/educational, if you want the best GPSDO performance you should really use a PLL. Bruce It would seem for timekeeping applications, a PLL-based GPSDO will inherit the long-term accuracy of GPS with great fidelity. But for many frequency (e.g., transmitters) or time interval applications (e.g., frequency counters with finite gate times), I'd like to understand, in detail, what the difference between a PLL- and FLL-based GPSDO really is. Can someone point me to real data or even simulations with plots that show rms or adev differences between the two camps? Thanks, /tvb Tom When the integrator in the loop has finite gain this leads to a phase error in a PLL and a frequency error in an FLL. The performance data for most of the FLL and PLL GPSDOs is lacking. In most cases a plot of frequency accuracy is given without specifying exactly how it was obtained. A plot of the Allan deviation vs tau would surely be more informative. The other problem is that in most cases the potential performance is limited by the resolution of the EFC DAC. The frequency accuracy data published for all of the FLL disciplined GPSDOs that I've seen seems to indicate that perhaps the short term stability of their otherwise good OCXOs is severely degraded. A frequency lock loop is appropriate for a passive frequency standard (atomic or resonator) whereas a phase lock loop is suited to active frequency standards. Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY [EMAIL PROTECTED] wrote: Perhaps it depends on how you define a good approach. If you're looking for the very best you can get then it probably isn't, but I don't recall that being claimed in the first place. However, one of the attractions has to be the simplicity of the circuit and the fact that something offering reasonable performance can be knocked up very quickly. Without the divider and buffers, the circuit proposed by Bertrand Zauhar, VE2ZAZ, in his QEX article reduces to just three ICs. It may not be optimum but it must be a strong contender for the best you can get for very little effort. The Idaho State University version is reported on their web page for the project as having been checked over a 13 day period, by the Idaho National Laboratories Calibration Lab, and found to be accurate to 1.2x10^-10. I don't think that's too bad for a fun project that could probably be put together in an evening, even for one guilty of causing such amusement and/or distress:-) regards Nigel GM8PZR Nigel A well designed phase lock loop system can also be reduced to a small number of parts that can be assembled in a few hours so this isn't a useful criterion. As long as it is well understood that its a fun project and it doesn't achieve the highest performance possible for a small outlay then thats fine. The major problem is that most of the originators of these designs do not say that the design is far from optimum, which leads the uninitiated to blindly follow not realising they can do much better. If one is just interested in constructing the best frequency standard possible for a given outlay this isnt the way to do it. Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question - Clarification Please
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Thomas Linbeck wrote: I am confused by the PLL vs. FFL lock discussion. Does this concern the Schera board vs. the VE2ZAZ methods of time base discipline? Can someone share their thoughts on the subject? Thanks! 73 de K4TEU (Tom( Thomas The discussion is somewhat more general than the Schera (PLL) board versus the VE2ZAZ (FLL) board. The Schera board is not the only way to implement an inexpensive PLL. However don't fall into the trap of locking with a short loop time constant to the 10KHz output of a Conexant/Navman Jupiter GPS receiver, it has no better stability than the receivers PPS output. The Schera board is certainly not (at least with a good modern GPS timing receiver) the optimum technique for implementing a low cost high performance GPSDO. That said, its performance should be considerably better than that of an FLL implementation using the same OCXO. It is of course possible, with modern components to implement a technique somewhat akin to the Schera method with far fewer ICs. When one is trying to lock an oscillator to a passive atomic standard (Rubidium absorption cell, Caesium beam tube, mecury ion trap, etc) then a frequency lock loop is optimum. In this case a phase lock loop will not work as there is no signal for the PLL to lock onto. An FLL (using the Pound or similar technique) can also be used with a passive standard like a Sapphire whispering gallery resonator or a quartz passive quartz crystal. When one has an active frequency standard (hydrogen maser, GPS, Rubidium, Caesium standard) a PLL is usually the optimum technique. Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY [EMAIL PROTECTED] wrote: The Idaho State University version is reported on their web page for the project as having been checked over a 13 day period, by the Idaho National Laboratories Calibration Lab, and found to be accurate to 1.2x10^-10. regards Nigel GM8PZR Nigel The Idaho state project http://www.geocities.com/isurflab/Frequency_STD_Project.html Has the usual hallmarks of inexperience, fine for student educational purposes but shouldn't be slavishly copied without understanding. As usual the measurement technique and conditions used for the frequency comparison are poorly documented. Using an OPA2705 opamp as a comparator to produce a 5V logic level output from the GPS receivers PPS pulse is probably an effective way of adding jitter to this signal. Even using an RS485 line receiver as used on the original VE2ZAZ http://www3.sympatico.ca/b.zauhar/GPS_Std/GPS_Std.htm board is probably a better choice despite its built in input attenuator. Even a saturated switching transistor probably has better performance than the opamp. Add a simple baker clamp to the transistor and the performance is probably hard to beat for the outlay. Alternatively a 74HCT14 or 74ACT14 would also work well as a 3V to 5V level translator. Using a switchmode power supply from a PC isnt exactly conducive to low noise. Bruce ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY 73 de K1JOS (Jerry) CCA #11906 CRA #1777 -Original Message- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] Behalf Of [EMAIL PROTECTED] Sent: Saturday, September 01, 2007 12:00 PM To: time-nuts@febo.com Subject: time-nuts Digest, Vol 38, Issue 1 ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Send time-nuts mailing list submissions to time-nuts@febo.com To subscribe or unsubscribe via the World Wide Web, visit https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts or, via email, send a message with subject or body 'help' to [EMAIL PROTECTED] You can reach the person managing the list at [EMAIL PROTECTED] When replying, please edit your Subject line so it is more specific than Re: Contents of time-nuts digest... Hi Group, I just recently completed a GPSDO inside a HP5328A. I was going to use the Schera board but opted for the VE2ZAZ. At first I tried to cannibalize the HP5328A's internal power supply for either the +/-15VDC or +5/-5.2VDC supply but I discovered the hard way that they would not supply enough current (burnt out CR1 and Q7) or the supplies would not be well regulated. I opted therefore to include inside the case a +/-12VDC swtiching supply powered externally by a 24VDC wall wart. From the +/-12VDC dual supply I cleaned up the rails with an L7805 and L7905. I was able to bring out to the the rear panel the 10Mhz and 5Mhz references plus the SMA GPS antenna connector. On the side panel I put in a momentary pushbutton switch to reset the GPS if needed plus a DB9 RS232 for serial communicatiosn with either the GPS using software like VisualGPS) or to monitor the VE2ZAZ board status. A simple DPDT switch next to the DB9 connector controls the serial selection. I have complete pictures if anyone is interested and it works very nicely. Jerry K1JOS ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY I have gathered everything I need to assemble a GPS Disciplined Oscillator. I have the Brooks Shera controller assembled, am about 99% done on the linear power supplies for +/- 5V, 12V supplies and a separate 24V oven heater supply. The GPS Engine is purring away happily with a good active antenna - spewing NMEA data and 1pps to anything willing to listen to it. The HP-10811 oven is sitting happily in a working 5328A counter that I'm willing to cannibalize, but do I need to? Is there any reason why I shouldn't put the controler in the 5328 case so I can use it as a counter as well as timing source? 73 - Tom in St. Louis Got a little couch potato? Check out fun summer activities for kids. http://search.yahoo.com/search?fr=oni_on_mailp=summer+activities+for+kidscs=bz ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY If you use the HP Oscillator in your GPSDO, you can then use the 10 MHz output as an external reference for your counter. I picked up a 10 MHz distribution amp and use the same GPSDO to act as external reference on several instruments. Regards, Dick, W1KSZ Tom Clifton wrote: ); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY I have gathered everything I need to assemble a GPS Disciplined Oscillator. I have the Brooks Shera controller assembled, am about 99% done on the linear power supplies for +/- 5V, 12V supplies and a separate 24V oven heater supply. The GPS Engine is purring away happily with a good active antenna - spewing NMEA data and 1pps to anything willing to listen to it. The HP-10811 oven is sitting happily in a working 5328A counter that I'm willing to cannibalize, but do I need to? Is there any reason why I shouldn't put the controler in the 5328 case so I can use it as a counter as well as timing source? 73 - Tom in St. Louis Got a little couch potato? Check out fun summer activities for kids. http://search.yahoo.com/search?fr=oni_on_mailp=summer+activities+for+kidscs=bz ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. -- 73, Dick, W1KSZ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY The HP-10811 oven is sitting happily in a working 5328A counter that I'm willing to cannibalize, but do I need to? Is there any reason why I shouldn't put the controler in the 5328 case so I can use it as a counter as well as timing source? 73 - Tom in St. Louis Good idea. Saves you the cost of case, power supply, RF connectors, etc. When you're done consider taking photos of the project. I think many people would be interested in this example of a homebrew GPSDO enhancement to a 5328A. /tvb ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] GPSDO Question
); SAEximRunCond expanded to false Errors-To: [EMAIL PROTECTED] RETRY Tom Van Baak wrote: The HP-10811 oven is sitting happily in a working 5328A counter that I'm willing to cannibalize, but do I need to? Is there any reason why I shouldn't put the controler in the 5328 case so I can use it as a counter as well as timing source? 73 - Tom in St. Louis Good idea. Saves you the cost of case, power supply, RF connectors, etc. When you're done consider taking photos of the project. I think many people would be interested in this example of a homebrew GPSDO enhancement to a 5328A. /tvb Hi Tom in St. Louis, I agree with TVB. It would be ashame to cannibalize a good counter, assuming it is working. You could just run the EFC wires (proper shielding, etc.) out of the counter to your GPSDO box if there is not enough room for the GSPDO parts inside. BillWB6BNQ ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
