Re: [time-nuts] Clock level conversion 5V - 3.3V
Thanks to everyone who replied. I probably should have explained that I am familiar with the various options for logic level conversion. It's how those options affect clock noise that I was fuzzy on. Bob's summary definitely helped. SN74LVC1T45 looks to be the winner. Regards, Mark On Thu, 2 Oct 2014 07:07:41 -0400 Bob Camp kb...@n1k.org wrote: Hi It will indeed be better for phase noise to do away with the resistive divider and get faster edges. Of course there are indeed resistive dividers that don’t slow things down. It’s unlikely that a divider with a 10 ohm output impedance is going to tack on to the output of an OCXO. The real point is that (in this case) you can get the job done for less than 10 cents with a single gate chip. They are available in many packages from many people. There are indeed chips that have a bit less noise than others. With the OCXO that we’re talking about here, it’s not worth going crazy to find this or that. This being Time Nuts, if you do decide to go crazy - as long as it’s saturated silicon, faster is more quiet than slower. Bob On Oct 1, 2014, at 9:21 AM, David McGaw n1...@dartmouth.edu wrote: Would it not be better for phase noise to use a logic gate with a fast transition than a resistive divider that would be slower due to the load capacitance? David On 10/1/14 7:09 AM, Bob Camp wrote: Hi Ok, so it’s not a super duper low phase noise OCXO. It’s also at a reasonably high frequency. I’d just drive it into a 5V tolerant input and move on. There are lots of logic gate chips out there that will run from 3.3 and accept 5V inputs. Use something reasonably fast and it will do a pretty good job. Bob On Sep 30, 2014, at 10:11 PM, Mark A. Haun hau...@keteu.org wrote: Hi Bob, The OCXO is one of those 26-MHz ebay Pletronics from a couple years back. I would like to not degrade its close-in phase noise (quoted as -100 dBc @ 10 Hz, -130 dBc @ 100 Hz). Thinking about Said's suggestion to phase lock a higher-frequency sampling clock to this, with a loop BW somewhere in the 10-100 Hz range. I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Mark On Tue, 30 Sep 2014 20:18:56 -0400 Bob Camp kb...@n1k.org wrote: Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Would it not be better for phase noise to use a logic gate with a fast transition than a resistive divider that would be slower due to the load capacitance? David On 10/1/14 7:09 AM, Bob Camp wrote: Hi Ok, so it’s not a super duper low phase noise OCXO. It’s also at a reasonably high frequency. I’d just drive it into a 5V tolerant input and move on. There are lots of logic gate chips out there that will run from 3.3 and accept 5V inputs. Use something reasonably fast and it will do a pretty good job. Bob On Sep 30, 2014, at 10:11 PM, Mark A. Haun hau...@keteu.org wrote: Hi Bob, The OCXO is one of those 26-MHz ebay Pletronics from a couple years back. I would like to not degrade its close-in phase noise (quoted as -100 dBc @ 10 Hz, -130 dBc @ 100 Hz). Thinking about Said's suggestion to phase lock a higher-frequency sampling clock to this, with a loop BW somewhere in the 10-100 Hz range. I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Mark On Tue, 30 Sep 2014 20:18:56 -0400 Bob Camp kb...@n1k.org wrote: Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Hi It will indeed be better for phase noise to do away with the resistive divider and get faster edges. Of course there are indeed resistive dividers that don’t slow things down. It’s unlikely that a divider with a 10 ohm output impedance is going to tack on to the output of an OCXO. The real point is that (in this case) you can get the job done for less than 10 cents with a single gate chip. They are available in many packages from many people. There are indeed chips that have a bit less noise than others. With the OCXO that we’re talking about here, it’s not worth going crazy to find this or that. This being Time Nuts, if you do decide to go crazy - as long as it’s saturated silicon, faster is more quiet than slower. Bob On Oct 1, 2014, at 9:21 AM, David McGaw n1...@dartmouth.edu wrote: Would it not be better for phase noise to use a logic gate with a fast transition than a resistive divider that would be slower due to the load capacitance? David On 10/1/14 7:09 AM, Bob Camp wrote: Hi Ok, so it’s not a super duper low phase noise OCXO. It’s also at a reasonably high frequency. I’d just drive it into a 5V tolerant input and move on. There are lots of logic gate chips out there that will run from 3.3 and accept 5V inputs. Use something reasonably fast and it will do a pretty good job. Bob On Sep 30, 2014, at 10:11 PM, Mark A. Haun hau...@keteu.org wrote: Hi Bob, The OCXO is one of those 26-MHz ebay Pletronics from a couple years back. I would like to not degrade its close-in phase noise (quoted as -100 dBc @ 10 Hz, -130 dBc @ 100 Hz). Thinking about Said's suggestion to phase lock a higher-frequency sampling clock to this, with a loop BW somewhere in the 10-100 Hz range. I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Mark On Tue, 30 Sep 2014 20:18:56 -0400 Bob Camp kb...@n1k.org wrote: Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Hi Ok, so it’s not a super duper low phase noise OCXO. It’s also at a reasonably high frequency. I’d just drive it into a 5V tolerant input and move on. There are lots of logic gate chips out there that will run from 3.3 and accept 5V inputs. Use something reasonably fast and it will do a pretty good job. Bob On Sep 30, 2014, at 10:11 PM, Mark A. Haun hau...@keteu.org wrote: Hi Bob, The OCXO is one of those 26-MHz ebay Pletronics from a couple years back. I would like to not degrade its close-in phase noise (quoted as -100 dBc @ 10 Hz, -130 dBc @ 100 Hz). Thinking about Said's suggestion to phase lock a higher-frequency sampling clock to this, with a loop BW somewhere in the 10-100 Hz range. I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Mark On Tue, 30 Sep 2014 20:18:56 -0400 Bob Camp kb...@n1k.org wrote: Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Hi, More than a matter of personal taste avoiding a resistive divider using a active circuit you could benefit from its low output impedance. With a resistive divider there could be some issues in terms of impedance matching when a load it is present but as been said it all depends on how good that level translation should be. Regards, Vasco Soares - Original Message - From: Hal Murray hmur...@megapathdsl.net To: Discussion of precise time and frequency measurement time-nuts@febo.com Cc: hmur...@megapathdsl.net Sent: Wednesday, October 01, 2014 4:10 AM Subject: Re: [time-nuts] Clock level conversion 5V - 3.3V vesoa...@deea.isel.ipl.pt said: I would suggest some 3.3V logic (inverter) gate with 5V tolerant inputs from Little Logic TI portfolio. There are buffered and unbuffered gate available. What's the advantage of a chip over a pair of resistors? hau...@keteu.org said: I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Power might be one. If it's a long enough run that you need a termination, then the power doesn't cost anything extra. If it's only a few inches, you can use higher values of resistance to save the power. For a given value of resistance and a specific chip, there should be some crossover frequency where the power of the chip matches the power of the resistors. It might be fun to play with the numbers. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
If it were me, I'd avoid the active buffers since there is no need for them when going from higher to lower voltage swings. The output of a buffer/inverter is guaranteed to be at least a little less clean than what you started with. First, check to see if the 5V output really is a 5V signal. If it's TTL, it might swing only to about 3.5V anyway. (Connecting a weak load to ground can make this more pronounced.) Check to see if your 3.3V part's input tolerates 5V signals. The chances may be small, but it might just be that you can go direct with absolutely nothing in between. You could use a resistive divider at the destination device that serves two purposes: both attenuating the signal, and terminating it. In which case it's a win-win. If need be, the resistive divider can add a small DC offset, say if you need to drive 1.8V logic and the OCXO's Vol isn't low enough. Instead of a resistive divider, you might use a schottky switching diode to limit the positive swing. Then you get close to a replica of the OCXO's signal through the switching range of the input pin, with attenuation kicking in only when the voltage starts going too high. I don't know if these devices are still popular, but there are passive FET signal 'limiters' that work in a similar way; the signal passes through unchanged until the instantaneous voltage reaches 3V or so, and then the FET eases off and doesn't pass higher voltages. Some years ago they were popular for making 5V/3.3V signal transitions. They are supposed to have negligible delay (well, you know) when the FET is on, they are bidirectional (not that it matters to you here), and they consume no power. I think the name Quickswitch was one of the brand names, and Pericom and IDT were two of the manufacturers. Regards, Andy ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
About 8 or 9 years ago my HP active 2 way GPS smart splitter died. After taking off the cover, and some troubleshooting, I found that the 5 volt to 3.3 volt regulator was open. Since it was an SMD device, and I did not have a replacement, I just cut the device out, and, using a small piece of wire connected the 5 volts to where the 3.3 volts from the regulator was going. It is still working fine today and has been on continuously. So, in my case at least, in this one sample case, the 5 volts did not damage the 3.3 volt amplifiers in the splitter. Regards - Mike Mike B. Feher, EOZ Inc. 89 Arnold Blvd. Howell, NJ, 07731 732-886-5960 (B) 908-902-3831 (C) -Original Message- From: time-nuts [mailto:time-nuts-boun...@febo.com] On Behalf Of Andy Sent: Wednesday, October 01, 2014 3:50 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] Clock level conversion 5V - 3.3V If it were me, I'd avoid the active buffers since there is no need for them when going from higher to lower voltage swings. The output of a buffer/inverter is guaranteed to be at least a little less clean than what you started with. First, check to see if the 5V output really is a 5V signal. If it's TTL, it might swing only to about 3.5V anyway. (Connecting a weak load to ground can make this more pronounced.) Check to see if your 3.3V part's input tolerates 5V signals. The chances may be small, but it might just be that you can go direct with absolutely nothing in between. You could use a resistive divider at the destination device that serves two purposes: both attenuating the signal, and terminating it. In which case it's a win-win. If need be, the resistive divider can add a small DC offset, say if you need to drive 1.8V logic and the OCXO's Vol isn't low enough. Instead of a resistive divider, you might use a schottky switching diode to limit the positive swing. Then you get close to a replica of the OCXO's signal through the switching range of the input pin, with attenuation kicking in only when the voltage starts going too high. I don't know if these devices are still popular, but there are passive FET signal 'limiters' that work in a similar way; the signal passes through unchanged until the instantaneous voltage reaches 3V or so, and then the FET eases off and doesn't pass higher voltages. Some years ago they were popular for making 5V/3.3V signal transitions. They are supposed to have negligible delay (well, you know) when the FET is on, they are bidirectional (not that it matters to you here), and they consume no power. I think the name Quickswitch was one of the brand names, and Pericom and IDT were two of the manufacturers. Regards, Andy ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
[time-nuts] Clock level conversion 5V - 3.3V
Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
I would suggest some 3.3V logic (inverter) gate with 5V tolerant inputs from Little Logic TI portfolio. There are buffered and unbuffered gate available. Em 2014-09-30 22:46, Mark Haun escreveu: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Mark, Lots of good parts on this page: http://www.onsemi.com/PowerSolutions/parametrics.do?id=648 But as others are pointing out - it depends Regards, John On Tue, Sep 30, 2014 at 2:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
Hi Bob, The OCXO is one of those 26-MHz ebay Pletronics from a couple years back. I would like to not degrade its close-in phase noise (quoted as -100 dBc @ 10 Hz, -130 dBc @ 100 Hz). Thinking about Said's suggestion to phase lock a higher-frequency sampling clock to this, with a loop BW somewhere in the 10-100 Hz range. I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Mark On Tue, 30 Sep 2014 20:18:56 -0400 Bob Camp kb...@n1k.org wrote: Hi How quiet does it need to be? Put another way - how good is the OCXO? What frequency are we talking about? What is the phase noise “need” after you get to 3.3V (is there a system spec)? Bob On Sep 30, 2014, at 5:46 PM, Mark Haun hau...@keteu.org wrote: Is there a best way to do this without adding phase noise? For example, a 5V OCXO into an ADF4002, or a 3.3V or even 1.8V logic input. Is a resistive divider the way to go? Mark ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
Re: [time-nuts] Clock level conversion 5V - 3.3V
vesoa...@deea.isel.ipl.pt said: I would suggest some 3.3V logic (inverter) gate with 5V tolerant inputs from Little Logic TI portfolio. There are buffered and unbuffered gate available. What's the advantage of a chip over a pair of resistors? hau...@keteu.org said: I have seen a resistive divider used in a similar application, but wondered if I could save the couple dozen mA they were spending. Power might be one. If it's a long enough run that you need a termination, then the power doesn't cost anything extra. If it's only a few inches, you can use higher values of resistance to save the power. For a given value of resistance and a specific chip, there should be some crossover frequency where the power of the chip matches the power of the resistors. It might be fun to play with the numbers. -- These are my opinions. I hate spam. ___ time-nuts mailing list -- time-nuts@febo.com To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
