Re: [time-nuts] Hints on PPS Buffer design...

Why 100R? If using a 74xxx logic part as the driver is has a maximum drive current. 100R limits current in case of a short to ground or 5V supply to only 50mA It is about the lowest value resister i'd want to use If you need 50 ohm output them go with an small RF amplifier or a transistors

Re: [time-nuts] Hints on PPS Buffer design...

Clay, as to "why 20 ohms out", there is a long-time-nominal 50 ohm PPS convention that calls for 5V pulses to be delivered into a 50 ohm load. If the driving voltage was 5V and source resistance was 50 ohms, then you'd never get more than 2.5V into the load. Different references across the net

Re: [time-nuts] Hints on PPS Buffer design...

HI > On Jun 17, 2017, at 4:15 AM, Clay Autery wrote: > > Trying to pin down a reasonably optimal buffer design for bringing PPS > out... I've looked at all the references, like the i3detroit.org site > et al. > > Of the few schematics and devices I see, most are using a

Re: [time-nuts] Hints on PPS Buffer design...

On 6/17/2017 4:01 AM, Hal Murray wrote: >> Q3: It's only a 1Hz frequency, but is low inductance a desired trait of the >> chosen resistors? > It's a 1 Hz repetition rate, but the bandwidth depends upon the rise time. > If the rise time is ballpark of 1 ns, the bandwidth will be ballpark of 1 >

Re: [time-nuts] Hints on PPS Buffer design...

Read the spec sheet on the part you are using for a driver. The size of the resistor on the paralleled driver side will be set by the maximum current of the devices. Decide how conservative a design you want. Do you want it to drive into a shorted load and survive? [If each output is rated at 20

Re: [time-nuts] Hints on PPS Buffer design...

caut...@montac.com said: > Q3: It's only a 1Hz frequency, but is low inductance a desired trait of the > chosen resistors? It's a 1 Hz repetition rate, but the bandwidth depends upon the rise time. If the rise time is ballpark of 1 ns, the bandwidth will be ballpark of 1 GHz. So, yes, you

[time-nuts] Hints on PPS Buffer design...

Trying to pin down a reasonably optimal buffer design for bringing PPS out... I've looked at all the references, like the i3detroit.org site et al. Of the few schematics and devices I see, most are using a hex inverter (1 into the other 5 paralleled with series resistors for "balance" and