Hi Attila, have a look at CPPSim.
http://www.cppsim.com/Tutorials/synthesizer_tutorial.pdf
Sebastian
On 07.03.2018 17:42, Attila Kinali wrote:
> Hi,
>
> I have a small side task, where I need to design a PLL system
> As it is a bit non-conventional, I am not confident that my
> pen and paper
Hi,
On 03/07/2018 05:42 PM, Attila Kinali wrote:
> Hi,
>
> I have a small side task, where I need to design a PLL system
> As it is a bit non-conventional, I am not confident that my
> pen and paper analysis is correct and the usuall tool I use
> (Analog's ADPLLsim) doesn't cover it. So my first
Attila wrote:
my first thought
was to use spice to simulate the loop. But I am not sure
how the non-linear effects of the PLL, the divider chains etc
affect the whole system and whether a spice simulation (which
would use a linear approximation of a few components) would
model the system
bject: [time-nuts] How to properly simulate PLLs?
Hi,
I have a small side task, where I need to design a PLL system As it is a bit
non-conventional, I am not confident that my pen and paper analysis is correct
and the usuall tool I use (Analog's ADPLLsim) doesn't cover it. So my first
though
Hi,
I have a small side task, where I need to design a PLL system
As it is a bit non-conventional, I am not confident that my
pen and paper analysis is correct and the usuall tool I use
(Analog's ADPLLsim) doesn't cover it. So my first thought
was to use spice to simulate the loop. But I am not
