On 10/09/11 05:15, Richard (Rick) Karlquist wrote:
This article was in the PTTI proceedings around 1990.
Highly recommended.
This article might be what you refer to:
http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA515384
Cheers,
Magnus
Rick Karlquist
On 9/9/2011 6:58
On 9/10/11 8:57 AM, Magnus Danielson wrote:
On 10/09/11 05:15, Richard (Rick) Karlquist wrote:
This article was in the PTTI proceedings around 1990.
Highly recommended.
This article might be what you refer to:
http://www.dtic.mil/cgi-bin/GetTRDoc?Location=U2doc=GetTRDoc.pdfAD=ADA515384
Thanks, Magnus.
The phrase The JPL units use a ua709-type operational amplifier to
allow a high switching speed with low noise makes me thing a lot about
how the concepts high switching speed and low noise have changed
with time :)
Regards,
Javier
El 10/09/2011 17:57, Magnus Danielson
If you want the original PTTI paper, see:
http://www.pttimeeting.org/archivemeetings/1990papers/Vol%2022_20.pdf
Zero-Crossing Detector with Sub-microsecond Jitter and Crosstalk
G. J. Dick; P. F. Kuhnle; R. L. Sydnor
Note that unlike IEEE, these PTTI and NIST archives are free.
Both have
On 10/09/11 18:11, Jim Lux wrote:
On 9/10/11 8:57 AM, Magnus Danielson wrote:
On 10/09/11 05:15, Richard (Rick) Karlquist wrote:
This article was in the PTTI proceedings around 1990.
Highly recommended.
This article might be what you refer to:
Hi Javier,
On 10/09/11 18:15, Javier Herrero wrote:
Thanks, Magnus.
The phrase The JPL units use a ua709-type operational amplifier to
allow a high switching speed with low noise makes me thing a lot about
how the concepts high switching speed and low noise have changed
with time :)
Yes, it
Hi!
I'm reading on, so sorry for replying soon.
Magnus, what is the next good paper?
cheers -
Henry
Magnus Danielson schrieb:
This paper is however only scratches the surface on bandwidth/gain
analysis in balancing the added noise (per step) and added slew-rate
gain (per step).
--
On 09.09.2011 11:52, Javier Herrero wrote:
I think that the same question that has been discuted here a zillion
times but usually around 10MHz... anyway, what would be the best way
to convert a sine wave to a LVDS clock (preferably duty cycle 50%) at
180MHz?
Texas Instruments suggest a LVDS
Dear Henry,
On 10/09/11 21:23, ehydra wrote:
Hi!
I'm reading on, so sorry for replying soon.
Magnus, what is the next good paper?
Oh, do read the Oliver Collins The Design of Low Jitter Hard Limiters
IEEE transactions on Communications, Vol 44 No 5, May 1996 pp 601-608
Toss in this paper:
On 10/09/11 22:09, Gerhard Hoffmann wrote:
On 09.09.2011 11:52, Javier Herrero wrote:
I think that the same question that has been discuted here a zillion
times but usually around 10MHz... anyway, what would be the best way
to convert a sine wave to a LVDS clock (preferably duty cycle 50%) at
On 9/10/11 9:38 AM, Magnus Danielson wrote:
Probably, but the horology server seems to have gone offline, which is
sad since it was a good place to find almost all of Greenhalls papers.
Interesting.. I just checked inside the firewall, and the hostname isn't
valid (so it's not just that it's
Thanks Magnus!
I have no access to IEEE papers.
I read Bruce' pages already.
- Henry
Magnus Danielson schrieb:
Oh, do read the Oliver Collins The Design of Low Jitter Hard Limiters
IEEE transactions on Communications, Vol 44 No 5, May 1996 pp 601-608
Toss in this paper:
...@arcor.de
To: Discussion of precise time and frequency measurement time-nuts@febo.com
Sent: Sunday, September 11, 2011 12:02 AM
Subject: Re: [time-nuts] Sine to LVDS
Thanks Magnus!
I have no access to IEEE papers.
I read Bruce' pages already.
- Henry
Magnus Danielson schrieb:
Oh, do read
...
From: ehydraehy...@arcor.de
To: Discussion of precise time and frequency measurementtime-nuts@febo.com
Sent: Sunday, September 11, 2011 12:02 AM
Subject: Re: [time-nuts] Sine to LVDS
Thanks Magnus!
I have no access to IEEE papers.
It's a fairly recent paper (1996, I think), so odds
He he. For me Key West Florida is a synonym for status 'retired for fun'
or because career end (because already earned enough money for the rest
of life).
- Henry
Jim Lux schrieb:
However, another search does turn up:
Oliver Collins, who now lives in Key West, Florida, ...
So maybe he'd be
, September 11, 2011 12:02 AM
Subject: Re: [time-nuts] Sine to LVDS
Thanks Magnus!
I have no access to IEEE papers.
I read Bruce' pages already.
- Henry
Magnus Danielson schrieb:
Oh, do read the Oliver Collins The Design of Low Jitter Hard Limiters
IEEE transactions on Communications, Vol 44
...
From: ehydraehy...@arcor.de
To: Discussion of precise time and frequency
measurementtime-nuts@febo.com
Sent: Sunday, September 11, 2011 12:02 AM
Subject: Re: [time-nuts] Sine to LVDS
Thanks Magnus!
I have no access to IEEE papers.
It's a fairly recent paper
El 10/09/2011 23:39, Jim Lux escribió:
On 9/10/11 9:15 AM, Javier Herrero wrote:
Thanks, Magnus.
The phrase The JPL units use a ua709-type operational amplifier to
allow a high switching speed with low noise makes me thing a lot about
how the concepts high switching speed and low noise have
El 10/09/2011 22:09, Gerhard Hoffmann escribió:
There is not much you can do with a LVDS signal on the receiving side
but feeding it into
a FPGA or converting it to something else again, introducing further
jitter.
Some ADCs may be able to live with the small differential voltage,
but they
Hello all,
I think that the same question that has been discuted here a zillion
times but usually around 10MHz... anyway, what would be the best way to
convert a sine wave to a LVDS clock (preferably duty cycle 50%) at 180MHz?
Texas Instruments suggest a LVDS receiver as a comparator
Javier Herrero wrote:
Hello all,
I think that the same question that has been discuted here a zillion
times but usually around 10MHz... anyway, what would be the best way
to convert a sine wave to a LVDS clock (preferably duty cycle 50%) at
180MHz?
Texas Instruments suggest a LVDS receiver
Thanks for the reminder :)
Te available 180MHz signal has that level, and it is quite heavily
bandpass filtered, since it comes from a multiplier chain from an 45MHz
OCXO, so the ADCMP604 will fit nicely
Best regards,
Javier
El 09/09/2011 13:07, Bruce Griffiths escribió:
Javier Herrero
Hi Bruce -
Do you have a reference to read on for this?
Thanks -
Henry
Bruce Griffiths schrieb:
Sub picosecond jitter is feasible if one cascades a series of low pass
filtered limiter stages.
--
ehydra.dyndns.info
___
time-nuts mailing list --
On 9/9/11 6:37 AM, ehydra wrote:
Hi Bruce -
Do you have a reference to read on for this?
I imagine that's the standard cascade of limiters used in zero crossing
detectors..
google for JPL and Greenhall to get started. I can't remember the exact
cite (or even if Greenhall was one of the
I had similar need some time ago and
I found that a differential pair with two (pnp) BFR93
worked much better than any comparator(three or four tested, but not the
adcmp604).
(was a pll reference and I judged the impact of such
observing the phase noise at microwaves).
lc.
ct1dmk.
On
Holzworth's HX2410
http://www.holzworth.com/Spec_sheets/HX2410_Web_Datasheet.pdf claims
femtosecond jitter albeit with CMOS outputs.
This is difficult to achieve (especially at the lower end of its input
frequency range) with a comparator with 1ps of internal jitter.
A simple differential
Jim Lux wrote:
On 9/9/11 6:37 AM, ehydra wrote:
Hi Bruce -
Do you have a reference to read on for this?
I imagine that's the standard cascade of limiters used in zero
crossing detectors..
google for JPL and Greenhall to get started. I can't remember the
exact cite (or even if Greenhall
El 09/09/2011 21:16, Bruce Griffiths escribió:
Since the input signal slew rate is so high a transformer with a
centre tap biased halfway between the LVDS input levels with a pair of
inverse parallel clamp diodes across the secondary plus a couple of
low value series resistors between the
I don't have one handy, but didn't the Motorola ECL manual or maybe application
guide show how to make wideband circuits (comparators for example) out of ECL
gates. (1989 was the last time I did any ECL. What a pain in the arse
technology.)
___
li...@lazygranch.com wrote:
I don't have one handy, but didn't the Motorola ECL manual or maybe application
guide show how to make wideband circuits (comparators for example) out of ECL
gates. (1989 was the last time I did any ECL. What a pain in the arse
technology.)
This article was in the PTTI proceedings around 1990.
Highly recommended.
Rick Karlquist
On 9/9/2011 6:58 AM, Jim Lux wrote:
On 9/9/11 6:37 AM, ehydra wrote:
Hi Bruce -
Do you have a reference to read on for this?
I imagine that's the standard cascade of limiters used in zero crossing
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