Am 29.06.20 um 20:48 schrieb Gerhard Hoffmann:
eternity, with CMOS being so slow that interoperability with CMOS was
not an advantage.
ooohps, sorry: substitute / interoperability with CMOS /
interoperability with TTL /
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Am 29.06.20 um 19:35 schrieb Mark Spencer:
I am also wondering a bit about the possible impact of my 5370B's having a
maximum trigger setting of approx 2.18 volts vis a vis the typical specs for 5
volt TTL signals that typically define a logic 1 as having a slightly higher
voltage ? Would
Hi:
After a long break I am spending a bit of time looking at my time nuts gear. I
have started looking at the properties of the various 1 pps signals I have
access to.
Other than routing the signals via Coaxial cable into instruments with a high
impedance input (the documentation for some
