Re: [time-nuts] Finally, Success

2014-09-16 Thread Hal Murray

mag...@rubidium.dyndns.org said:
[snip long discussion of PID/PLL]

 Make sure you have a damping factor of at least 3. 

Is that a general rule for PIDs or something specific to PLLs/GPSDOs?

Where did the value 3 come from?



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Re: [time-nuts] Finally, Success

2014-09-15 Thread Magnus Danielson

Bob,

On 09/15/2014 06:23 PM, Bob Stewart wrote:

My daughter and I were discussing what she does for a living with time and phase as a 
geophysicist and relating that to what I'm trying to do with my GPSDOengine.  I explained 
that I was trying to keep the frequency accurate and stable, while also keeping the phase 
near a target of 180 degrees.  And suddenly, I realized that that's not what I was 
actually doing.  For the I term of PID, I was integrating on phase position, 
which was never going to work.

So, I made a change to start integrating on the phase change from second to 
second (i.e. frequency error), and I think this is finally performing 
correctly.  The DAC is now very flat, and the phase is moving around as would 
be expected from Bob's and Tom's comments on the LEA-6T.  Here's an ADEV of the 
GPSDO's OCXO vs the 10811 in my 5335A.  It covers a timeframe from about 
11:00PM last night to about 11:00AM this morning.  This is with the PID running 
as a PI controller with very small P and I gain values.


http://evoria.net/AE6RV/TIC/GPSDO.vs.HP10811.png


For a PID PLL you need to build the phase error properly one way or 
another being


PE = phase_ref - phase_out

If you use a TIC, the time difference is simply a variant of the PE 
value (phase_out to start and phase_ref to stop channels). It may be 
useful to have a offset value that can be subtracted numerically.


A PID on this then becomes
f = (PE - PE_prev)/t0
PE_prev = PE
Vi = Vi + I*PE
Vf = Vi + P*PE + D*f

Integrating on the derivate of PE helps in one particular case, when the 
frequency error is so large that it doesn't lock up easily. This is done 
like this:


f = (PE - PE_prev)/t0
PE_prev = PE
Vi = Vi + I*PE + F*f
Vf = Vi + P*PE + D*f

As you increase the F factor, the rate of frequency learning of I goes 
quicker, and steers the exponential relaxation of the frequency error 
before the beat frequency becomes so low that the phase-lock takes over.


As we (me and Warren) had a long thread before, turning up F is the same 
as turning up P.


P is proportional to the damping factor
P is proportional to the PLL bandwidth
I is proportional to the square of the PLL bandwidth

Sounds like you had too low P value.

I could write the exact formulas up, they are easy to derivate with 
paper and pen. It is also textbook material.


Make sure you have a damping factor of at least 3.

Hope it helps.

Cheers,
Magnus
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