Debug sessions may have left enabled laws.
Changing lawbar with an unkown enabled tgtid could cause problems.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
---
drivers/misc/fsl_law.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/misc/fsl_law.c
This allows a second core to restart without causing a PIC reset.
Internal interupt changes:
Enable L2 error interrupt IIVPR0 and give it vector 0x100.
Use correct interrupt (8) for mpc8572 pcie3.
Add pcie3 interrupt (11) for mpc8536ds.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
---
The flash_unlock_seq requires a sector for AMD_LEGACY.
Fix a retcode check typeo.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
---
This patch is needed to make flash work on an internal testcard.
drivers/mtd/cfi_flash.c |8 +---
1 files changed, 5 insertions(+), 3 deletions(-)
diff
Fixes boot crash from bad string pointers in get_table_entry_name
when flash is erased or differs from current u-boot image.
Remove .fixup from .text section since __fixup_entries is only calculated
from .reloc section.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
---
tested with
Forcing the tables into got2 caused extra relocation when using -mrelocatable.
This patch requires any board defining CONFIG_BIOSEMU to use -mrelocatable.
Signed-off-by: Ed Swarthout [EMAIL PROTECTED]
---
The only boards which define CONFIG_BIOSEMU are:
MPC8536DS, MPC8572DS, MPC8544DS,
Dear Martin Jarman,
In message [EMAIL PROTECTED] you wrote:
I have an Atmel atngw100 development board and a standalone application that
crashes within 10 to 30 seconds of starting. I have just discovered that
Are other applications (including U-Boot itself and maybe Linux)
running fine?
Hello
Studying the ARM/Versatile port of U-Boot in order to understand
booting and initialization nuances.
As per documentation from http://infocenter.arm.com/ SDRAM on this
platform is selected by CS#0 and gets mapped in 0x_ -
0x0800_. Versatile configuration defines
Hy Sylvain,
I have a custom Lite5200B based board with two S29GL128 expansion flash
in two banks (CS0/CSBOOT, CS1) in 8 bit mode.
This is my flash configuration in my config/board.h file. AFAIK the
U-Boot CFI driver detects the flash chip mode, so the configuration is
quite simple.
Hi Nobuhiro,
I have tested your patch and it works well.
Thank you for great work.
--
View this message in context:
http://www.nabble.com/Run-hello-world-with-Uboot-%21-tp19851315p19894599.html
Sent from the Uboot - Users mailing list archive at Nabble.com.
Le mercredi 08 octobre 2008 à 10:54 +0200, Remy Bohmer a écrit :
I made it 2 seperate patches. The 1st of this series is fully tested and
correct
on at least the AT91SAM9261 cores. I hope it fixes the known problems on
AT91SAM9263 (and other) cores also, maybe Stelian can verify this.
If it
Hi,
On Thu, Oct 09, 2008 at 01:01:04PM +0800, Liu Dave-R63238 wrote:
Hello Anton,
1)
I strongly suggest you use the hardware reset configuration word from
flash,
not from FPGA.
Well, then we always have to re-flash the u-boot for every change
of the SGMII/RGMII setup... not very
On 10:54 Wed 08 Oct , Remy Bohmer wrote:
The max packet size is encoded as 0,1,2,3 for 8,16,32,64 bytes.
At some places directly 8,16,32,64 was used instead of the encoded
value. Made a enum for the options to make this more clear and to help
preventing similar errors in the future.
From: Sascha Laue [EMAIL PROTECTED]
Signed-off-by: Sascha Laue [EMAIL PROTECTED]
---
board/lwmon5/lwmon5.c | 44 +++-
1 files changed, 39 insertions(+), 5 deletions(-)
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
index 8975bfd..5e310f4
Dear [EMAIL PROTECTED],
In message [EMAIL PROTECTED] you wrote:
From: Sascha Laue [EMAIL PROTECTED]
Please remove this from the message body.
@@ -207,6 +207,15 @@ int misc_init_r(void)
/*
* USB suff...
*/
+
+ /* Reset USB peripherie */
+ mtsdr(SDR0_SRST0,
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message [EMAIL PROTECTED] you wrote:
if (dev-status == 0)
return dev-act_len;
please add {} to if too or remove the else
- else
+ else {
+ /* Let's wait a while for the timeout to elaps.
+* it has no
I am using u-boot on the Avnet V5FX30T (Xilinx FPGA, PPC440) eval board
to boot a Linux 2.6.27-rc4 kernel. I can use u-boot to tftp the kernel,
ramdisk, and device tree blob to RAM and boot from there OK. I copied
the kernel, ramdisk and blob to flash and verified those elements were
programmed
On Thursday 09 October 2008 13:25, [EMAIL PROTECTED] wrote:
From: Sascha Laue [EMAIL PROTECTED]
Signed-off-by: Sascha Laue [EMAIL PROTECTED]
---
board/lwmon5/lwmon5.c | 44 +++-
1 files changed, 39 insertions(+), 5 deletions(-)
diff --git
Hi all,
Im trying to use a physmap driver for NOR and NAND flash devices.
With NOR, everything ok. It uses CFI driver.
The problem is with NAND, cause it is connected at Freescale
LocalBus UPM, and at a first look, the UPM driver is loading after the
physmap (lines 14-15 in kernel output)
Here
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 14:58 Wed 08 Oct , Bartlomiej Sieka wrote:
[dropped [EMAIL PROTECTED] and [EMAIL PROTECTED] from CC]
Hi Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 15:26 Wed 01 Oct , Bartlomiej Sieka wrote:
Signed-off-by: Bartlomiej Sieka
Le jeudi 09 octobre 2008 à 11:51 +0200, Remy Bohmer a écrit :
Looking at the logging, it seems that communication to the root hub
itself is working properly, but everything to the bus fails.
Are you sure that _all_ peripheral clocks are running? Are you sure
that the 48MHz clock is running
Hello Stelian,
It still doesn't help (on AT91SAM9263):
grmbl...
I believe this has to be debugged on this specific controller, since I
do not have one here I cannot debug it myself... :-(
At least we made a large step forward on many other cores, but
apparently we are not there yet for all
The lib_ppc/board.c file will fill in the bi_opbfreq variable
in the bd_t structure for PowerPC 4xx platforms. However, it
currently seems to be coupled together with the bi_pci_busfreq
variable under a series of ifdefs for particular CPU types.
As a result, it is rather easy to miss getting
On Thu, Oct 09, 2008 at 04:59:54PM +0200, Stefan Roese wrote:
On Thursday 09 October 2008, Markus Klotzbücher wrote:
On Thu, Oct 09, 2008 at 03:19:22PM +0200, Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message [EMAIL PROTECTED] you wrote:
if (dev-status
Stefan Roese wrote:
On Thursday 09 October 2008, Markus Klotzbücher wrote:
On Thu, Oct 09, 2008 at 03:19:22PM +0200, Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message [EMAIL PROTECTED] you wrote:
if (dev-status == 0)
return dev-act_len;
please add {} to if
Subject: [PATCH 01/13 v3] ARM: OMAP3: Add pin mux, clock and cpu headers
From: Dirk Behme [EMAIL PROTECTED]
Add pin mux, clock and cpu header files for OMAP3.
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Replace space by tabs in headers as proposed by
Subject: [PATCH 02/13 v3] ARM: OMAP3: Add i2c, memory and additional pin mux
headers
From: Dirk Behme [EMAIL PROTECTED]
Add OMAP3 I2C, memory and additional pin mux headers
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Replace space by tabs in headers as proposed
Subject: [PATCH 05/13 v3] ARM: OMAP3: Add lowlevel init and sys_info common
files
From: Dirk Behme [EMAIL PROTECTED]
Add assembly lowlevel init and sys_info common files
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Add detection and support for 128MB/256MB RAM by
Subject: [PATCH 06/13 v3] ARM: OMAP3: Add board, clock and interrupts common
files
From: Dirk Behme [EMAIL PROTECTED]
Add board, clock, cpu and interrupts common files
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Add detection and support for 128MB/256MB RAM by
Subject: [PATCH 07/13 v3] ARM: OMAP3: Add memory and syslib common files
From: Dirk Behme [EMAIL PROTECTED]
Add memory and syslib common files.
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Add detection and support for 128MB/256MB RAM by Mans Rullgard
Changes in
Subject: [PATCH 09/13 v3] ARM: OMAP3: Add MMC support
From: Dirk Behme [EMAIL PROTECTED]
Add MMC support
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in v2:
- Move MMC driver to drivers/mmc/ as suggested by Haavard Skinnemoen. Thanks!
---
drivers/mmc/Makefile
Subject: [PATCH 11/13 v3] ARM: OMAP3: Add BeagleBoard
From: Dirk Behme [EMAIL PROTECTED]
Add BeagleBoard
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v2:
- Rebase against u-boot-arm.git next (CFG vs. CONFIG changes)
Makefile |7
Subject: [PATCH 12/13 v3] ARM: OMAP3: Add EVM board
From: Dirk Behme [EMAIL PROTECTED]
Add EVM board
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v2:
- Rebase against u-boot-arm.git next (CFG vs. CONFIG changes)
Makefile|3
Subject: [PATCH 13/13 v3] ARM: OMAP3: Add Overo board
From: Dirk Behme [EMAIL PROTECTED]
Add Overo board
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v2:
- Rebase against u-boot-arm.git next (CFG vs. CONFIG changes)
Makefile |3
Subject: [PATCH 08/13 v3] ARM: OMAP3: Add NAND support
From: Dirk Behme [EMAIL PROTECTED]
Add NAND support
Signed-off-by: Dirk Behme [EMAIL PROTECTED]
---
Changes in version v3:
- Fix/update NAND driver and seperate it into an own patch as proposed by Scott
Wood
drivers/mtd/nand/Makefile
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
This supercedes the previous pull request. This includes Wolfgang's and Kumar's
patches.
Haiying Wang (3):
Minor fixes for I2C address on MPC8572DS
Add ID EEPROM support for MPC8572DS
Dear Alemao,
In message [EMAIL PROTECTED] you wrote:
Im trying to use a physmap driver for NOR and NAND flash devices.
As you even committed yourself, this is off tiopic here. Please post
such requests to the appropriate mailing lists, not here.
Best regards,
Wolfgang Denk
--
DENX
Dear Markus =?iso-8859-1?Q?Klotzb=FCcher?=,
In message [EMAIL PROTECTED] you wrote:
if (dev-status == 0)
return dev-act_len;
please add {} to if too or remove the else
- else
+ else {
+ /* Let's wait a while for the timeout
On Thu, Oct 09, 2008 at 08:45:21PM +0200, Wolfgang Denk wrote:
In message [EMAIL PROTECTED] you wrote:
- else
+ else {
+ /* Let's wait a while for the timeout to elaps.
+* it has no real use, but it keeps the interface
happy. */
Hi All,
I am trying to fully relocate U-Boot out of the Boot Flash into RAM
on my i386 (AMD sc520) board in order to allow the Boot Flash to be
flashed from within U-Boot itself (upgrade in place)
I have added code to patch the command table so all the code can
be relocated. Further
Sylvain Lamontagne wrote:
Hi again everyone
I tried a lot of stuff today but was still unable get it to work.
Here is my Flash configuration:
/*
* Flash configuration
*/
#define CFG_FLASH_BASE 0xFF00
#define CFG_FLASH_SIZE 0x100
//#define CFG_ENV_ADDR
Curran, Tom wrote:
I am using u-boot on the Avnet V5FX30T (Xilinx FPGA, PPC440) eval board
to boot a Linux 2.6.27-rc4 kernel. I can use u-boot to tftp the kernel,
ramdisk, and device tree blob to RAM and boot from there OK. I copied
the kernel, ramdisk and blob to flash and verified those
On Sep 30, 2008, at 3:55 AM, Wolfgang Grandegger wrote:
Measurements with our MPC8544 board showed that the I2C bus frequency
is wrong by a factor of 1.5. Obviously, the interpretation of the
MPC85xx_PORDEVSR2_SEC_CFG bit of the cfg_sec_freq register is not
correct. There seems to be an
From: Liu Yu [EMAIL PROTECTED]
The pixis sgmii command depend on the FPGA support on the board, some 85xx
boards support SGMII riser card but did not support this command, define
CONFIG_PIXIS_SGMII_CMD for those boards which support the sgmii command.
Not like 8544, 8572 has 4 eTsec so that the
From: Liu Yu [EMAIL PROTECTED]
This patch based on Andy's work.
Including command 'pixis_set_sgmii' support.
Signed-off-by: Liu Yu [EMAIL PROTECTED]
---
board/freescale/mpc8572ds/mpc8572ds.c | 48 +
include/configs/MPC8572DS.h | 24
Signed-off-by: Jason Jin [EMAIL PROTECTED]
---
board/freescale/mpc8536ds/mpc8536ds.c | 43 +
include/configs/MPC8536DS.h |3 ++
2 files changed, 46 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c
SGMII and SATA share the serdes on MPC8536 CPU, When SATA disabled and the
driver still try to access the SATA registers, the cpu will hangup.
This patch try to fix this by reading the serdes status before the SATA
initialize.
Signed-off-by: Jason Jin [EMAIL PROTECTED]
---
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