For SoCs, it depends on how the system design intends to make use of
the two processors.
If the design intends to use them as AMP, you should run u-boot for
each processor in sequence to init their peripherals. In this case,
you can adapt u-boot deriving from the openzoom source. If as SMP, you
Hi dinny,
At the uboot level,we will confgiure only one core to boot up the image but we
use two cores.For this usecase, could we use the single cortex-A8 uboot source
code?
Regards,
Naveen
-Original Message-
From: dinny [mailto:dinny...@gmail.com]
Sent: Wednesday, January 07, 2009
From the cpu aspect, it should be the most familiar one with your
CPUs. And try to learn more on your on-board peripherals and devices.
Probably you can find some boards that have similar device
configuration, thus you can reuse some codes, esp. in case that you
should be not familiar with these
Hi Andy,
Thanks for your info.
This points to a hardware problem. Do you have an oscilloscope? Take a
look at the MDIO pin, and see what's being sent, and what the reply is. The
protocol for MDIO is pretty simple. Make sure that the address on the
read request is good, and make sure that
Dear dinny,
In message 5e4d16e90901070137j5695a0e2ye50b3f558c9ef...@mail.gmail.com you
wrote:
From the cpu aspect, it should be the most familiar one with your
CPUs. And try to learn more on your on-board peripherals and devices.
...
On Wed, Jan 7, 2009 at 5:25 PM, Naveen Kumar GADDIPATI
Practicing Physicians in the US
Doctor in over 36 specialties
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Price for new customers - $396
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Hi Denk,
On Wed, Jan 7, 2009 at 6:13 PM, Wolfgang Denk w...@denx.de wrote:
Can you please stop top-posting / full-quoting?
Sure, I corrected it once I had known.
Best Regards
Dinny
--
what we need is passion, chance, and companions.
___
U-Boot
Hi All,
Is there something like ethtool in U-boot that I can use to see what
the network negotiated too. This is a fairly cheap netgear switch so I
do not have any diagnostics on it.
I will also have a look with wireshark when i get back to the lab to
see if I can identify what is happening.
Thanks for ur updates. This topic seems interesting:-)
On Wed, Jan 7, 2009 at 9:37 PM, Nishanth Menon menon.nisha...@gmail.com wrote:
One thing that might be different would be mmu config I would suspect..
you may want to refer to [2] instead of omapzoom as [2] is closer to
mainline u-boot.
On Wed, Jan 7, 2009 at 8:12 AM, dinny dinny...@gmail.com wrote:
[1]
http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344e/index.html
- there is a link to A9 also nearby..
It seems A9's doc is public-restricted, and it prevents me from having
a look at A9's design. Could you
Good morning,
our team is working on a new telematic platform using MPC5121 device. Our Boar
has some features of ADS512101 evaluacion board.
We are not familiar with boot loader system because it's the first time that we
develop a board based on operating system.
We need some basic help
Marco Donadio wrote:
Good morning,
our team is working on a new telematic platform using MPC5121 device.
Our Boar has some features of ADS512101 evaluacion board.
Good. You have a starting point.
We are not familiar with boot loader system because it's the first
time that we develop a
On Wed, Jan 7, 2009 at 3:54 AM, Ajeesh Kumar aje...@tataelxsi.co.in wrote:
Hi Andy,
Thanks for your info.
This points to a hardware problem. Do you have an oscilloscope? Take a
look at the MDIO pin, and see what's being sent, and what the reply is. The
protocol for MDIO is pretty simple.
Loren A. Linden Levy wrote:
Hi All,
Is there something like ethtool in U-boot that I can use to see what
the network negotiated too. This is a fairly cheap netgear switch so I
do not have any diagnostics on it.
I will also have a look with wireshark when i get back to the lab to
see if I
The following patch series intends to support the Micron multi-chip
NAND device MT29F8G08FAB on the TQM8548 modules from TQ-Components.
It makes sense to offer such a multi-chip device as one single device
to the user. Multi-chip devices seem already be supported by the NAND
layer, but U-Boot
This patch adds support for NAND_MAX_CHIPS to the MTD NAND layer.
Multi-chip devices are then displayed as shown:
Device 0: 2x NAND 512MiB 3,3V 8-bit, sector size 128 KiB
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
common/cmd_nand.c | 10 +-
This patch adds support for multi-chip NAND devices to the FSL-UPM
driver. The dev_ready callback of the struct fsl_upm_nand is now
called with the argument chip_nr to allow testing the proper chip
select line. This requires various BSPs to be updated appropriately
and I will provide proper
For the NAND chips on the TQM8548 modules, a special chip-select logic is
used. It uses dedicated address lines to be controlled via UPM machine
address register (mar). This patch adds corresponding support to the
FSL-UPM driver.
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
This patches configures the NAND UPM-FSL driver with multi-chip support
for the Micro MT29F8G08FAB on the TQM8548 modules.
Signed-off-by: Wolfgang Grandegger w...@grandegger.com
---
board/tqc/tqm85xx/nand.c |2 ++
include/configs/TQM85xx.h |4 ++--
2 files changed, 4 insertions(+), 2
ons 2009-01-07 klockan 07:52 -0500 skrev Jerry Van Baren:
Wolfgang Denk wrote:
Dear Ulf Samuelsson,
In message 1231282371.32308.276.ca...@elrond.atmel.com you wrote:
It was tracked down to the autoconfiguration of the
Ethernet PHY, so one of the PHYs ended up in
100 Mbps Half
tis 2009-01-06 klockan 14:48 -0800 skrev Brad Bozarth:
Hmm... looking in the datasheet I have, it says:
Flexible Erase Options
– Page Erase (512 Bytes)
– Block Erase (4 Kbytes)
– Sector Erase (64 Kbytes)
– Chip Erase (32 Mbits)
The dataflash is normally 528/1056 bytes per page.
D versions
ons 2009-01-07 klockan 02:11 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Ulf Pink Boy
please take a look on
Thanks, I saw you committed part of the stuff I provided to the AT91
branch.
FYI: Your patch to at91rm9200dk, disabling the dataflash is wrong.
There is a 2 MB NOR flash *and* an 8
Ulf Samuelsson wrote:
ons 2009-01-07 klockan 07:52 -0500 skrev Jerry Van Baren:
Wolfgang Denk wrote:
Dear Ulf Samuelsson,
In message 1231282371.32308.276.ca...@elrond.atmel.com you wrote:
It was tracked down to the autoconfiguration of the
Ethernet PHY, so one of the PHYs ended up in
100
This patch allows any board implementing the coloured LED API
to control the LEDs from the console.
led [green | yellow | red | all ] [ on | off ]
or
led [ 1 | 2 | 3 | all ] [ on | off ]
Adds configuration item CONFIG_CMD_LED enabling the command.
The coloured led API is available as part
On 20:55 Wed 07 Jan , Ulf Samuelsson wrote:
ons 2009-01-07 klockan 02:11 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Ulf Pink Boy
please take a look on
Thanks, I saw you committed part of the stuff I provided to the AT91
branch.
FYI: Your patch to at91rm9200dk, disabling the
ons 2009-01-07 klockan 02:11 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Ulf Pink Boy
please take a look on
http://git.denx.de/?p=u-boot/u-boot-at91.git;a=shortlog;h=refs/heads/mm
You are aware that moving from the Atmel flash driver to the CFI
driver means that the board support is
This command will allow the user to select if the
SD-card controller (mci) or the SPI is available on
the Multimedia card connector on the at91rm9200ek/dk.
I think that the name is a little too specific
and would like to have it changed to a more generic name.
Today, we only have it for these
Hi,
The AT91 arch use a at45 driver design to be show as a parallel flash
but it's a spi flash.
Haavard add a new spi flash framework which support the dataflash
so the current driver is mark as *depracated* and plan to be remove
New board and cpu must
On Tue, Jan 06, 2009 at 12:03:48PM -0700, Derek Ou wrote:
Hi, all,
In the common/env_nand.c, function env_relocate_spec (for
CONFIG_ENV_OFFSET_REDUND) malloc two memory areas in line 296 and 297.
If it hits line 308 when both environment areas not found, it will
return without freeing
ons 2009-01-07 klockan 21:56 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Hi,
The AT91 arch use a at45 driver design to be show as a parallel flash
but it's a spi flash.
Haavard add a new spi flash framework which support the dataflash
so the current driver is
ons 2009-01-07 klockan 21:42 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
On 21:37 Wed 07 Jan , Ulf Samuelsson wrote:
ons 2009-01-07 klockan 02:11 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Ulf Pink Boy
please take a look on
This addresses the problem described here:
http://lists.denx.de/pipermail/u-boot/2008-December/045029.html
This changes the link scripts of several of the mpcXXX CPUs to include
everything from '.rodata'. Without this, using a recent
powerpc-linux-gnu toolchain (e.g. from CodeSourcery) to build
ons 2009-01-07 klockan 21:04 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
On 20:55 Wed 07 Jan , Ulf Samuelsson wrote:
ons 2009-01-07 klockan 02:11 +0100 skrev Jean-Christophe
PLAGNIOL-VILLARD:
Ulf Pink Boy
please take a look on
Thanks, I saw you committed part of the
I have built u-boot-2008.10 for the ads5121 (from the latest LTIB
sources) under WindowsXP in cygwin. If anyone is interested I have a
set of patches and some instructions.
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MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
support them.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
board/freescale/mpc8315erdb/mpc8315erdb.c | 52 +
include/configs/MPC8315ERDB.h | 21 +++
2 files
MPC837XEMDS boards can support PCI-E via PCI-E riser card. The card
provides two PCI-E (x2) ports. Though, only one port can be used in x2
mode. Two ports can function simultaneously in x1 mode.
PCI-E x1/x2 modes can be switched via pex_x2 environment variable.
Signed-off-by: Anton Vorontsov
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes (Linux).
On Thu, Jan 08, 2009 at 04:26:17AM +0300, Anton Vorontsov wrote:
[...]
+#define CONFIG_SYS_PCIE1_BASE0xA000
+#define CONFIG_SYS_PCIE1_MEM_BASE0xA000
+#define CONFIG_SYS_PCIE1_MEM_PHYS0xA000
+#define CONFIG_SYS_PCIE1_MEM_SIZE0x1000
+#define
MPC8315ERDB boards features PCI-E x1 and Mini PCI-E x1 ports. Let's
support them.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
Acked-by: Dave Liu dave...@freescale.com
___
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U-Boot@lists.denx.de
+ /* Deassert the resets in the control register */
+ out_be32(sysconf-pecr1, 0xE0008000);
+ if (!pex2)
+ out_be32(sysconf-pecr2, 0xE0008000);
+ udelay(2000);
+
+ /* Configure PCI Express Local Access Windows */
+ out_be32(pcie_law[0].bar,
This patch adds support for MPC83xx PCI-E controllers in Root Complex
mode.
The patch is based on Tony Li and Dave Liu work[1].
Though unlike the original patch, by default we don't register PCI-E
buses for use in U-Boot, we only configure the controllers for future
use in other OSes
+static void mpc83xx_pcie_register_hose(int bus, struct
pci_region *reg,
+u8 link)
+{
+ extern void disable_addr_trans(void); /* start.S */
+ static struct pci_controller pcie_hose[PCIE_MAX_BUSES];
If PCIe use the hose which is different from PCI
+static void mpc83xx_pcie_register_hose(int bus, struct
pci_region *reg,
+ u8 link)
+{
+ extern void disable_addr_trans(void); /* start.S */
+ static struct pci_controller pcie_hose[PCIE_MAX_BUSES];
If PCIe use the hose which is different from PCI
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