Hi
2009/4/28 alfred steele alfred.jaq...@gmail.com:
Hi Magnus,
But when i tried burning u-boot-nand.bin to the base address and
boot , i get only one line printed on the console which is
U-Boot 2009.01 (Apr 28 2009 - 15:27:19)
If it comes that far it looks like a lot is working. Don't
On Monday 27 April 2009, Kazuaki Ichinohe wrote:
I sent the SATA patch mail on April 17.
However, the following content is not confirmed, and there is not a reply
either. Could you confirm it?
I re-send the SATA driver patch.
I failed applying your patch:
Applying: Canyonlands SATA harddisk
From: Matthias Fuchs matthias.fu...@esd-electronics.com
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
board/esd/dp405/dp405.c | 32 ++--
1 files changed, 26 insertions(+), 6 deletions(-)
diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c
index
From: Matthias Fuchs matthias.fu...@esd-electronics.com
This patch adds support for an address parameter to esd's
cpld command. This is in preparation to remove compiled-in
binary cpld (xsvf) bitstreams.
Signed-off-by: Matthias Fuchs matthias.fu...@esd.eu
---
Hi Wolfgang,
please pull one patch which I missed pushing:
The following changes since commit 4d9eab89b3b2c2ed432b14d355a56f274d8aac75:
Wolfgang Denk (1):
cmd_ext2.c: fix compile warnings
are available in the git repository at:
git://www.denx.de/git/u-boot-cfi-flash.git master
On Tue, 28 Apr 2009, Daniel Stenberg wrote:
Jean-Christophe, as PXA custodian, do you have any further thoughts on how
to combine common code in a clever way to reduce duplcations?
Since there was no feedback on this, I investigated a little further and I
noticed that several existing ARM
Hi,
Is existing a way to globally disable some features such as ethernet
or Nand support, instead of doing it for a specific board?
More over, I can't disable ethernet on the at91sam9261ek board by
simply disable the #define CONFIG_DRIVER_DM9000 in the
'config/at91sam9261ek.h' file so it cause
Dear simon polette,
In message 72795ccb0904290301h1678e99br6fe3cfb0b4226...@mail.gmail.com you
wrote:
Is existing a way to globally disable some features such as ethernet
or Nand support, instead of doing it for a specific board?
No, you cannot do this globally. Board configuration is
From: prafulla_wadaskar prafu...@marvell.com
This is Marvell's 88F6281_A0 based custom board developed
for wireless access point product
This patch is tested for-
1. Boot from DRAM/SPI flash/NFS
2. File transfer using tftp and loadb
3. SPI flash read/write/erase
4. Booting Linux kernel and RFS
Kumar Gala ga...@kernel.crashing.org wrote on 27/04/2009 16:12:35:
From:
Kumar Gala ga...@kernel.crashing.org
To:
Joakim Tjernlund joakim.tjernl...@transmode.se
Cc:
Scott Wood scottw...@freescale.com, u-boot@lists.denx.de
Date:
27/04/2009 16:15
Subject:
Re: [U-Boot]
Kirkwood family controllers are highly integrated SOCs
based on Feroceon-88FR131/Sheeva-88SV131 cpu core.
SOC versions supported:-
1) 88F6281-A0 define CONFIG_KW88F6281_A0
2) 88F6192-A0 define CONFIG_KW88F6192_A0
Other supported features:-
1) get_random_hex() fucntion
2) SPI port
I think I got the mapping of memory space now, thanks.
A few questions though. I have noted that some boards map the PCI IO
space
to 0x0 and some use the same address space as the CPU. If I use
the CPU address space as PCI IO space I get(in linux):
PCI :00 Cannot reserve Legacy IO
Hi Alfred,
--- On Tue, 4/28/09, alfred steele alfred.jaq...@gmail.com wrote:
Looks like somethings messed up in the NAND detection in
the first
place. I am using Redboot FIS to burn the
u-boot-nand.bin . I
know it ignores bad blocks but i had used successfully to
burn in the
The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value
from '0xa' to '0x8'. This is the mask we use for all TI releases.
Signed-off-by: Sandeep Paulraj s-paul...@ti.com
---
include/asm-arm/arch-davinci/nand_defs.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
Patch adds Support for DaVinci DM357. This has been tested on a DM357
EVM. It boots of a small page NAND on the EVM.
This SOC is very similar to the DM644x.
The DM357 EVM has 2 NANDs, one small page NAND and another large page NAND.
But the device can only boot of the small page NAND. It does not
Kumar Gala ga...@kernel.crashing.org wrote on 29/04/2009 14:35:19:
I think I got the mapping of memory space now, thanks.
A few questions though. I have noted that some boards map the PCI IO
space
to 0x0 and some use the same address space as the CPU. If I use
the CPU address space
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Patch adds support for DaVinci DM365.
It does not have the DM9000 like the DM355 but has capability
for 4 BIT ECC correction just like DM355.
This patch lacks 2 features
1) No 4 BIT ECC correction. We will add support for 4 BIT ECC correction
to the NAND driver(davinci_nand.c) soon so that
Hi Magnus,
Thanks.
If it comes that far it looks like a lot is working. Don't know why
the rest isn't though.
At this point, it should be showing up the processor info. I am using
a custom board with a different flash part. Samsung(KR series), and i
guess it is part of nand_id table as i have
Wolfgang Denk wrote:
Dear Ladislav Michl,
In message 20090428151147.ga19...@linux-mips.org you wrote:
a lot of changes are entering arm tree, many without any commit message.
And now we have some special cases which needs some special care for yet
unclear reason. OMAP3 timer precission was
At this point, it should be showing up the processor info. I am using
a custom board with a different flash part. Samsung(KR series), and i
guess it is part of nand_id table as i have used that to get my other
version (patches form internal fresclae git) up and running. But i
believe the
Dear Dirk,
in message 49f884e4.3050...@googlemail.com you wrote:
Just in case there is any doubt here:
There is no, and I say *no*, mandatory verification of any timing
precision in U-Boot.
We all agree that precision is a good thing to have, it it must come
at a reasonable
On Wednesday 29 April 2009, s-paul...@ti.com wrote:
+.globl dv_board_init
+dv_board_init:
+
+ mov pc, lr
Surely you can eliminate a file containing only such a
useless NOP function...
+#define CONFIG_SOC_DM644X
Hmm, I'd have expected a CONFIG_SOC_DM357. No DSP
(and so why were
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/qe/qe.c|3 ---
drivers/qe/qe.h| 15 ++-
drivers/qe/uec.c
MPC8569MDS board needs more memory for malloc because it will support four
Ethernet interfaces.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/configs/MPC8569MDS.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8569MDS.h
Signed-off-by: Haiying Wang haiying.w...@freescale.com
Signed-off-by: Yu Liu yu@freescale.com
---
include/configs/MPC8569MDS.h | 10 +-
1 files changed, 9 insertions(+), 1 deletions(-)
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index b0af5dc..2cba98f
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
cpu/mpc85xx/cpu.c|4
cpu/mpc85xx/speed.c | 13 +
include/asm-ppc/immap_85xx.h |2 ++
include/e500.h |1 +
4 files changed, 20 insertions(+), 0 deletions(-)
diff --git
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/bcsr.c |4
board/freescale/mpc8569mds/mpc8569mds.c | 30 ++
include/configs/MPC8569MDS.h| 23 +++
3 files changed, 57 insertions(+),
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define
those pins before using UART1.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
board/freescale/mpc8569mds/mpc8569mds.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git
MPC8569 has 128K bytes MURAM.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
include/asm-ppc/immap_qe.h |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index 9530b29..7613b5c 100644
---
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is more accurate.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.
Signed-off-by: Haiying Wang haiying.w...@freescale.com
---
drivers/qe/qe.c| 13 +++--
drivers/qe/qe.h|1 -
include/asm-ppc/immap_qe.h |3 +++
3 files changed, 14
Dave,
Please see inline.
-Original Message-
From: David Brownell [mailto:davi...@pacbell.net]
Sent: Wednesday, April 29, 2009 2:09 PM
To: Paulraj, Sandeep; u-boot@lists.denx.de
Cc: davinci-linux-open-sou...@linux.davincidsp.com
Subject: Re: [PATCH v2] ARM DaVinci: Adding DM357
On Wednesday 29 April 2009, Paulraj, Sandeep wrote:
Any other comments?
Not for now
___
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U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Patch adds Support for DaVinci DM357.
It boots of a small page NAND on the EVM.
The DM357 EVM has 2 NANDs, one small page NAND and another large page NAND.
But the device can only boot of the small page NAND. It does not have NOR
support. This patch has been tested on the DM357 EVM.
Version 3
Detlev Zundel wrote:
As I said, I understand now why there were different data-types involved
although this was kind of non-obvious. So I take it, you had a working
configuration with REG_SIZE = 4, correct?
I might be unclear. I used to use REG_SIZE = -16, as 16550 registers
are located at 0,
Shinya Kuribayashi wrote:
Detlev Zundel wrote:
As I said, I understand now why there were different data-types involved
although this was kind of non-obvious. So I take it, you had a working
configuration with REG_SIZE = 4, correct?
I might be unclear. I used to use REG_SIZE = -16, as
On Tue, Apr 28, 2009 at 7:04 PM, Ben Warren biggerbadder...@gmail.com wrote:
This will make CONFIG_NET_MULTI the only net driver configuration and
we'll be able to remove this option.
Could we add a #warning somewhere to tell people who are not using
CONFIG_NET_MULTI that they need to move
On 12:50 Thu 23 Apr , Ladislav Michl wrote:
On Thu, Apr 23, 2009 at 09:34:21AM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote:
On 01:12 Wed 22 Apr , Ladislav Michl wrote:
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.
Changes since
On 19:47 Tue 28 Apr , Wolfgang Denk wrote:
Dear Ladislav Michl,
In message 20090428151147.ga19...@linux-mips.org you wrote:
a lot of changes are entering arm tree, many without any commit message.
And now we have some special cases which needs some special care for yet
unclear
On 14:11 Wed 29 Apr , Andy Fleming wrote:
On Tue, Apr 28, 2009 at 7:04 PM, Ben Warren biggerbadder...@gmail.com wrote:
This will make CONFIG_NET_MULTI the only net driver configuration and
we'll be able to remove this option.
Could we add a #warning somewhere to tell people who are
All,
I am experiencing a machine check on a custom AMCC 405EX PPC board. Our board
is based on the AMCC Kilauea evaluation board. We have a few of these boards
that are up and running, but I am trying to track down a machine check error on
a couple of them.
My question for you is this:
On 10:12 Tue 28 Apr , Ben Warren wrote:
Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c
Signed-off-by: Ben Warren biggerbadder...@gmail.com
---
board/davinci/common/misc.h |
Hi J-C,
Jean-Christophe PLAGNIOL-VILLARD wrote:
snip
+/*
+ * * Initializes on-chip ethernet controllers.
+ * * to override, implement board_eth_init()
+ **/
+int cpu_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DRIVER_TI_EMAC)
+dm644x_emac_initialize();
+#endif
+return 0;
On 13:29 Wed 29 Apr , Ben Warren wrote:
Hi J-C,
Jean-Christophe PLAGNIOL-VILLARD wrote:
snip
+/*
+ * * Initializes on-chip ethernet controllers.
+ * * to override, implement board_eth_init()
+ **/
+int cpu_eth_init(bd_t *bis)
+{
+#if defined(CONFIG_DRIVER_TI_EMAC)
+
On 10:41 Tue 28 Apr , Tom Rix wrote:
This patch controls the large LED on the top left of the zoom2.
Signed-off-by: Tom Rix tom@windriver.com
---
board/omap3/zoom2/Makefile|8 ++-
board/omap3/zoom2/led.c | 125
+
On 10:41 Tue 28 Apr , Tom Rix wrote:
Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
The default serial is from the USB connector on left side of the debug board.
The USB connector will produce 2 of the 4 UARTS. On your host pick the first
enumeration.
The
On 10:41 Tue 28 Apr , Tom Rix wrote:
The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com
This is a pdf of the product
On 10:41 Tue 28 Apr , Tom Rix wrote:
Port the linux kernel's omap gpio interface to u-boot.
The orignal source is in linux/arch/arm/plat-omap/gpio.c
please specify against which kernel commit you import it
Best Regards,
J.
___
U-Boot mailing list
On 10:41 Tue 28 Apr , Tom Rix wrote:
Zoom2 is a new board from Texas Instruments and LogicPD
The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com
This is a pdf of the product
Hi all,
Actually all the new board or nearly is add to the MAKEALL
As point by Kumar it's start to be a huge database
I think we need a better policy to add boards in it
As it will hard at the end to maintain
Personnaly, I'll have in mind to add ref
On 11:49 Wed 29 Apr , Daniel Stenberg wrote:
On Tue, 28 Apr 2009, Daniel Stenberg wrote:
Jean-Christophe, as PXA custodian, do you have any further thoughts on how
to combine common code in a clever way to reduce duplcations?
Since there was no feedback on this, I investigated a
On Wednesday 29 April 2009 17:21:36 Jean-Christophe PLAGNIOL-VILLARD wrote:
Actually all the new board or nearly is add to the MAKEALL
As point by Kumar it's start to be a huge database
I think we need a better policy to add boards in it
As it will hard at the end to
On Thu, Feb 19, 2009 at 08:56:50PM +0100, Wolfgang Denk wrote:
Dear Anton Vorontsov,
In message 20090219154545.gb26...@oksana.dev.rtsoft.ru you wrote:
So far it's used for specifying whether we want to use FSL DR USB or
FSL eSDHC devices on MPC837X processors.
There are two more
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.
The function adds status = disabled propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
drivers/mmc/fsl_esdhc.c
This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).
FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify
This patch implements simple hwconfig infrastructure: an
interface for software knobs to control a hardware.
This is very simple implementation, i.e. it is implemented
via `hwconfig' environment variable. Later we could write
some hwconfig enable|disable|list commands, ncurses
interface for Award
We should add status = disabled property when USB controller can't
be used (for example when USB pins muxed away to another device).
Also convert whole fdt_fixup_dr_usb() to use more compact routines
from fdt_support.h.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
In subsequent patches we'll use FSL-specific functions in
fdt_fixup_dr_usb(), so let's move the routine to a more appropriate
place.
So far fsl_dr_usb.c isn't actually an USB driver, but eventually it
will turn into one, let's hope. ;-)
Also rename CONFIG_HAS_FSL_DR_USB to CONFIG_USB_FSL_DR to
This patch simply converts the board to the hwconfig infrastructure.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
board/freescale/mpc8315erdb/mpc8315erdb.c | 14 +-
include/configs/MPC8315ERDB.h |1 +
2 files changed, 6 insertions(+), 9 deletions(-)
Since we have simple hwconfig interface now, we don't need
pci_external_arbiter variable any longer.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
board/freescale/mpc837xemds/mpc837xemds.c |3 +--
1 files changed, 1 insertions(+), 2 deletions(-)
diff --git
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.
Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.
Signed-off-by: Anton Vorontsov avoront...@ru.mvista.com
---
Hi Andy,
Sorry for the late response,
On Fri, Mar 06, 2009 at 07:25:55PM -0600, Andy Fleming wrote:
On Thu, Feb 19, 2009 at 9:45 AM, Anton Vorontsov
avoront...@ru.mvista.com wrote:
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.
The function adds
On Wed, 29 Apr 2009, Jean-Christophe PLAGNIOL-VILLARD wrote:
Since there was no feedback on this, I investigated a little further and I
noticed that several existing ARM cores already do it this way (arm926ejs,
arm926ejs, arm920t, etc) so I think there's then a nice prejudice to continue
on
On Thu, Apr 30, 2009 at 01:50:00AM +0400, Anton Vorontsov wrote:
[..]
+/*
Just noticed that I missed kerneldoc starting comment.
It should be /**, will fix.
--
Anton Vorontsov
email: cbouatmai...@gmail.com
irc://irc.freenode.net/bd2
___
U-Boot
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:29 Wed 29 Apr , Ben Warren wrote:
Hi J-C,
Jean-Christophe PLAGNIOL-VILLARD wrote:
snip
+/*
+ * * Initializes on-chip ethernet controllers.
+ * * to override, implement board_eth_init()
+ **/
+int cpu_eth_init(bd_t *bis)
From: David Brownell dbrown...@users.sourceforge.net
Make the DaVinci clock display code work on the dm355 too ... there
are pre- and post- dividers on its PLLs, which most other DaVinci
processors don't use; and it uses different PLL dividers. Stubbed
in support for the DM6467 too. Verified on
On 15:38 Wed 29 Apr , David Brownell wrote:
From: David Brownell dbrown...@users.sourceforge.net
Make the DaVinci clock display code work on the dm355 too ... there
are pre- and post- dividers on its PLLs, which most other DaVinci
processors don't use; and it uses different PLL dividers.
On 15:11 Wed 29 Apr , Ben Warren wrote:
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 13:29 Wed 29 Apr , Ben Warren wrote:
Hi J-C,
Jean-Christophe PLAGNIOL-VILLARD wrote:
snip
+/*
+ * * Initializes on-chip ethernet controllers.
+ * * to override, implement
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 15:38 Wed 29 Apr , David Brownell wrote:
From: David Brownell dbrown...@users.sourceforge.net
Make the DaVinci clock display code work on the dm355 too ... there
are pre- and post- dividers on its PLLs, which most other DaVinci
processors
On Tuesday 28 April 2009, Ben Warren wrote:
This patch set is an untested attempt at cleaning up the Davinci Ethernet
driver. Since I don't have any real hardware, I've tried to keep the logical
flow as similar to the original as possible and haven't touched any of the
hardware access code.
From: David Brownell dbrown...@users.sourceforge.net
This updates the optional (non-default!) NAND support for the
DaVinci DM6446 EVM:
- include MTD partitioning, defaulting to what Linux uses
- use a flash-based BBT, which among other things speeds bootup
This matches code that's now queued
Hi Magnus,
The mainline u-boot + my patches from early April does not contain any
driver for the i.MX31 NAND flash controller so that can't autodetect
any flash part at all.
How does it boot out of NAND then? I am getting confused. By
detection, i meant the basic init of the NFC and the
On 4/29/09 12:45 PM, Jonathan Haws wrote:
I am experiencing a machine check on a custom AMCC 405EX PPC board. Our board
is based on the AMCC Kilauea evaluation board. We have a few of these boards
that are up and running, but I am trying to track down a machine check error
on a couple of
David Brownell wrote:
On Tuesday 28 April 2009, Ben Warren wrote:
This patch set is an untested attempt at cleaning up the Davinci Ethernet
driver. Since I don't have any real hardware, I've tried to keep the logical
flow as similar to the original as possible and haven't touched any of
+ *
+ */
+
+#include common.h
+#include i2c.h
+#include asm/arch/hardware.h
+#include ../common/misc.h
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /* arch number of the board */
+
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090429212136.gi...@game.jcrosoft.org you wrote:
Actually all the new board or nearly is add to the MAKEALL
Yes, and that's a good thing, as this way all boards get
compile-tested.
As point by Kumar it's start to be a huge
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090429192636.gd13...@game.jcrosoft.org you wrote:
We all agree that precision is a good thing to have, it it must come
at a reasonable effort, and there is no reason to drive it into
extreme precision.
Personnaly I never ask extreme
On Wednesday 29 April 2009, Jean-Christophe PLAGNIOL-VILLARD wrote:
On 15:38 Wed 29 Apr , David Brownell wrote:
From: David Brownell dbrown...@users.sourceforge.net
Make the DaVinci clock display code work on the dm355 too ... there
are pre- and post- dividers on its PLLs, which most
Jean-Christophe PLAGNIOL-VILLARD wrote:
snip
+void red_LED_off (void)
+{
+/* red */
+if (!omap_request_gpio(173)) {
+omap_set_gpio_direction(173, 0);
+omap_set_gpio_dataout(173, 0);
+}
it will be better to do this at the init of the led
There
On Wednesday 29 April 2009, Jean-Christophe PLAGNIOL-VILLARD wrote:
as the clock function could be move to cpu.c it will have the stringly-link
function
I'll stuff that in a new cpu.c file, but those
clock status display routines aren't mandatory.
On 12:19 Wed 29 Apr , s-paul...@ti.com wrote:
Patch adds support for DaVinci DM365.
It does not have the DM9000 like the DM355 but has capability
for 4 BIT ECC correction just like DM355.
This patch lacks 2 features
1) No 4 BIT ECC correction. We will add support for 4 BIT ECC
On 16:35 Wed 29 Apr , David Brownell wrote:
From: David Brownell dbrown...@users.sourceforge.net
This updates the optional (non-default!) NAND support for the
DaVinci DM6446 EVM:
- include MTD partitioning, defaulting to what Linux uses
- use a flash-based BBT, which among other
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