-Original Message-
From: Wolfgang Denk [mailto:w...@denx.de]
Sent: Thursday, July 30, 2009 4:02 AM
To: Prafulla Wadaskar
Cc: Jean-Christophe PLAGNIOL-VILLARD; U-Boot; Ben Warren;
Ashish Karkare; Prabhanjan Sarnaik
Subject: Re: [U-Boot] ARM Pull Request
Dear Prafulla
2009/8/6 Wolfgang Denk w...@denx.de:
I have just posted a patch:
[PATCH] ARM EABI: add new helper functions resp. function names
(see http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/65473
Combined with commit 52b1bf2c:
Make linking against libgcc configurable
I can run a
Dear Wolfgang,
I'd like to clarify what is the problem with the timeout and the Intel
flash (even if the following comments can be obvious or already well
known) and to ask you an opinion on a small code change.
The flash has an internal busy flag that is polled in function
Hello Friends,
I have a custom board with MPC8548E. I am trying to port u-boot 2009.06
By modifying the MPC8548CDS Files.
The main difference between CDS and our custom board is in Flash
Configuration.
Our custom board has 128MB Flash?
Which locations/file i have to change?
i configured
Dear Alex Dubov,
In message 605712.94797...@web37607.mail.mud.yahoo.com you wrote:
Until now, custom environment settings were just defined in the board config
file. All that had to be done is to edit the file, recompile the u-boot and
flash it to the target.
Sounds a bit cumbersome...
Dear javier Martin,
In message eedb5540908070018o157def3fleb4b1d04da853...@mail.gmail.com you
wrote:
It would be great if you all could test this, so we can get this in as
quickly as possible.
This also works for me using Freescale's toolchain included in LTIB
for i.mx27 ads board.
Hello All,
I have downloaded new u-boot (u-boot -2009.06) I am using PQ3 - 8548
processor.
Our custom board is with 128Mbyte Flash, but MPC8548CDS and SBC8548 are
with different configurations.
How can i customize this to my custom board, which has 128Mbyte flash
interface.
I changed the
Dear Renato Andreola,
In message 4a7be28a.8080...@imagos.it you wrote:
I'd like to clarify what is the problem with the timeout and the Intel
flash (even if the following comments can be obvious or already well
known) and to ask you an opinion on a small code change.
Thanks.
...
I think
Hi everyone~
I am a beginner for u-boot~
I am using 1.3.4 version
now I want to debug() print out information.
I see in /tools/Mkimage.h have:
#define MKIMAGE_DEBUG
#ifdef MKIMAGE_DEBUG
#define debug(fmt,args...) printf (fmt ,##args)
#else
#define debug(fmt,args...)
#endif /* MKIMAGE_DEBUG */
I'd prefer tout = DIV_ROUND_UP(tout*CONFIG_SYS_HZ, 1000);
Ok for me.
BTW: Looking for DIV_ROUND_UP, I found that it's defined in
./include/asm/arch-kirkwood/gpio.h as well. I was checking whether it can
be removed, but it looks like nobody is using the driver.
tornado$ grep -r
Signed-off-by: Alessandro Rubini rub...@gnudd.com
---
To test the define is not really needed, I applied the suen3 patch and
added CONFIG_KIRKWOOD_GPIO to the config file.
Now back to defrag stuff.
include/asm-arm/arch-kirkwood/gpio.h |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
This chip is used in a number of boards manufactured by Calao-Systems
which should be supported soon. This driver provides the necessary
spi_read and spi_write functions necessary to communicate with the chip.
Signed-off-by: Albin Tonnerre albin.tonne...@free-electrons.com
---
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems http://www.calao-systems.com. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board. There are however some differences:
different clocks,
On Wed, Aug 05, 2009 at 09:24:43PM +0200, Jean-Christophe PLAGNIOL-VILLARD
wrote :
On 19:16 Wed 05 Aug , Albin Tonnerre wrote:
+ for (i = 0; i 1000; i++) {
why 1000?
Oh, true. I meant to fix that and replace it with something similar to what
atmel_dataflash does, ie using
On 12:37 Fri 07 Aug , Albin Tonnerre wrote:
This chip is used in a number of boards manufactured by Calao-Systems
which should be supported soon. This driver provides the necessary
spi_read and spi_write functions necessary to communicate with the chip.
Signed-off-by: Albin Tonnerre
On 12:37 Fri 07 Aug , Albin Tonnerre wrote:
The Calao TNY-A9260 and TNY-9G20 are boards manufactured and sold by
Calao Systems http://www.calao-systems.com. Their components are very
similar to the AT91SAM9260EK board, so their configuration is based on
the configuration of this board.
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Alessandro Rubini
Sent: Friday, August 07, 2009 4:00 PM
To: w...@denx.de
Cc: u-boot@lists.denx.de
Subject: Re: [U-Boot] Kirkwood gpio (was: timeout calculation
underflow if
This feature can be used to trigger special command sysrstcmd using
reset key long press event and environment variable sysrstdelay is set
(useful for reset to factory or manufacturing mode execution)
Kirkwood SoC implements a hardware-based SYSRSTn duration counter.
When SYSRSTn is asserted low,
Hello Alessandro,
Alessandro Rubini wrote:
I'd prefer tout = DIV_ROUND_UP(tout*CONFIG_SYS_HZ, 1000);
Ok for me.
BTW: Looking for DIV_ROUND_UP, I found that it's defined in
./include/asm/arch-kirkwood/gpio.h as well. I was checking whether it can
be removed, but it looks like nobody is
Hi Alessandro,
I'd prefer tout = DIV_ROUND_UP(tout*CONFIG_SYS_HZ, 1000);
Ok for me.
BTW: Looking for DIV_ROUND_UP, I found that it's defined in
./include/asm/arch-kirkwood/gpio.h as well. I was checking whether it can
be removed, but it looks like nobody is using the driver.
eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
drivers/net/kirkwood_egiga.c | 13 -
1 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/drivers/net/kirkwood_egiga.c
I finally fixed the defrag code, testing with NFS as well.
Didn't take performance figures, tough, for lack of time.
I wanted to do config + environment for the NFS case, like tftp, but
didnt' do the second step out of laziness (also, the source file has
long lines while I have 80 columns).
For
The defragmenting code is enabled by CONFIG_IP_DEFRAG; the code is
useful for TFTP and NFS transfers. The user can specify the maximum
defragmented payload as CONFIG_NET_MAXDEFRAG (default 16k).
Since NFS has a bigger per-packet overhead than TFTP, the static
reassembly buffer can hold
Increasing the block size is useful if CONFIG_IP_DEFRAG is
used. Howerver, the last fragments in a burst may overflow the
receiving ethernet, so the default is left at 1468, with thre new
CONFIG_TFTP_BLOCKSIZE for config files. Further, tftpblocksize
can be set in the environment.
Signed-off-by:
To take advantage of defragmented packets, the config file
can define CONFIG_NFS_READ_SIZE to override the 1kB default.
No support is there for an environment variable by now.
Signed-off-by: Alessandro Rubini rub...@gnudd.com
---
net/nfs.h | 10 --
1 files changed, 8 insertions(+), 2
This chooses 4kB data size for both TFTP and NFS, as an example
about how to use support for IP fragments.
Signed-off-by: Alessandro Rubini rub...@gnudd.com
---
include/configs/nhk8815.h |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/include/configs/nhk8815.h
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
include/configs/sheevaplug.h |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git
Ok, for the change.
What is the preferred way to proceed? have I got to resubmit a patch for
the change with the DIV_ROUND_UP macro?
Best regards,
Renato Andreola
Wolfgang Denk wrote:
Dear Renato Andreola,
In message 4a7be28a.8080...@imagos.it you wrote:
I'd like to clarify what is the
On Aug 7, 2009, at 12:28 AM, oa...@yahoo.com wrote:
From: Alex Dubov oa...@yahoo.com
This board, intended for RapidIO development, has following features:
* RapidIO interface to backplane
* No PCI
* USB controller on LBC (not currently enabled)
* 16MiB Spansion flash
* one soDIMM DDR2
On Aug 5, 2009, at 9:03 AM, Kumar Gala wrote:
If the size of a region equal to 4G it can't be represnted in a 32-bit
BAR so we should have marked that case as MEM64.
Additionally bump the number of inbound windows up to 4 to handle the
fact that Freescale PPCs that have an implicit window
Dear Kumar Gala,
In message 1249605002-5277-1-git-send-email-ga...@kernel.crashing.org you
wrote:
We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary
to allow for larger memory sizes.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
Makefile|
To simplify the top level makefile it useful to be able to set
some #defines in config.h to express different configurations.
Added a -D option that allows us to replace:
MPC8536DS_36BIT_config \
MPC8536DS_config: unconfig
@mkdir -p $(obj)include
@echo #define
On Fri, Aug 07, 2009 at 09:19:07PM +0530, Rupesh Kumar wrote:
Hi
Thanks for the reply.
I get
NAN DSPL - U-Boot 1.3.0-S600-Ver1.1 (Aug 8 2009 - 02:24:03) MPC83XX
NAN DSPL - U-Boot 1.3.0-S600-Ver1.1 (Aug 8 2009 - 02:24:03) MPC83XX
Loading from NAND :
NAN DSPL - U-Boot 1.3.0-S600-Ver1.1 (Aug 8 2009 - 02:24:03) MPC83XX
NAN DSPL - U-Boot 1.3.0-S600-Ver1.1 (Aug 8 2009 - 02:24:03) MPC83XX
Loading from NAND :
I think the boot loader0 is failing to read the nand properly
and it is readig
The old PCI ATMU setup code would just mimic the PCI regions into the
ATMU registers. For simple memory maps in which all memory, MMIO, etc
space fit into 4G this works ok. However there are issues with we have
4G of memory as we know can't access all of memory and we need to
ensure that
On Aug 7, 2009, at 12:28 AM, oa...@yahoo.com wrote:
From: Alex Dubov oa...@yahoo.com
Board specific ddr options are moved to the main board configuration
file.
Common DIMM enumeration code is factored out.
Signed-off-by: Alex Dubov oa...@yahoo.com
---
board/stx/common/Makefile |1
On Aug 4, 2009, at 5:38 PM, Peter Tyser wrote:
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
include/configs/ATUM8548.h |1 -
include/configs/MPC8548CDS.h |1 -
include/configs/sbc8548.h|1 -
3 files changed, 0 insertions(+), 3 deletions(-)
applied to next.
- k
On Aug 7, 2009, at 12:28 AM, oa...@yahoo.com wrote:
From: Alex Dubov oa...@yahoo.com
Move files belonging to the STx boards into common vendor directory
and
update the Makefile to reflect this.
Signed-off-by: Alex Dubov oa...@yahoo.com
---
Makefile|
On Aug 4, 2009, at 5:47 PM, Peter Tyser wrote:
Also fix some minor whitespace oddities while we're cleaning up
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
board/xes/common/fsl_8xxx_clk.c |6 ++--
board/xes/common/fsl_8xxx_pci.c | 46
+-
On Aug 5, 2009, at 5:23 PM, Peter Tyser wrote:
Previously, when CONFIG_MP was defined Boot Page Translation was
unconditionally enabled and secondary cores were put in a spin loop at
address 0xf000. The 0xfxxx address range (ie the Boot Page)
was
being remapped to SDRAM via the
On Jul 31, 2009, at 1:37 AM, Poonam Aggrwal wrote:
Removed same code pieces from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c
and moved to cpu/mpc8xxx/cpu.c(new file)
Signed-off-by: Poonam Aggrwal poonam.aggr...@freescale.com
---
- based of u-boot version 2009.08-rc1
- Changes over v1:
On Jul 31, 2009, at 1:38 AM, Poonam Aggrwal wrote:
The number of CPUs are getting detected dynamically by checking the
processor
SVR value.
Also removed CONFIG_NUM_CPUS references from all the platforms with
85xx/86xx
processors.
This can help to use the same u-boot image across the
On Jul 21, 2009, at 5:57 AM, Wolfgang Denk wrote:
Which brings up the next question:
Kumar: who is supposed to be responsible custodian for QorIQ code?
Should we update / reorganize the list of custodians for Freescale's
processors?
QorIQ products fall into one of two categories. Either
On Aug 5, 2009, at 2:59 AM, Poonam Aggrwal wrote:
The code base adds P1 P2 RDB platforms support.
The folder and file names can cater to future SOCs of P1/P2 family.
P1 P2 processors are 85xx platforms, part of Freescale QorIQ series.
Tested following on P2020RDB:
1. eTSECs
2. DDR,
On Jul 31, 2009, at 1:38 AM, Poonam Aggrwal wrote:
P1020 is another member of QorIQ series of processors which falls in
ULE
category. It is an e500 based dual core SOC.
Being a scaled down version of P2020 it has following differences
from P2020:
- 533MHz - 800MHz core frequency.
-
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards. As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot
Also fix some minor whitespace oddities while we're cleaning up
Signed-off-by: Peter Tyser pty...@xes-inc.com
---
Changes since v1:
- Rebase on 85xx next branch
- Use setbits_be32() where possible
board/xes/common/fsl_8xxx_clk.c |6 ++--
board/xes/common/fsl_8xxx_pci.c | 44
Dear Kumar Gala,
In message c1e6cebe-ca48-48ed-b28c-04f3156bb...@freescale.com you wrote:
Kumar: who is supposed to be responsible custodian for QorIQ code?
Should we update / reorganize the list of custodians for Freescale's
processors?
QorIQ products fall into one of two categories.
On Fri, Aug 07, 2009 at 09:03:03AM -0500, Kumar Gala wrote:
while [ $# -gt 0 ] ; do
case $1 in
--) shift ; break ;;
-a) shift ; APPEND=yes ;;
-n) shift ; BOARD_NAME=${1%%_config} ; shift ;;
+ -D) shift ; DEFINES=#define ${1/=/\t}\n${DEFINES} ; shift ;;
How about
From: Ron Lee r...@debian.org
use the same dummy weak functions too
it will save 200 bytes
Signed-off-by: Ron Lee r...@debian.org
update the implementation
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
lib_arm/board.c | 28 ++--
1 files
On 22:27 Fri 07 Aug , Prafulla Wadaskar wrote:
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
include/configs/sheevaplug.h |1 +
1 files
On 12:35 Fri 07 Aug , Alessandro Rubini wrote:
Signed-off-by: Alessandro Rubini rub...@gnudd.com
---
To test the define is not really needed, I applied the suen3 patch and
added CONFIG_KIRKWOOD_GPIO to the config file.
Now back to defrag stuff.
include/asm-arm/arch-kirkwood/gpio.h
On 04:12 Mon 08 Jun , Ilya Yanok wrote:
This is a port of Linux driver for SDHC host controller hardware
found on Freescale's MX2 and MX3 processors. Uses new generic MMC
framework (CONFIG_GENERIC_MMC) and it looks like there are some
problems with a framework (at least on LE cpus). Some
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 76f02a4..53fc3be 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -129,7 +129,7 @@ ulong get_spin_addr(void)
ulong addr =
(ulong)__spin_table - (ulong)__secondary_start_page;
- addr += 0xf000;
On 22:17 Fri 07 Aug , Prafulla Wadaskar wrote:
eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
drivers/net/kirkwood_egiga.c | 13 -
1 files changed, 8 insertions(+), 5
Dear Matthias Ludwig,
In message
4a7b8b5de50ee2b17fba444c8816c35d1fda1477.1242716287.git.mlud...@ultratronik.de
you wrote:
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
Jean-Christophe PLAGNIOL-VILLARD wrote:
On 22:17 Fri 07 Aug , Prafulla Wadaskar wrote:
eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size
Signed-off-by: Prafulla Wadaskar prafu...@marvell.com
---
drivers/net/kirkwood_egiga.c | 13
This patch removes the inclusion of libgcc functions into U-Boot on the ARM
architecture. Only the really needed functions are provided in the lib_arm
directory. Those implementations are copied from Linux where they are well
proven related to reliably, performance.
Signed-off-by: Jean-Christophe
Dear Matthias Ludwig,
In message
042680c935ee2a71d7cd006d3fd5c01e7893b2db.1242716287.git.mlud...@ultratronik.de
you wrote:
Signed-off-by: Matthias Ludwig mlud...@ultratronik.de
---
board/omap3/beagle/beagle.c|6 ++--
board/omap3/evm/evm.c |6 ++--
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
drivers/mtd/spi/eeprom_m95xxx.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/spi/eeprom_m95xxx.c b/drivers/mtd/spi/eeprom_m95xxx.c
index 59f80e3..0148d00 100644
---
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1249680826-20181-1-git-send-email-plagn...@jcrosoft.com you wrote:
This patch removes the inclusion of libgcc functions into U-Boot on the ARM
architecture. Only the really needed functions are provided in the lib_arm
directory. Those
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1249681074-21164-1-git-send-email-plagn...@jcrosoft.com you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
drivers/mtd/spi/eeprom_m95xxx.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
No such
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1249675613-10949-1-git-send-email-plagn...@jcrosoft.com you wrote:
From: Ron Lee r...@debian.org
use the same dummy weak functions too
it will save 200 bytes
Signed-off-by: Ron Lee r...@debian.org
update the implementation
On 23:55 Fri 07 Aug , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1249680826-20181-1-git-send-email-plagn...@jcrosoft.com you
wrote:
This patch removes the inclusion of libgcc functions into U-Boot on the ARM
architecture. Only the really needed functions
On 23:58 Fri 07 Aug , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1249675613-10949-1-git-send-email-plagn...@jcrosoft.com you
wrote:
From: Ron Lee r...@debian.org
use the same dummy weak functions too
it will save 200 bytes
Signed-off-by: Ron Lee
Dear Prafulla Wadaskar,
In message 1248804270-13715-1-git-send-email-prafu...@marvell.com you wrote:
List command always return EXIT_SUCCESS even in case of
failure by any means.
This patch return 0 if list command is sucessful,
returns negative value reported by check_header functions
Dear Prafulla Wadaskar,
In message 1248804270-13715-2-git-send-email-prafu...@marvell.com you wrote:
This is first step towards cleaning mkimage code for kwbimage
support in clean way. Current mkimage code is very specific to
uimge generation whereas the same framework can be used to
generate
Dear Prafulla Wadaskar,
In message 1248804270-13715-3-git-send-email-prafu...@marvell.com you wrote:
This is second step towards cleaning mkimage code for kwbimage
support in clean way. In this patch-
1. The image_get_header_size function call is replaced by
sizeof(image_header_t)
in
Dear Prafulla Wadaskar,
In message 1248804270-13715-4-git-send-email-prafu...@marvell.com you wrote:
This is Third step towards cleaning mkimage code for kwbimage
BTW - I think cleaning mkimage code is not correct. This is not a
clean up, but a major rework.
1. callback functions are used in
Dear Prafulla Wadaskar,
In message 1248804270-13715-6-git-send-email-prafu...@marvell.com you wrote:
diff --git a/include/image.h b/include/image.h
index 88a13ab..f119cee 100644
--- a/include/image.h
+++ b/include/image.h
@@ -168,6 +168,15 @@
#define IH_MAGIC 0x27051956 /* Image
Dear Prafulla Wadaskar,
In message 1248804270-13715-7-git-send-email-prafu...@marvell.com you wrote:
This is Third step towards cleaning mkimage code for kwbimage
support in clean way.
Umm... The Third step was already in patch 4/8. I guess you have to
check your commit messages better...
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090807215836.gr13...@game.jcrosoft.org you wrote:
If so, please let me know, and include exact information how to
reproduce such problems - which board, which exact tool chain, how to
run it, which error messages you see, etc.
Please
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20090807220403.gs13...@game.jcrosoft.org you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
lib_arm/board.c | 28 ++--
1 files changed, 10 insertions(+), 18 deletions(-)
At the moment I don't see any advantages of your patch. On contrary,
I would like to avoid such an intrusive change so late in the release
cycle unless there is really good reason for it.
on contrary my patch was patch months ago and well tested on multiple
boards and socs
your patch is
Mike,
Mike Frysinger wrote:
In the previous enetaddr refactoring, the assumption with commit 56b555a644
was that the eth layer would handle the env - device enetaddr syncing.
This was not the case as eth_initialize() is called only once and the sync
occurs there. So make sure the eth_init()
Hi All,
I am in the middle of doing some x86 code cleanups ready for my next
phase of work on getting linux running on my custom board. I doing so, I
have found some PCI related code in the 386 cpu and lib folders that
needed tweaking. I have two issues that I need help to resolve
1) in
Hi All,
When i do a soft reset or issue a reboot command from linux, uboot is
unable to boot,getting stuck .
Uncompressing Linux.
... done, booting the kernel.
But on a power cycle, U-boot
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