This patch set enables I2C support for EXYNOS5.
This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5.
Multichannel support has been added to the s3c24x0 I2C driver.
s3c24x0_i2c struct has been moved to a common place as it can used
by different SOC's.
Changes in V2:
-
This adds i2c clock information for EXYNOS5.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
changes in V2:
- Incorporated comments
This patch adds the base address for I2C.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
arch/arm/include/asm/arch-exynos/cpu.h |
This patch adds pinmux code for I2C.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- Aligned the pinmux functionality as per the latest comments.
Changes in V3:
- None
arch/arm/cpu/armv7/exynos/pinmux.c
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
As exynos has more than one i2c channels. This patch adds offset padding
for struct s3c24x0_i2c, in order to get the new base address of next i2c
channel.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
- I2C base address is passed as a parameter to many
functions to avoid multiple #ifdef
- I2C init for Exynos5 is made as different function.
- Channel
This adds multiple i2c channel support for I2C.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
drivers/i2c/s3c24x0_i2c.c |
This enables I2C support on smdk5250.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
-
+static void i2c_bus_init(struct s3c24x0_i2c *i2c, unsigned int bus)
+{
+ int periph_id = i2c_get_periph_id(bus);
+
+ exynos_pinmux_config(periph_id, 0);
+
+ i2c_ch_init(i2c, CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+}
This function is used only in EXYNOS5.
-- This
This patch set enables I2C support for EXYNOS5.
This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5.
Multichannel support has been added to the s3c24x0 I2C driver.
s3c24x0_i2c struct has been moved to a common place as it can used
by different SOC's.
Changes in V2:
-
This patch adds pinmux code for I2C.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- Aligned the pinmux functionality as per the latest comments.
Changes in V3:
- None
Changes in V4:
- None
This adds i2c clock information for EXYNOS5.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
changes in V2:
- Incorporated comments
This patch adds the base address for I2C.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
struct s3c24x0_i2c is being moved to common local header file so that
the same can be used by s3c series and exynos series SoCs.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
This patch modifies the S3C I2C driver to suppport EXYNOS5.
The cahnges made to driver are as follows:
- I2C base address is passed as a parameter to many
functions to avoid multiple #ifdef
- I2C init for Exynos5 is made as different function.
- Channel
As exynos has more than one i2c channels. This patch adds offset padding
for struct s3c24x0_i2c, in order to get the new base address of next i2c
channel.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass
This enables I2C support on smdk5250.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
-
This adds multiple i2c channel support for I2C.
Signed-off-by: Alim Akhtar alim.akh...@samsung.com
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None
Changes in V3:
- None
Changes in V4:
- None
Hi Joonyoung Shim,
Thank you for comments.
On Tue, Jun 19, 2012 at 12:45 PM, Joonyoung Shim dofm...@gmail.com wrote:
+static void i2c_bus_init(struct s3c24x0_i2c *i2c, unsigned int bus)
+{
+ int periph_id = i2c_get_periph_id(bus);
+
+ exynos_pinmux_config(periph_id, 0);
+
+
On 30/05/2012 07:43, Marek Vasut wrote:
This function can be overridden at run-time and allows implementors
of new boards based on the i.MX28 chip to fine-tune the memory params.
It is possible to write into the dram_vals array because when the SPL
runs, it is located SRAM. Therefore the
2012/6/19 Rajeshwari Birje rajeshwari.bi...@gmail.com:
Hi Joonyoung Shim,
Thank you for comments.
On Fri, Jun 15, 2012 at 12:45 PM, Joonyoung Shim dofm...@gmail.com wrote:
Hi,
2012/6/7 Rajeshwari Shinde rajeshwar...@samsung.com:
This adds multiple i2c channel support for I2C.
Hi,
I add some comments at the below.
And current SMDK5250 uses Exynos5250 EVT0 base codes,
but i know the kernel supports only Exynos5250 EVT1.
So, let's remove Exynos5250 EVT0 codes and add EVT1 codes at the u-boot also.
Could you follow up it?
Thanks.
2012/6/19 Rajeshwari Shinde
Hi,
On 19 June 2012 13:00, Rajeshwari Shinde rajeshwar...@samsung.com wrote:
This patch set enables I2C support for EXYNOS5.
This patchset modifies the s3c24x0 I2C driver to use same for EXYNOS5.
Multichannel support has been added to the s3c24x0 I2C driver.
s3c24x0_i2c struct has been moved
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like usb reset in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we add a definition in header file and a callback
Hi Tom,
Thank you for feedback.
On Mon, Jun 18, 2012 at 04:12:50PM +0200, Lukasz Majewski wrote:
Hi Harman,
-Original Message-
From: Lukasz Majewski [mailto:l.majew...@samsung.com]
Sent: Monday, June 18, 2012 2:25 PM
To: Marek Vasut
Cc: u-boot@lists.denx.de;
Hi Joonyoung Shim,
On Tue, Jun 19, 2012 at 1:20 PM, Joonyoung Shim dofm...@gmail.com wrote:
Hi,
I add some comments at the below.
-- ok
And current SMDK5250 uses Exynos5250 EVT0 base codes,
but i know the kernel supports only Exynos5250 EVT1.
So, let's remove Exynos5250 EVT0 codes and add
On 06/19/2012 01:56 AM, Lukasz Majewski wrote:
Hi Tom,
Thank you for feedback.
On Mon, Jun 18, 2012 at 04:12:50PM +0200, Lukasz Majewski wrote:
Hi Harman,
-Original Message-
From: Lukasz Majewski [mailto:l.majew...@samsung.com]
Sent: Monday, June 18, 2012 2:25 PM
To: Marek
Hi Marek,
On Tue, Jun 19, 2012 at 3:37 AM, Marek Vasut marek.va...@gmail.com wrote:
Kind of ... I mean rather insert an entry into MMU table at runtime that
says
this region is uncached. But that'd need some hack in the mallocator now
that
I think about it. It might not be as simple as I
Hi,
I am working on s3c2416 ARM9 based processor. The u-boot version used is u-boot
1.3.4. This u-boot does not have the splash screen implemented on the source
code.
To enable the splash screen, I defined CONFIG_SPLASH_SCREEN in
include/configs/smdk2416.h file. Now I get the error
From: Mathieu J. Poirier mathieu.poir...@linaro.org
Enabling timers and clocks in PRCMU and cleaning up mailbox.
Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
---
Changes for v2:
- Cleaned #defines in snowball.h
---
From: Mathieu J. Poirier mathieu.poir...@linaro.org
LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.
Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
---
Changes for v2:
- Cleaned #defines in
From: Mathieu J. Poirier mathieu.poir...@linaro.org
Some CPU (i.e u8500) need more cache management before launching
the Linux kernel.
Signed-off-by: Mathieu Poirier mathieu.poir...@linaro.org
Signed-off-by: John Rigby john.ri...@linaro.org
---
Changes for v2:
- Moved from __attribute__(...)
Hi Albert,
I have observed an issue regarding u-boot relocation, it's working with
_TEXT_BASE address but
for other address in DDR it's not working. Stops at relocation offset.
I was trying this on both QEMU as well as real target.
Here are my findings:
-
VExpress#
Le Thu, 14 Jun 2012 23:56:35 +0200,
Marek Vasut marek.va...@gmail.com a écrit :
May be somebody already make support c6000 (c6x) arch in u-boot?
Is it really a self-standing architecture?
Yes. Support for it has been added in gcc 4.7, see
http://gcc.gnu.org/gcc-4.7/changes.html. It is a DSP
Dear Gigin Jose,
In message 1340118050.87713.yahoomail...@web193103.mail.sg3.yahoo.com you
wrote:
I am working on s3c2416 ARM9 based processor. The u-boot version used
is u-boot 1.3.4. This u-boot does not have the splash screen
implemented on the source code.
Well, it does. Maybe not on
On 06/19/2012 02:47 AM, Jim Lin wrote:
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like usb reset in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we
commit acc4959fc1 (Revert i.MX28: Enable additional DRAM address bits)
broke mx28evk boot.
Fix it by properly adjusting the HW_DRAM_CTL29 register value.
Suggested-by: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/freescale/mx28evk/iomux.c | 14
On Tue, Jun 19, 2012 at 09:06:48PM +0530, jagan wrote:
Hi Albert,
I have observed an issue regarding u-boot relocation, it's working with
_TEXT_BASE address but
for other address in DDR it's not working. Stops at relocation offset.
I was trying this on both QEMU as well as real target.
Dear Scott Wood,
In message 20120608195929.ga22...@tyr.buserror.net you wrote:
The following changes since commit fedab338f3459315cb69627fcf46032ec8df1753:
Merge branch 'master' of git://git.denx.de/u-boot-video (2012-06-07
23:42:17 +0200)
are available in the git repository at:
Dear Kim Phillips,
In message 20120615173255.46192b1c3862d931ed7db...@freescale.com you wrote:
Hello Wolfgang Denk,
Please pull:
The following changes since commit fedab338f3459315cb69627fcf46032ec8df1753:
Merge branch 'master' of git://git.denx.de/u-boot-video (2012-06-07
23:42:17
Dear Mike Frysinger,
In message 1327086442-18016-1-git-send-email-vap...@gentoo.org you wrote:
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
common/cmd_mem.c | 12 +++-
1 files changed, 3 insertions(+), 9 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX
Dear Mike Frysinger,
In message 1327086442-18016-2-git-send-email-vap...@gentoo.org you wrote:
Not only does the source code get simpler, but it also shrinks the
compiled object code too.
While we're here, tweak the summary message to avoid the plural
issue. It isn't that big of a deal,
Dear Mike Frysinger,
In message 1327086442-18016-3-git-send-email-vap...@gentoo.org you wrote:
Simplify the code slightly by using a for() loop since this is
basically what we're already doing -- incrementing ngood to
the value in count.
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
Dear Mike Frysinger,
In message 1328321820-3708-1-git-send-email-vap...@gentoo.org you wrote:
Compressing the logos with lzma rather than gzip saves ~9kb with the
Blackfin 24bit images and ~3kb with the 16bit images.
Add a new -l option to easylogo so people can pick lzma as their
Dear Mike Frysinger,
In message 1329372167-2530-1-git-send-email-vap...@gentoo.org you wrote:
Signed-off-by: Mike Frysinger vap...@gentoo.org
---
include/lmb.h |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
Applied, thanks.
Best regards,
Wolfgang Denk
--
DENX Software
Dear Tom Rini,
In message 1335480396-29478-1-git-send-email-tr...@ti.com you wrote:
We provide a default table of { 9600, 19200, 38400, 57600, 115200 }
in config_fallbacks.h which mkconfig places after configs/...h in
the generated config file. This is used when a board has not set its
own
Dear Vikram Narayanan,
In message 4fbd3372.9090...@gmail.com you wrote:
Move the config file from ~/.config/patman to ~/.patman as it is
more appropriate to have it there. Update the same in the README.
Signed-off-by: Vikram Narayanan vikram...@gmail.com
Cc: Simon Glass s...@chromium.org
Dear Vikram Narayanan,
In message 4fbd33f2.8000...@gmail.com you wrote:
patman shouts when it couldn't find a $(HOME)/.patman file.
Handle it in a sane way by creating a new one for the user.
It looks for a user.name and user.email in the global .gitconfig
file, waits for the user input if it
Dear Fabio Estevam,
commit acc4959fc1 (Revert i.MX28: Enable additional DRAM address bits)
broke mx28evk boot.
Fix it by properly adjusting the HW_DRAM_CTL29 register value.
Suggested-by: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Dear Stephen Warren,
On 06/19/2012 02:47 AM, Jim Lin wrote:
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like usb reset in u-boot command line).
This will be treated as an error and stops later device
On Tue, Jun 19, 2012 at 10:50:37PM +0200, Wolfgang Denk wrote:
Dear Tom Rini,
In message 1335480396-29478-1-git-send-email-tr...@ti.com you wrote:
We provide a default table of { 9600, 19200, 38400, 57600, 115200 }
in config_fallbacks.h which mkconfig places after configs/...h in
the
Hi Jagan,
On 06/19/2012 08:36 AM, jagan wrote:
Hi Albert,
I have observed an issue regarding u-boot relocation, it's working with
_TEXT_BASE address but
for other address in DDR it's not working. Stops at relocation offset.
This is not quite clear to me. What's working and what's not
In Exynos5, if used 8-bit busmode, set the gpio configuration to
GPIO_FUNC(0x2).
Signed-off-by: Jaehoon Chung jh80.ch...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/cpu/armv7/exynos/pinmux.c | 20 +++-
1 files changed, 11 insertions(+), 9
Hi Jaehoon Chung,
Had few comments...
Is this changes for EVT1 board?
As per the EVT1 Manual I have it is:
MMC0: Correct as per your changes.
MMC1: Bank C2 - 4 bit: func - 0x2
MMC2: Bank C3 - 4 bit: func - 0x2, You have made it 8 bit. (EVT0 the
manual I have it says func 0x2)
MMC3 not there.
55 matches
Mail list logo
