Thanks for pointing out the potential issue.
-Original Message-
From: Jon Hunter [mailto:jon-hun...@ti.com]
Sent: Thursday, March 21, 2013 7:57 AM
To: Jim Lin
Cc: u-boot@lists.denx.de; ma...@denx.de; w...@denx.de; tr...@ti.com; Tom Warren
Subject: Re: [U-Boot] [PATCH 1/1 v3] console:
On 03/20/2013 05:56 PM, Jon Hunter wrote:
On 01/24/2013 05:05 AM, Jim Lin wrote:
Autoboot timeout defined by CONFIG_BOOTDELAY will not be accurate if
CONFIG_USB_KEYBOARD and CONFIG_SYS_USB_EVENT_POLL are defined in
configuration file and when tstc() function for checking key pressed
takes
This patch set adds hardware acceleration for SHA 256
with the help of ACE.
Changes since v1:
- Patch-1: Fixed few nits.
- Patch-2: Removed not required config.
- Patch-3: Added sha256 to hash command instead of new sha256 command.
Changes since v2:
- Patch-1:
This enables hash command.
Tested with command hash sha256 0x40008000 0x2B 0x40009000.
Used mm and md to write a standard string to memory location
0x40008000 and ran the above command to verify the output.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since v1:
- Moved code to drivers/crypto.
- Fixed few other nits.
Changes
Adding H/W acceleration support to hash which can be used
to test SHA 256 hash algorithm.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since v1:
- Added sha256 support to hash
This enables SHA 256 for exynos.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since v1:
- Removed not required config.
Changes sice v2:
- Added SHA1 in the comment for
Hi Kim,
On Mon, 18 Mar 2013 02:06:15 -0400
Akshay Saraswat aksha...@samsung.com wrote:
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI aru...@samsung.com
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
+++
While booting with dtblob, if fdt_high is not set to
0x, the dt blob is relocated to a higher address,
which the kernel is not able to use without HIGHMEM.
So set it to 0x to avoid the issue.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/omap5_common.h |1
Dear Stephen Warren,
In message 1363842874-8286-1-git-send-email-swar...@wwwdotorg.org you wrote:
Commit b2f3e0e console: USB: KBD: Fix incorrect autoboot timeout
re-wrote the bootdelay timeout loop. However, it hard-coded the value
that get_delay() was expected to increment in one second,
Dear Stephen Warren,
In message 514aa642.3090...@wwwdotorg.org you wrote:
Interesting. I just noticed the same problem, and posted the following
patch to fix it:
http://lists.denx.de/pipermail/u-boot/2013-March/149625.html
This was on the Raspberry Pi.
You mean the Raspberry Pi uses
Reviewing the ECSPI reset handling shows two issues:
1. For the enable/reset bit (MXC_CSPICTRL_EN) in the control reg
(ECSPIx_CONGREG) the i.MX6 technical reference manual states:
-- cut --
ECSPIx_CONREG[0]: EN: Writing zero to this bit disables the block
and resets the internal
From: Abbas Raza abbas_r...@mentor.com
Maximum bus width supported by SabreLite board is not 8bit like
all other mx6q specific boards. In case where both host controller
and card support 8bit transfers, they agree to communicate on 8bit
interface while boards like the SabreLite support only 4bit
Hi Tom,
a few style comments:
On 03/20/2013 08:46 PM, Tom Rini wrote:
When we cannot check write protect or card change via GPIO (and have
been passed -1 in omap_mmc_init), only even try the gpio_is_valid is
true.
That last part needs rephrasing: only try if gpio_is_valid() is true.
This
Hi,
I was wondering if anyone has had experience of enabling the internal 4 BIT ECC
used on the Micron MT29F8G08ADADAH4-IT and the Freescale QorIQ.
I'm particularly keen to see the modifications you may have done to the Special
programme loader (nand_boot_fsl_elbc.c) so that the FCM error
Dear Albert,
The following changes since commit 9f024f62e4604274a23213dcee30016092e32e7b:
Merge branch 'fixes' of git://git.denx.de/u-boot-mips (2013-02-15 12:23:42
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-samsung master
for you to fetch changes up to
Thanks for the info. But I checked the version supported by the vendor of
board does not have bootz command implemented.
And I am just a user for UBOOT.
Thus could anyone just let me know that the hack I am using is correct and
if I jump at offset 0x40 in uImage then it is equilant of using
Changes in V2:
- Enabled CMD_GPIO as suggested by Simon Glass and
supported same for EXYNOS5
Changes in V3:
- New patch added to rename S5P GPIO definitions to
S5P_GPIO
- GPIO Table added to calculate the base address
of input gpio bank.
Changes in
This patch adds support for gpio pin numbering support on
EXYNOS5250
To have consistent 0..n-1 GPIO numbering the banks are divided
into different parts where ever they have holes in them.
Signed-off-by: Leela Krishna Amudala l.kris...@samsung.com
Signed-off-by: Rajeshwari Shinde
This patch rename GPIO definitions from GPIO_... to S5P_GPIO_...
This changes was done to enable cmd_gpio for EXYNOS and
cmd_gpio has GPIO_INPUT same as s5p_gpio driver and hence
getting a error during compilation.
Build tested for s5p_goni, origen, smdk5250, s5pc210_universal,
trats, smdkc100,
This patch enables GPIO Command for EXYNOS5.
Function has been added to asm/gpio.h to decode the
input gpio name to gpio number.
example: gpio set gpa00
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- New patch
Changes in V3:
- Created a table to
We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating any big issue. But it is better to fix this error for better
readability of the
On Thu, Mar 21, 2013 at 12:25:17PM +0530, Sricharan R wrote:
While booting with dtblob, if fdt_high is not set to
0x, the dt blob is relocated to a higher address,
which the kernel is not able to use without HIGHMEM.
So set it to 0x to avoid the issue.
Signed-off-by:
Dear Jim Lin,
In message 1363861408-21042-1-git-send-email-ji...@nvidia.com you wrote:
TFTP booting is observed a little bit slow, especially when a USB
keyboard is installed.
The fix is to check whether Ctrl-C key is pressed every
CONFIG_CTRLC_POLL_S second.
Signed-off-by: Jim Lin
When we cannot check write protect or card change via GPIO (and have
been passed -1 in omap_mmc_init), only try if gpio_is_valid is
true. This prevents invalid GPIO messages from being seen on the
console when doing MMC operations
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v3:
- Style
Signed-off-by: Tom Rini tr...@ti.com
---
Changes in v3:
- Reapply with style changes in previous patch
- Add missing asm/errno.h
Changes in v2:
- New patch, use -EINVAL in the driver
---
drivers/mmc/omap_hsmmc.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git
On Thu, Mar 21, 2013 at 06:39:31AM +0100, Wolfgang Denk wrote:
Dear Tom Rini,
In message 20130320195919.GR25919@bill-the-cat you wrote:
OK, so this does sound like a real need / use for it, and if we added
the granularity of CONFIG_CMD_CACHE_FLUSH or similar, it would be
reasonable to
Dear Tom,
In message 20130321122923.GB26945@bill-the-cat you wrote:
Not really. Only a tiny fraction of users will ever run any standalone
applications, so please let's save the memory footprint for the
overwhelming majority of users who do not need that.
Well, can we run into this
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/21/2013 02:55 AM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 1363842874-8286-1-git-send-email-swar...@wwwdotorg.org
you wrote:
Commit b2f3e0e console: USB: KBD: Fix incorrect autoboot
timeout re-wrote the bootdelay timeout loop.
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.
Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
drivers/mmc/mmc.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/mmc.c
Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1
(and undefined behaviour as the -1 error code is interpreted as gpio value)
Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
drivers/mmc/omap_hsmmc.c |8 ++--
1 file changed, 6 insertions(+), 2
Introduces btrfs file-system to read file from
volume/sub-volumes with btrload command. This
implementation has read-only support.
This btrfs implementation is based on syslinux btrfs
code, commit 269ebc845ebc8b46ef4b0be7fa0005c7fdb95b8d.
v9: patch problem reworked.
v8: patch problem
On Thu, Mar 21, 2013 at 03:00:04PM +0100, Peter Korsgaard wrote:
Gets rid of warnings from omap_gpio:
ERROR : check_gpio: invalid GPIO -1
(and undefined behaviour as the -1 error code is interpreted as gpio value)
Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
---
On Thu, Mar 21, 2013 at 03:00:03PM +0100, Peter Korsgaard wrote:
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.
Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
Do we really need to do this? It seems like we should be working
On Wed, Mar 20, 2013 at 07:27:24PM -0700, Simon Glass wrote:
Hi Tom,
On Wed, Mar 20, 2013 at 12:28 PM, Tom Rini tr...@ti.com wrote:
On Sun, Feb 10, 2013 at 09:09:29PM -0800, Simon Glass wrote:
[take 2, sorry]
Hi Tom,
I see quite a lot of non-x86 patches in my todo list - does
Tested-by: Rao Bodapati r...@circuitco.com
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 17
board/ti/am335x/board.c | 39 ++-
2 files changed, 55 insertions(+), 1 deletion(-)
diff --git
Dear Tom,
In message 514b1036.3090...@ti.com you wrote:
A system with CONFIG_SYS_HZ != 1000 is _broken_.
So, RPi is going higher, and Jon hit this on I suspect omap2420h4
which is also higher (after mathing that all out). If we no longer
support CONFIG_SYS_HZ != 1000 we need to make that
On Tue, Feb 26, 2013 at 08:10:53AM -0800, Simon Glass wrote:
Many parts of the U-Boot code base are sprinkled with #ifdefs. This makes
different boards compile different versions of the source code, meaning
that we must build all boards to check for failures. It is easy to misspell
an #ifdef
On Thu, Mar 21, 2013 at 03:35:40PM +0100, Wolfgang Denk wrote:
Dear Tom,
In message 514b1036.3090...@ti.com you wrote:
A system with CONFIG_SYS_HZ != 1000 is _broken_.
So, RPi is going higher, and Jon hit this on I suspect omap2420h4
which is also higher (after mathing that all
Tom == Tom Rini tr...@ti.com writes:
priv_data- cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, mmc_cd);
+ if (priv_data-cd_gpio != -1)
+ mmc-getcd = omap_mmc_getcd;
+
priv_data- wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, mmc_wp);
+ if (priv_data-wp_gpio != -1)
+
Tom == Tom Rini tr...@ti.com writes:
Tom On Thu, Mar 21, 2013 at 03:00:03PM +0100, Peter Korsgaard wrote:
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't
provide handlers for them.
Signed-off-by: Peter Korsgaard peter.korsga...@barco.com
Tom Do we really need
On Thu, Mar 21, 2013 at 03:43:46PM +0100, Peter Korsgaard wrote:
Tom == Tom Rini tr...@ti.com writes:
priv_data- cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, mmc_cd);
+ if (priv_data-cd_gpio != -1)
+ mmc-getcd = omap_mmc_getcd;
+
priv_data- wp_gpio =
block_read returns unsigned long, so it doesn't make sense to check for
0. and neither does marking the header structure as const and then
casting away the constness to load data into it.
Also cleanup some unneeded pointer casting while we're at it.
Signed-off-by: Peter Korsgaard
On 03/21/2013 01:57 AM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 514aa642.3090...@wwwdotorg.org you wrote:
Interesting. I just noticed the same problem, and posted the following
patch to fix it:
http://lists.denx.de/pipermail/u-boot/2013-March/149625.html
This was on the
Hi Marek,
On 03/20/2013 07:19 PM, Marek Vasut wrote:
Dear Jon Hunter,
On 01/24/2013 05:05 AM, Jim Lin wrote:
Autoboot timeout defined by CONFIG_BOOTDELAY will not be accurate if
CONFIG_USB_KEYBOARD and CONFIG_SYS_USB_EVENT_POLL are defined in
configuration file and when tstc() function for
On 03/21/2013 09:41 AM, Tom Rini wrote:
On Thu, Mar 21, 2013 at 03:35:40PM +0100, Wolfgang Denk wrote:
Dear Tom,
In message 514b1036.3090...@ti.com you wrote:
A system with CONFIG_SYS_HZ != 1000 is _broken_.
So, RPi is going higher, and Jon hit this on I suspect omap2420h4
which is also
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/21/2013 11:25 AM, Jon Hunter wrote:
On 03/21/2013 09:41 AM, Tom Rini wrote:
On Thu, Mar 21, 2013 at 03:35:40PM +0100, Wolfgang Denk wrote:
Dear Tom,
In message 514b1036.3090...@ti.com you wrote:
A system with CONFIG_SYS_HZ != 1000 is
Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED
is not set, in which case Ether gadget only operates in fullspeed.
Reviewed-by: Tom Rini tr...@ti.com
Signed-off-by: Bin Liu b-...@ti.com
---
drivers/usb/musb-new/musb_core.c |2 ++
drivers/usb/musb-new/musb_uboot.c |2
On TI AM335x devices, MUSB has bulk split/combine feature enabled
in the ConfigData register, but the current MUSB driver does not
support it yet. Therefore, disable the feature for now, until the
driver adds the support.
One usecase which is broken because of this feature is that Ether
gadget
On 03/21/2013 12:55 AM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 1363842874-8286-1-git-send-email-swar...@wwwdotorg.org you wrote:
Commit b2f3e0e console: USB: KBD: Fix incorrect autoboot timeout
re-wrote the bootdelay timeout loop. However, it hard-coded the value
that
Thanks Abbas,
On 03/20/2013 11:38 PM, Abbas Raza wrote:
From: Abbas Raza abbas_r...@mentor.com
Maximum bus width supported by SabreLite board is not 8bit like
all other mx6q specific boards. In case where both host controller
and card support 8bit transfers, they agree to communicate on 8bit
Albert,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Monday, March 04, 2013 4:30 PM
To: u-boot@lists.denx.de; Albert Aribaud
Cc: Simon Glass; Tom Warren; Stephen Warren
Subject: [PATCH 1/2] ARM: implement erratum 716044 workaround
This patchset from
Simon,
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
checkpatch has a new type of warning, a 'CHECK'. At present patman fails
with these, which makes it less than useful.
Add support for checks, making it backwards compatible with the old
checkpatch.
There are also a
On Thu, Mar 21, 2013 at 5:13 AM, Akshay Saraswat aksha...@samsung.com wrote:
We intended to clear the bits of CLK_SRC_TOP2 register, instead we were
writing on the reserved bits of src_core1 register. Since the default
value of clk_src_top2 register were itself zero, this typo was not
creating
Simon,
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
# Separates a tag: at the beginning of the subject from the rest of it
-re_subject_tag = re.compile('([^:]*):\s*(.*)')
+re_subject_tag = re.compile('([^:]*):\s*(.*)')
I'd go further and prevent all spaces.
Hi fellow U-Boot developers,
people meeting us at our booth at the Embedded World trade show in
Nürnberg this year may already have heard rumours about it but now it is
official - there will be an U-Boot mini-summit at the Emdedd Linux
Conference Europe in Edinburgh, UK [1].
Thanks to the
Simon,
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
A few of the help messages are not quite right, and there is a typo
in the README. Fix these.
Signed-off-by: Simon Glass s...@chromium.org
---
tools/patman/README| 2 +-
tools/patman/patman.py | 4 ++--
2
Simon,
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
This comment is less than helpful. Since multiple tags are supported, add
an example of how multiple tags work.
Signed-off-by: Simon Glass s...@chromium.org
---
tools/patman/commit.py | 5 +++--
1 file changed, 3
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.
Signed-off-by: Bernie Thompson bhthomp...@chromium.org
Signed-off-by: Bill Richardson
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
This patch adds I2C support for carrying out the cros_ec protocol.
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
This patch adds SPI support for carrying out the cros_ec protocol.
Signed-off-by: Hung-ying Tyan ty...@chromium.org
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
This patch adds LPC support for carrying out the cros_ec protocol.
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Hung-ying Tyan ty...@chromium.org
On Thu, Mar 21, 2013 at 03:55:17PM +0100, Peter Korsgaard wrote:
block_read returns unsigned long, so it doesn't make sense to check for
0. and neither does marking the header structure as const and then
casting away the constness to load data into it.
Also cleanup some unneeded pointer
Hi Hung-ying,
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
This patch adds the driver for keyboard that's controlled by ChromeOS EC.
Signed-off-by: Randall Spangler rspang...@chromium.org
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Vincent Palatin
Simon,
Nothing critical and this could go in as-is, but a few nits below.
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
-raw += LookupEmail(item, alias)
+raw += LookupEmail(item, alias, raise_on_error=not ignore_errors)
optional: Change it so functions
Simon,
On Wed, Mar 20, 2013 at 7:42 PM, Simon Glass s...@chromium.org wrote:
Especially with the Linux kernel, it takes a long time (a minute or more)
to test-apply the patches, so patman becomes significantly less useful.
The only real problem that is found with this apply step is trailing
Hi Hung-ying,
On Mon, Mar 18, 2013 at 9:22 AM, Hung-ying Tyan ty...@chromium.org wrote:
Signed-off-by: Hung-ying Tyan ty...@chromium.org
---
Changes in v2:
- Add gpio node to exynos5250.dtsi.
Acked-by: Simon Glass s...@chromium.org
This looks right to me. I think we will need to revisit
Simon,
On Wed, Mar 20, 2013 at 7:43 PM, Simon Glass s...@chromium.org wrote:
For some series with lots of changes it is annoying that duplicate change
log items are not caught. It is also helpful sometimes to sort the change
logs.
Add a Series-process-log tag to enable this, which can be
Hi Tom,
On Thu, 21 Mar 2013 09:29:14 -0700, Tom Warren twar...@nvidia.com
wrote:
Albert,
-Original Message-
From: Stephen Warren [mailto:swar...@wwwdotorg.org]
Sent: Monday, March 04, 2013 4:30 PM
To: u-boot@lists.denx.de; Albert Aribaud
Cc: Simon Glass; Tom Warren; Stephen
Hi Scott,
On Wed, 20 Mar 2013 17:35:51 -0500, Scott Wood
scottw...@freescale.com wrote:
On 03/20/2013 05:11:57 PM, Albert ARIBAUD wrote:
Hi Scott,
On Wed, 20 Mar 2013 14:36:05 -0500, Scott Wood
scottw...@freescale.com wrote:
On 03/20/2013 02:15:19 PM, Tom Rini wrote:
On Wed,
On 03/21/2013 10:28 AM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/21/2013 11:25 AM, Jon Hunter wrote:
On 03/21/2013 09:41 AM, Tom Rini wrote:
On Thu, Mar 21, 2013 at 03:35:40PM +0100, Wolfgang Denk wrote:
Dear Tom,
In message 514b1036.3090...@ti.com you wrote:
On 03/21/2013 12:58:37 PM, Albert ARIBAUD wrote:
Hi Scott,
On Wed, 20 Mar 2013 17:35:51 -0500, Scott Wood
scottw...@freescale.com wrote:
On 03/20/2013 05:11:57 PM, Albert ARIBAUD wrote:
Hi Scott,
On Wed, 20 Mar 2013 14:36:05 -0500, Scott Wood
scottw...@freescale.com wrote:
On
On 03/21/2013 08:37:32 AM, Wolfgang Denk wrote:
Dear Tom,
In message 20130321122923.GB26945@bill-the-cat you wrote:
Not really. Only a tiny fraction of users will ever run any
standalone
applications, so please let's save the memory footprint for the
overwhelming majority of users who
Albert,
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: Thursday, March 21, 2013 10:56 AM
To: Tom Warren
Cc: u-boot@lists.denx.de; Simon Glass; Stephen Warren; Tom Warren;
Stephen Warren
Subject: Re: [PATCH 1/2] ARM: implement erratum 716044
On 03/21/2013 12:02:23 AM, Sricharan R wrote:
On Thursday 21 March 2013 06:01 AM, Scott Wood wrote:
On 03/20/2013 07:27:29 PM, Michael Cashwell wrote:
On Mar 20, 2013, at 7:48 PM, Scott Wood scottw...@freescale.com
wrote:
On 03/20/2013 06:33:41 PM, Michael Cashwell wrote:
What is the
Dear Jon Hunter,
In message 514b2482.5000...@ti.com you wrote:
I understand that you may wish to have SYS_HZ == 1000, but shouldn't the
code still normalise the get_timer() value to SYS_HZ?
If I grep through the u-boot source I see a lot of instances where
get_timer() is normalised to
Dear Stephen Warren,
In message 514b2f8e.2090...@wwwdotorg.org you wrote:
Then why does the config option still exist; surely it should be
removed, or defined somewhere other than the per-board config file?
Removing it requires work, including testing efforts...
Best regards,
Wolfgang Denk
Dear Jon Hunter,
In message 514b22fb.1000...@ti.com you wrote:
The question is what should get_timer() be returning? If it is meant to
be milliseconds then I guess I need to fix get_timer() for my board.
However, if it is just meant to be timer ticks at the SYS_HZ rate then I
It is ticks
Dear Scott Wood,
In message 1363889275.31522.12@snotra you wrote:
There is no need to change any syntax.
Then how would we know what range to flush?
Use a IH_TYPE_STANDALONE U-Boot image, and bootm?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk
Dear Scott,
In message 1363890157.31522.14@snotra you wrote:
As above it's from flash (I assume NOR) to RAM. The why is to be =20
able to run the code from RAM. :-P
* Why don't you run it form flash?
* Why do you insist on using the go command (instead of bootm with
a IH_TYPE_STANDALONE
Bash ver 3.x doesn't support the parameter expansion with case
substitution. Use tr instead.
Signed-off-by: York Sun york...@freescale.com
---
I am not sure if using 'tr' is a good idea. Any suggestion is welcomed.
MAKEALL |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On Thu, Mar 21, 2013 at 12:58:15PM -0700, York Sun wrote:
Bash ver 3.x doesn't support the parameter expansion with case
substitution. Use tr instead.
Signed-off-by: York Sun york...@freescale.com
---
I am not sure if using 'tr' is a good idea. Any suggestion is welcomed.
MAKEALL |2
On 03/21/2013 02:25:10 PM, Wolfgang Denk wrote:
Dear Scott,
In message 1363890157.31522.14@snotra you wrote:
As above it's from flash (I assume NOR) to RAM. The why is to be
=20
able to run the code from RAM. :-P
* Why don't you run it form flash?
Presumably because it's slow. As
On 03/21/2013 01:28 PM, Allen Martin wrote:
On Thu, Mar 21, 2013 at 12:58:15PM -0700, York Sun wrote:
Bash ver 3.x doesn't support the parameter expansion with case
substitution. Use tr instead.
Signed-off-by: York Sun york...@freescale.com
---
I am not sure if using 'tr' is a good idea.
Hi Stephen,
On Tue, Mar 19, 2013 at 12:13 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 03/19/2013 01:01 PM, Simon Glass wrote:
Hi Allen,
On Sat, Mar 16, 2013 at 9:58 PM, Allen Martin amar...@nvidia.com wrote:
This feature was only used for tegra20 seaboard that had a pinmux
conflict
Hi Stephen,
On Tue, Mar 19, 2013 at 11:24 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 03/16/2013 10:58 PM, Allen Martin wrote:
Add a common interface to fdt based SPI drivers. Each driver is
represented by a table entry in fdt_spi_drivers[]. If there are
multiple SPI drivers in the
On Thu, Mar 21, 2013 at 12:09 AM, Manfred Huber man.hu...@arcor.de wrote:
Am 20.03.2013 02:27, schrieb Tom Rini:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/19/2013 08:05 PM, Javier Martinez Canillas wrote:
On Tue, Mar 19, 2013 at 3:49 PM, Tom Rini tr...@ti.com wrote:
On Sat, Mar
Hi,
On Tue, Mar 19, 2013 at 11:23 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 03/16/2013 10:58 PM, Allen Martin wrote:
This series pulls fdt functionality from the existing tegra20 and
tegra30 SPI drivers into a new common fdt SPI driver front end,
then adds a new tegra114 SPI driver
Hi Manfred,
On Thu, Mar 21, 2013 at 8:03 PM, Manfred Huber man.hu...@arcor.de wrote:
From: Manfred Huber
Beagleboard UART (ns16550) doesn't set the Transmitter Empty (TEMT) Bit in
SPL. Only Transmitter Hold Register Empty (THRE) Bit is set. This makes SPL
to hang while waiting for TEMT.
Hi Lukasz,
On Thursday, March 21, 2013 10:43:49 PM, Lukasz Majewski wrote:
Hi Benoît
The migration of boards from Makefile to boards.cfg was due for
v2012.03, but smdk6400 did not follow, and it does not build, so move
it to scrapyard. It will still be possible to restore it from the Git
Hi Rajeshwari,
On Thu, Mar 21, 2013 at 4:33 AM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Changes in V2:
- Enabled CMD_GPIO as suggested by Simon Glass and
supported same for EXYNOS5
Changes in V3:
- New patch added to rename S5P GPIO definitions to
On Thu, Mar 21, 2013 at 08:03:59PM +0100, Manfred Huber wrote:
From: Manfred Huber
Beagleboard UART (ns16550) doesn't set the Transmitter Empty (TEMT)
Bit in SPL. Only Transmitter Hold Register Empty (THRE) Bit is set.
This makes SPL to hang while waiting for TEMT. Adding the
On 03/21/2013 05:21:00 PM, Tom Rini wrote:
On Thu, Mar 21, 2013 at 08:03:59PM +0100, Manfred Huber wrote:
From: Manfred Huber
Beagleboard UART (ns16550) doesn't set the Transmitter Empty (TEMT)
Bit in SPL.
The serial port behaves differently based on the stage of U-Boot that
is running?
On Thu, 21 Mar 2013 03:12:54 -0400
Akshay Saraswat aksha...@samsung.com wrote:
On Mon, 18 Mar 2013 02:06:15 -0400
Akshay Saraswat aksha...@samsung.com wrote:
+ while ((readl(ace_sha_reg-hash_status) ACE_HASH_MSGDONE_MASK) ==
+ ACE_HASH_MSGDONE_OFF) {
+ /*
+
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer
driver to conform to this.
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
arch/arm/cpu/arm1176/bcm2835/timer.c | 13 +
include/configs/rpi_b.h |2 +-
2 files changed, 10 insertions(+),
CONFIG_SYS_HZ must be 1000, and get_timer() must therefore return mS.
Document this.
Signed-off-by: Stephen Warren swar...@wwwdotorg.org
---
README |6 ++
1 file changed, 6 insertions(+)
diff --git a/README b/README
index 7f2506a..1871ada 100644
--- a/README
+++ b/README
@@ -495,6
The back-to-back-writes workaround in the BCM2835 MMC driver assumed
that get_timer() returned uS. Now that it returns mS, the delay is far
too long. Use udelay() directly to avoid this. Dispense with the
last_write code since we now have no way of recording an absolute
time in uS. The difference
Hi Kim,
On Thu, 21 Mar 2013 03:12:54 -0400
Akshay Saraswat aksha...@samsung.com wrote:
On Mon, 18 Mar 2013 02:06:15 -0400
Akshay Saraswat aksha...@samsung.com wrote:
+ while ((readl(ace_sha_reg-hash_status) ACE_HASH_MSGDONE_MASK) ==
+ ACE_HASH_MSGDONE_OFF) {
+ /*
+
Hi Benoît
The migration of boards from Makefile to boards.cfg was due for
v2012.03, but smdk6400 did not follow, and it does not build, so move
it to scrapyard. It will still be possible to restore it from the Git
history before fixing it.
Signed-off-by: Benoît Thébaudeau
Hi Josh,
minor comment as following.
On 3/21/2013 9:52, Josh Wu wrote:
Add support for following features:
- nand boot, with PMECC 2bit ECC for 512 bytes sector
- SPI flash boot
- SD card boot
- LCD support
Signed-off-by: Josh Wu josh...@atmel.com
---
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