Hi Benoît,
CC:ing Stephen Warren who wrote commit 2b7818d4 which git blame tells
me added the ASSERT() to arch/arm/cpu/u-boot.lds, and Tom Rini to help
decide what to do.
On Fri, 5 Apr 2013 05:44:55 +0200 (CEST), Benoît Thébaudeau
benoit.thebaud...@advansee.com wrote:
Hi Albert,
On Friday,
On 05.04.2013 02:04, txcotrader wrote:
After looking deeper I've found a difference in register values when
performing drivers/i2c/ppc4xx_i2c.c-i2c_transfer function.
v1.7.02 code yields:
/* Transfer is in progress
* we have to wait for upto 5 bytes of data
* 1 byte
+ Michael
On Friday 05 April 2013 11:21 AM, Lokesh Vutla wrote:
Commit 8602114 omap: emif: configure emif only when required
breaks SDRAM_AUTO_DETECTION.
The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection)
done in do_sdram_init(). The above commit moves dmm_init() above
Hi Amar,
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds commands to access(open/close) and resize boot partitions on
EMMC.
Signed-off-by: Amar amarendra...@samsung.com
---
Changes since V1:
1)Combined the common piece of code between 'open' and 'close'
operations.
Hi Tetsuyuki,
On Fri, 5 Apr 2013 10:45:14 +0900, Tetsuyuki Kobayashi
k...@kmckk.co.jp wrote:
When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it
Hi Sricharan,
On Fri, 5 Apr 2013 11:24:34 +0530, Sricharan R r.sricha...@ti.com
wrote:
So with OMAP added to multi platform kernel,
the uImage no more contains a valid load address.
With the uboot already supporting zImage,
change the default boot command to bootz
instead.
Acked-by:
Hi Albert,
On Friday 05 April 2013 12:36 PM, Albert ARIBAUD wrote:
Hi Sricharan,
On Fri, 5 Apr 2013 11:24:34 +0530, Sricharan R r.sricha...@ti.com
wrote:
So with OMAP added to multi platform kernel,
the uImage no more contains a valid load address.
With the uboot already supporting
Hi Jaehoon,
Please find the responses below
Thanks Regards
Amarendra Reddy
On 5 April 2013 11:51, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi Amar,
On 04/03/2013 11:08 PM, Amar wrote:
This patch adds commands to access(open/close) and resize boot
partitions on EMMC.
Hi,
-Original Message-
From: u-boot-boun...@lists.denx.de
[mailto:u-boot-boun...@lists.denx.de] On Behalf Of Simon Glass
Sent: Thursday, April 04, 2013 10:25 PM
To: Tom Rini
Cc: U-Boot Mailing List
Subject: Re: [U-Boot] [STATUS] v2013.04-rc2 released
Hi Tom,
On Wed, Apr 3,
Hi Sricharan,
On Fri, 5 Apr 2013 12:44:45 +0530, Sricharan R r.sricha...@ti.com
wrote:
Hi Albert,
On Friday 05 April 2013 12:36 PM, Albert ARIBAUD wrote:
Hi Sricharan,
On Fri, 5 Apr 2013 11:24:34 +0530, Sricharan R r.sricha...@ti.com
wrote:
So with OMAP added to multi platform
Hi Reinhard,
On Fri, 5 Apr 2013 09:48:55 +0200, Pfau, Reinhard p...@gdsys.de
wrote:
But I'm not sure if I can submit a patch on the U-Boot ML which requires
another
patch (namely Che-Liang Chious TPM patch) which is not already in the
main line.
Yes you can, provided you clearly state the
hello,
I have read about U - boot from Emebedded Linux Primer 2nd Edition.
I want more in depth knowledge of U - boot.
Can you please suggest me or give me the references through which I get
more in depth knowledge about U - boot?
Regards
Rajdeep Vaghasia
Hi Rajdeep,
On Fri, 5 Apr 2013 12:27:02 +0530, Rajdeep Vaghasia
rajdeep.vagha...@gmail.com wrote:
hello,
I have read about U - boot from Emebedded Linux Primer 2nd Edition.
I want more in depth knowledge of U - boot.
Can you please suggest me or give me the references through which I
IGEP COM AQUILA and CYGNUS are two computer-on-module based on AM3354 and
AM3352 processors. Both use SODIMM from factor and are designed for industrial
range purpose.
Changes since v1 (As Tom suggested)
* Remove ATAGS and FDT as we have no support.
* Remove CMD_EXT2 as is not required.
*
These boards uses Samsung K4B2G1646E-BIH9 a 2Gb E-die DDR3 SDRAM.
Signed-off-by: Enric Balletbo i Serra eballe...@iseebcn.com
---
arch/arm/include/asm/arch-am33xx/ddr_defs.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h
The IGEP COM AQUILA and CYGNUS are industrial processors modules with
following highlights:
o AM3352/AM3354 Texas Instruments processor
o Cortex-A8 ARM CPU
o 3.3 volts Inputs / Outputs use industrial
o 256 MB DDR3 SDRAM / 128 Megabytes FLASH
o MicroSD card reader on-board
o Ethernet
On Friday 05 April 2013 01:38 PM, Albert ARIBAUD wrote:
Hi Sricharan,
On Fri, 5 Apr 2013 12:44:45 +0530, Sricharan R r.sricha...@ti.com
wrote:
Hi Albert,
On Friday 05 April 2013 12:36 PM, Albert ARIBAUD wrote:
Hi Sricharan,
On Fri, 5 Apr 2013 11:24:34 +0530, Sricharan R
On Fri, Apr 5, 2013 at 8:57 AM, Rajdeep Vaghasia
rajdeep.vagha...@gmail.com wrote:
hello,
I have read about U - boot from Emebedded Linux Primer 2nd Edition.
I want more in depth knowledge of U - boot.
Can you please suggest me or give me the references through which I get
more in depth
Hello Andreas,
I have the following problem when switching from nandecc hw hamming to
nandecc hw bch8.
Thomas
---8--
U-Boot 2013.04-rc2-6-g9abd2ec (Apr 05 2013 - 09:58:48)
OMAP3530-GP ES3.1, CPU-OPP2, L3-165MHz, Max CPU Clock 600 mHz
OMAP3 DevKit8000 + LPDDR/NAND
I2C: ready
Dear Minkyu,
Thanks for the review.
On 29 March 2013 08:27, Minkyu Kang mk7.k...@samsung.com wrote:
Dear Inderpal Singh,
On 15/03/13 15:23, Inderpal Singh wrote:
tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.
Also
The first patch moves the tzpc_init file from smdk5250 to armv7/exynos.
The second makes tzpc common for exynos4 and exynos5. And the third
makes necessary changes to exynos4 based origen and smdkv310 boards.
The patchset has been tested on exynos4 based origen and exynos5 based
Arndale board.
This requires that cpu_is_exynos4/5 should be made available before tzpc_init.
Hence this patch also makes necessary changes to have cpu_info in spl and
invokes arch_cpu_init before tzpc_init in low_level_init.S for smdk5250.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by:
Dear Thomas Weber,
On 04/05/2013 10:13 AM, Thomas Weber wrote:
Hello Andreas,
I have the following problem when switching from nandecc hw hamming to
nandecc hw bch8.
Thomas
---8--
U-Boot 2013.04-rc2-6-g9abd2ec (Apr 05 2013 - 09:58:48)
OMAP3530-GP ES3.1, CPU-OPP2,
tzpc_init is common for all exynos5 boards, hence move it to
armv7/exynos so that all other boards can use it.
Also update the smdk5250 Makefile and config file.
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Chander Kashyap chander.kash...@linaro.org
---
Signed-off-by: Inderpal Singh inderpal.si...@linaro.org
Acked-by: Chander Kashyap chander.kash...@linaro.org
---
board/samsung/origen/lowlevel_init.S | 44 ++-
board/samsung/origen/origen_setup.h| 25 -
board/samsung/smdkv310/lowlevel_init.S | 60
Now with kernel moving to all device tree, the default
boot command is changed to pass the device tree blob.
Also, adding the findfdt command to get the dt-blob
based on the board.
Thanks to Tom Rini tr...@ti.com for suggesting this.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
[V4] Added
So with OMAP added to multi platform kernel,
the uImage no more contains a valid load address.
With the uboot already supporting zImage,
change the default boot command to bootz
instead.
Acked-by: Nishanth Menon n...@ti.com
Signed-off-by: Sricharan R r.sricha...@ti.com
Tested-by: Nishanth Menon
With uppcoming BCH support on OMAP devices we need to decide between differnt
algorithms when switching the ECC engine. Currently we support 1-bit hammign
and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the
interface of omap_nand_switch_ecc()
Hi Albert
(04/05/2013 04:04 PM), Albert ARIBAUD wrote:
Hi Tetsuyuki,
On Fri, 5 Apr 2013 10:45:14 +0900, Tetsuyuki Kobayashi
k...@kmckk.co.jp wrote:
When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
When swi instruction is executed, it is expected to get message
software interrupt in console and dump registers and reboot, as
do_software_interrupt() in arch/arm/lib/interrupts.c.
But, actually it causes data abort accessing wrong address in get_bad_stack_swi
macro in arch/arm/cpu/v7/start.S.
Dear Tom Rini,
In message 20130403153014.GF7035@bill-the-cat you wrote:
On Fri, Mar 22, 2013 at 11:26:21AM -, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
Most of the various environment functions create CONFIG_ENV_SIZE buffers on
the stack. At least on ARM and
Hi all.
I am working on registering a gpio interrupt in the u-boot. I am using the a
Armv7 ( Arm cortex A9) platform. My question is about registering a IRQ
handler for the interrupt. I tried writing the function pointer of my IRQ
directly to Interrupt vector table ( which is at 0x in my
Hi all,
I am working on ODROID PC Exynos-4 Board (Cortex-A9). In that board i am
working MAX98089 Audio codec.
How to initialize this audio codec and how to test this one in UBOOT level.
Can you please help me on this.
Thanks
Prem V.
On Sat, Feb 16, 2013 at 9:51 AM, Simon Glass
Hello Andreas,
On 04/03/2013 04:50 PM, Andreas Bießmann wrote:
The kernel states:
---8---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented
using
the BCH library.
---8---
And we do so
Hello Andreas,
this patch fixes the reported BUG().
The output is now:
-8-
OMAP3 DevKit8000 # nandecc hw hamming
1-bit hamming HW ECC selected
OMAP3 DevKit8000 # nandecc hw bch8
Unsupported HW ECC algorithm
NAND_ECC_NONE selected by board driver. This is not recommended !!
OMAP3
Hi Prem S,
We initialise MAX98095 using device tree, if you don't have a device
tree support u need to have a asm/arch/sound.h
which will initialise all values like sample rate, codec type, etc..
Actually in u-boot we have added audio support to play a beep sound.
You can have look at
Dear Thomas Weber,
On 04/05/2013 01:48 PM, Thomas Weber wrote:
Hello Andreas,
this patch fixes the reported BUG().
The output is now:
-8-
OMAP3 DevKit8000 # nandecc hw hamming
1-bit hamming HW ECC selected
OMAP3 DevKit8000 # nandecc hw bch8
Unsupported HW ECC algorithm
Dear Thomas Weber,
On 04/05/2013 01:44 PM, Thomas Weber wrote:
Hello Andreas,
On 04/03/2013 04:50 PM, Andreas Bießmann wrote:
snip
diff --git a/doc/README.omap3 b/doc/README.omap3
index 0a37de0..56aca8e 100644
--- a/doc/README.omap3
+++ b/doc/README.omap3
@@ -145,6 +145,25 @@ int
On Fri, Apr 05, 2013 at 08:00:43AM +0200, Albert ARIBAUD wrote:
Hi Beno??t,
CC:ing Stephen Warren who wrote commit 2b7818d4 which git blame tells
me added the ASSERT() to arch/arm/cpu/u-boot.lds, and Tom Rini to help
decide what to do.
[snip]
Looks good, but what about the __bss_end in
Hi Albert,
On Friday, April 5, 2013 8:00:43 AM, Albert ARIBAUD wrote:
Hi Benoît,
CC:ing Stephen Warren who wrote commit 2b7818d4 which git blame tells
me added the ASSERT() to arch/arm/cpu/u-boot.lds, and Tom Rini to help
decide what to do.
On Fri, 5 Apr 2013 05:44:55 +0200 (CEST),
The kernel states:
---8---
The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not
provide automatic error location and correction: this step is implemented using
the BCH library.
---8---
And we do so in u-boot.
This implementation uses the same layout for BCH8 but it is
On 04/05/2013 06:17 AM, Wolfgang Denk wrote:
Dear Tom Rini,
In message 20130403153014.GF7035@bill-the-cat you wrote:
On Fri, Mar 22, 2013 at 11:26:21AM -, Rob Herring wrote:
From: Rob Herring rob.herr...@calxeda.com
Most of the various environment functions create CONFIG_ENV_SIZE
On 04/05/2013 07:53 AM, Tom Rini wrote:
On Fri, Apr 05, 2013 at 08:00:43AM +0200, Albert ARIBAUD wrote:
Hi Beno??t,
CC:ing Stephen Warren who wrote commit 2b7818d4 which git blame
tells me added the ASSERT() to arch/arm/cpu/u-boot.lds, and Tom
Rini to help decide what to do.
[snip]
Looks
On Fri, Apr 05, 2013 at 03:56:46PM +0200, Beno??t Th??baudeau wrote:
Hi Albert,
On Friday, April 5, 2013 8:00:43 AM, Albert ARIBAUD wrote:
Hi Beno??t,
[snip]
IIUC, this future patch would increase the limit for SPL run-time size,
as the constant against which the ASS tests __bss_end for
Dear Rob Herring,
In message 515eed36.9090...@gmail.com you wrote:
The stack size limit only comes into play when bootm runs and starts
moving initrd and dtb to high addresses below the stack. At that point,
the stack size does become limited because only 4KB (recently increase
from 1KB) of
Dear Rob Herring,
In message 515eed36.9090...@gmail.com you wrote:
The stack size limit only comes into play when bootm runs and starts
moving initrd and dtb to high addresses below the stack. At that point,
the stack size does become limited because only 4KB (recently increase
from 1KB) of
Today, the eMMC on the omap5_uevm cannot be booted from, due to a bug in
the save_boot_params function that tests for a range of XIP to MMC2.
But in the case of OMAP5, MMC2 is eMMC boot partition and MMC2_2 is eMMC
(main), and uEVM can only boot from MMC2_2. We cannot just update the
test as-is
In the case of booting from certain peripherals, such as UART, we must
not see what the device descriptor says for RAW or FAT mode because in
addition to being nonsensical, it leads to a hang. This is why we have
a test currently for the boot mode being within range. The problem
however is that
The omap5_uevm platform has eMMC, and it makes sense to say that our
default env storage shall reside there. Other platforms may not, so
move this choice to the EVM config. In addition, we should provide some
way to partition the flash for later usage, so take advantage of the GPT
partition
Cc: Sricharan R r.sricha...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/omap5_common.h |3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/include/configs/omap5_common.h b/include/configs/omap5_common.h
index 6ba5022..a6348a6 100644
---
Dear Tom, dear Albert,
In message 20130405111710.8c04c200...@gemini.denx.de I wrote:
I hereby request to revert that commit.
In addition to commit 60d7d5a env: fix potential stack overflow in
environment functions discussed here, I think we should also revert
commit fcfa696 ARM: increase lmb
On Thu, Apr 04, 2013 at 07:10:05AM +0200, Stefan Roese wrote:
Hi Tom,
please pull the updated cfi-flash repository with the build warning fix:
The following changes since commit 5644369450635fa5c2967bee55b1ac41f6e988d0:
Merge branch 'ag...@denx.de' of git://git.denx.de/u-boot-staging
Dear Matt,
In message CAKGA1bnoNJMYnj1qZUjrMZLvyrr0RT-S1y7-iYy=u2hebbw...@mail.gmail.com
you wrote:
I will submit this as a series shortly (with the configuration update)
if this patch has been dropped
already, alternatively I will just submit the configuration update and
remark that it
On 04/05/2013 11:24 AM, Wolfgang Denk wrote:
Dear Tom, dear Albert,
In message 20130405111710.8c04c200...@gemini.denx.de I wrote:
I hereby request to revert that commit.
In addition to commit 60d7d5a env: fix potential stack overflow in
environment functions discussed here, I think we
Hi Wolfgang,
On Sat, Mar 9, 2013 at 1:09 AM, Wolfgang Denk w...@denx.de wrote:
Dear Matt,
In message 1345733053-5023-1-git-send-email-m...@genesi-usa.com you wrote:
This gives us a string like 20120822150855 which encodes the build time.
This allows automated version checking and flashing
Dear Rob,
In message 515efe6f.1020...@gmail.com you wrote:
In addition to commit 60d7d5a env: fix potential stack overflow in
environment functions discussed here, I think we should also revert
commit fcfa696 ARM: increase lmb stack space reservation to 4KB
because it is conceptually
Hi Tom,
On Friday, April 5, 2013 6:00:30 PM, Tom Rini wrote:
On Fri, Apr 05, 2013 at 03:56:46PM +0200, Beno??t Th??baudeau wrote:
Hi Albert,
On Friday, April 5, 2013 8:00:43 AM, Albert ARIBAUD wrote:
Hi Beno??t,
[snip]
IIUC, this future patch would increase the limit for SPL
On Fri, Apr 05, 2013 at 07:32:54PM +0200, Beno??t Th??baudeau wrote:
Hi Tom,
On Friday, April 5, 2013 6:00:30 PM, Tom Rini wrote:
On Fri, Apr 05, 2013 at 03:56:46PM +0200, Beno??t Th??baudeau wrote:
Hi Albert,
On Friday, April 5, 2013 8:00:43 AM, Albert ARIBAUD wrote:
Hi
On 04/05/2013 12:13 PM, Wolfgang Denk wrote:
Dear Rob,
In message 515efe6f.1020...@gmail.com you wrote:
In addition to commit 60d7d5a env: fix potential stack overflow in
environment functions discussed here, I think we should also revert
commit fcfa696 ARM: increase lmb stack space
Dear Rob,
In message 515f1504.4090...@gmail.com you wrote:
If the stack is all of RAM, then what address should the initrd and dtb
be copied to?
Why do they have to be copied at all? Why cannot they remain where
they have been loaded in the firtst place? The memcpy just costs time,
On Fri, Apr 05, 2013 at 01:16:36PM -0500, Rob Herring wrote:
On 04/05/2013 12:13 PM, Wolfgang Denk wrote:
Dear Rob,
In message 515efe6f.1020...@gmail.com you wrote:
In addition to commit 60d7d5a env: fix potential stack overflow in
environment functions discussed here, I think we
Hi Tom,
On Fri, 5 Apr 2013 13:55:21 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 05, 2013 at 07:32:54PM +0200, Beno??t Th??baudeau wrote:
Hi Tom,
On Friday, April 5, 2013 6:00:30 PM, Tom Rini wrote:
On Fri, Apr 05, 2013 at 03:56:46PM +0200, Beno??t Th??baudeau wrote:
Hi Albert,
On Fri, 5 Apr 2013 21:17:40 +0200, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Tom,
On Fri, 5 Apr 2013 13:55:21 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 05, 2013 at 07:32:54PM +0200, Beno??t Th??baudeau wrote:
Hi Tom,
On Friday, April 5, 2013 6:00:30 PM, Tom Rini
On Fri, Apr 05, 2013 at 09:17:40PM +0200, Albert ARIBAUD wrote:
Hi Tom,
On Fri, 5 Apr 2013 13:55:21 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 05, 2013 at 07:32:54PM +0200, Beno??t Th??baudeau wrote:
Hi Tom,
On Friday, April 5, 2013 6:00:30 PM, Tom Rini wrote:
On Fri,
Dear Josh Wu,
Josh Wu josh...@atmel.com writes:
Atmel change to new logo since 2012. This patch update the logo to new one.
Signed-off-by: Josh Wu josh...@atmel.com
---
tools/logos/atmel.bmp | Bin 26334 - 15478 bytes
1 file changed, 0 insertions(+), 0 deletions(-)
applied to
Hi Tom,
On Fri, 5 Apr 2013 15:44:08 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 05, 2013 at 09:17:40PM +0200, Albert ARIBAUD wrote:
Hi Tom,
On Fri, 5 Apr 2013 13:55:21 -0400, Tom Rini tr...@ti.com wrote:
On Fri, Apr 05, 2013 at 07:32:54PM +0200, Beno??t Th??baudeau wrote:
dcbi instruction has been used to clear D-cache lock. However, the cache
lock is presistent for e6500 core. Use dcblc to clear the lock explicitly.
Signed-off-by: York Sun york...@freescale.com
---
arch/powerpc/cpu/mpc85xx/start.S |1 +
1 file changed, 1 insertion(+)
diff --git
Dear Albert Aribaud,
please pull the following late change into u-boot-arm/master. The other
pending patches where way after merge window close and will end up in next
branch these days.
The following changes since commit fed029f3c31b7d5df674b5090a13356b631918c7:
Merge branch
On Fri, Apr 05, 2013 at 10:04:02PM +0200, Albert ARIBAUD wrote:
The two general ideas of my proposal are:
1) to separate testing the image (text,data,rodata,lists) size on the
one hand and the image BSS size on the other hand, and
2) to consider that if a target defines an image max
On Apr 4, 2013, at 1:41 PM, Eric Nelson wrote:
Hi Andrew,
On 04/04/2013 11:03 AM, Gabbasov, Andrew wrote:
Hi Eric,
From: Eric Nelson [eric.nel...@boundarydevices.com]
Sent: Thursday, April 04, 2013 03:47
To: Gabbasov, Andrew
Cc: u-boot@lists.denx.de; Behme, Dirk - Bosch; Fabio Estevam
On 03/22/2013 02:07:48 AM, Prabhakar Kushwaha wrote:
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR
flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon git://git.denx.de/u-boot.git branch master
On 03/22/2013 02:08:05 AM, Prabhakar Kushwaha wrote:
diff --git a/board/freescale/common/Makefile
b/board/freescale/common/Makefile
index 75725b4..a4d521c 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -29,6 +29,15 @@ endif
LIB= $(obj)libfreescale.o
When we copy code/data to the main memory, we may need to flush the
cache if required by architecture. It uses the existing function
flush_cache. Syntax is
flush addr size
The addr and size are given in hexadecimal. Like memory command, there is
no sanity check for the parameters.
Hi Andreas,
On Fri, 5 Apr 2013 22:22:34 +0200, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Albert Aribaud,
please pull the following late change into u-boot-arm/master. The other
pending patches where way after merge window close and will end up in next
branch these days.
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 04/05/2013 04:50 PM, York Sun wrote:
When we copy code/data to the main memory, we may need to flush
the cache if required by architecture. It uses the existing
function flush_cache. Syntax is
flush addr size
The addr and size are given in
On 04/05/2013 02:00 PM, Tom Rini wrote:
On 04/05/2013 04:50 PM, York Sun wrote:
When we copy code/data to the main memory, we may need to flush
the cache if required by architecture. It uses the existing
function flush_cache. Syntax is
flush addr size
The addr and size are given in
Dear York Sun,
In message 1365195056-20188-1-git-send-email-york...@freescale.com you wrote:
When we copy code/data to the main memory, we may need to flush the
cache if required by architecture. It uses the existing function
flush_cache. Syntax is
flush addr size
Plain flush is way too
Dear York Sun,
In message 1365193024-11701-1-git-send-email-york...@freescale.com you wrote:
dcbi instruction has been used to clear D-cache lock. However, the cache
lock is presistent for e6500 core. Use dcblc to clear the lock explicitly.
s/presistent/persistent/ ?
Best regards,
Wolfgang
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch does the folowing
1. change the data types for unsigned int variable to unsigned
2. change the tmu_base type to struct exynos5_tmu_reg *
3. Add timer functionality for get_cur_temp()
4. error handling in the get_tmu_fdt_values()
5.
From: Naveen Krishna Chatradhi ch.nav...@samsung.com
This patch implements the mux_addr bit fields defined in tmu_control
register (used for debugging purpose)
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Reviewed-by: Vadim Bendebury vben...@google.com
---
On 04/05/2013 03:09 PM, Wolfgang Denk wrote:
Dear York Sun,
In message 1365195056-20188-1-git-send-email-york...@freescale.com you
wrote:
When we copy code/data to the main memory, we may need to flush the
cache if required by architecture. It uses the existing function
flush_cache.
dcbi instruction has been used to clear D-cache lock. However, the cache
lock is persistent for e6500 core. Use dcblc to clear the lock explicitly.
Signed-off-by: York Sun york...@freescale.com
---
Change since v1: fix typo s/presistent/persistent/
arch/powerpc/cpu/mpc85xx/start.S |1 +
1
When crc32 is handled by the hash library, it requires the data to be in
big-endian format, since it reads it byte-wise. Thus at present the 'crc32'
command reports incorrect data. For example, previously we might see:
Peach # crc32 4000 100
CRC32 for 4000 ... 40ff == 0d968558
but
On 04/05/2013 01:47:12 PM, Wolfgang Denk wrote:
Dear Rob,
In message 515f1504.4090...@gmail.com you wrote:
If the stack is all of RAM, then what address should the initrd
and dtb
be copied to?
Why do they have to be copied at all? Why cannot they remain
where
they have been
On Fri, Apr 05, 2013 at 04:11:10PM -0700, Simon Glass wrote:
When crc32 is handled by the hash library, it requires the data to be in
big-endian format, since it reads it byte-wise. Thus at present the 'crc32'
command reports incorrect data. For example, previously we might see:
Peach #
From: Fabio Estevam fabio.este...@freescale.com
Instead of having the same PAD control definition in each MX6 variant pin file,
place it into a common location.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/include/asm/arch-mx6/mx6dl_pins.h | 27
From: Fabio Estevam fabio.este...@freescale.com
mx6 solo-lite is another member of the mx6 series.
For more information about mx6 solo-lite, please visit:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SLnodeId=018rH3ZrDRB24A
Signed-off-by: Fabio Estevam
From: Fabio Estevam fabio.este...@freescale.com
mx6slevk board is a development board from Freescale based on the mx6 solo-lite
processor.
For details about mx6slevk, please refer to:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=IMX6SLEVKparentCode=i.MX6SLfpsp=1
Signed-off-by:
Add support for hsi2c controller available on exynos5420.
Note: driver currently supports only fast speed mode 100kbps
Change-Id: I02555b1dc8f4ac21c50aa5158179768563c92f43
Signed-off-by: Naveen Krishna Chatradhi ch.nav...@samsung.com
Signed-off-by: R. Chandrasekar rc.se...@samsung.com
On 04/06/2013 02:03 AM, Scott Wood wrote:
On 03/22/2013 02:07:48 AM, Prabhakar Kushwaha wrote:
IFC errata A003399 is valid for IFC NOR boot i.e.if no on-board NOR
flash or
no NOR boot, do not compile its workaround.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Based upon
On 04/06/2013 02:10 AM, Scott Wood wrote:
On 03/22/2013 02:08:05 AM, Prabhakar Kushwaha wrote:
diff --git a/board/freescale/common/Makefile
b/board/freescale/common/Makefile
index 75725b4..a4d521c 100644
--- a/board/freescale/common/Makefile
+++ b/board/freescale/common/Makefile
@@ -29,6
On 4/4/2013 3:09 AM, Trent Piepho wrote:
It's something to do with the way u-boot writes to nand. If I write
with nandwrite it doesn't happen, nandtest doesn't find any bad
Hmm, I'm pretty sure I tested burning the u-boot generated nand image
with nandwrite under Linux with exactly the same
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