This patch set enables PREAMBLE Mode for EXYNOS SPI.
Changes in v2:
- Remove preamable_count variable which is not really needed
- Fix checkpatch warning (multiple assignments)
Changes in V3:
- Modified the if logic in spi_rx_tx function
- Added blank lines as
A SPI slave may take time to react to a request. For SPI flash devices
this time is defined as one bit time, or a whole byte for 'fast read'
mode.
If the SPI slave is another CPU, then the time it takes to react may
vary. It is convenient to allow the slave device to tag the start of
the actual
Support interfaces with a preamble before each received message.
We handle this when the client has requested a SPI_XFER_END, meaning
that we must close of the transaction. In this case we read until we
see the preamble (or a timeout occurs), skipping all data before and
including the preamble.
On 29/05/2013 07:29, Wang Huan-B18965 wrote:
Where is this one defined? I don't see it in include/configs/vf610twr.h.
[Alison Wang] CONFIG_IOMUX_SHARE_CONF_REG is defined in
arch/arm/include/asm/arch-vf610/imx-regs.h. Because this is not a board
configuration, it is related to the SOC.
Hi Andy,
U seem to be busy. I you have no issues can I ask Minkyu Kang to take
them in u-boot-samsung tree. Please do reply.
--
Regards,
Rajeshwari Shinde
On Fri, May 24, 2013 at 11:16 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Andy,
Please do let us know if any comments on
From: Sricharan R r.sricha...@ti.com
SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |6 --
1 file changed, 6 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c
Misc cleanup.
And also adding a Generic bus init and write functions
for PMIC.
This series is applied on top of u-boot-ti:
git://git.denx.de/u-boot-ti.git
Lokesh Vutla (2):
ARM: OMAP4+: Cleanup header files
ARM: OMAP4+: pmic: Make generic bus init and write functions
Sricharan R (1):
ARM:
After having the u-boot clean up series, there are
many definitions that are unused in header files.
Removing all those unused ones.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap4/prcm-regs.c |3 +++
arch/arm/cpu/armv7/omap5/prcm-regs.c |2 ++
Voltage scaling can be done in two ways:
- Using SR I2C
- Using GP I2C
In order to support both, have a function pointer in pmic_data
so that we can call as per our requirement.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c |6 ++
This series update support for DRA7xx family Socs and the data for
DRA752 ES1.0 soc.
This is on top of my recent Misc cleanup series:
http://u-boot.10912.n7.nabble.com/PATCH-0-3-ARM-OMAP4-Misc-Cleanup-tt155877.html
Tested on DRA752 ES1.0, OMAP5432 ES2.0,
MAKEALL for all armv7 board has been
In DRA7xx Soc's voltage scaling is done using GPI2C.
So i2c_init should happen before scaling. I2C driver
uses __udelay which needs timer to be initialized.
So moving timer_init just before voltage scaling.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |3 ++-
drivers/mmc/omap_hsmmc.c | 26 ++
Slew rate compensation cells are not present for DRA7xx
Soc's. So return from function srcomp_enable() if soc is not
OMAP54xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap5/hwinit.c |3 +++
arch/arm/include/asm/omap_common.h |8
2 files changed, 11
From: Sricharan R r.sricha...@ti.com
Serial UART is connected to UART1. So add the change
for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |3 +++
include/configs/omap5_common.h |4
include/configs/omap5_uevm.h |4
3 files
TPS659038 is the power IC used in DRA7XX boards.
Adding support for this and also adding pmic data
for DRA7XX boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/omap-common/clocks-common.c | 23 ++
arch/arm/cpu/armv7/omap5/hw_data.c | 38
The registers that are used for device identification
are changed from OMAP5 to DRA7xx.
Using the correct registers for DRA7xx.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/include/asm/arch-omap5/clocks.h | 11 +++
arch/arm/include/asm/arch-omap5/omap.h |3 ---
2
From: Nishanth Menon n...@ti.com
DRA752 now uses AVS Class 0 voltages which are voltages in efuse.
This means that we can now use the optimized voltages which are
stored as mV values in efuse and program PMIC accordingly.
This allows us to go with higher OPP as needed in the system without
the
Updating pinmux data as specified in the latest DM
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Balaji T K balaj...@ti.com
---
arch/arm/include/asm/arch-omap5/mux_dra7xx.h |7 +++--
board/ti/dra7xx/mux_data.h | 38 --
2 files
From: Sricharan R r.sricha...@ti.com
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |4
include/configs/omap5_common.h |1 -
include/configs/omap5_uevm.h |3
Update PLL values.
SYS_CLKSEL value for 20MHz is changed to 2. In other platforms
SYS_CLKSEL value 2 represents reserved. But in sys_clk array
ind 1 is used for 13Mhz. Since other platforms are not using
13Mhz, reusing index 1 for 20MHz.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |7 ---
include/configs/dra7xx_evm.h |3 +++
include/configs/omap5_uevm.h
From: Sricharan R r.sricha...@ti.com
DRA7 EVM board has the below configuration. Adding the
settings for the same here.
2Gb_1_35V_DDR3L part * 2 on EMIF1
2Gb_1_35V_DDR3L part * 4 on EMIF2
Signed-off-by: Sricharan R r.sricha...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
On Wed, May 29, 2013 at 06:35:27AM +0200, Heiko Schocher wrote:
Hello Tom,
Am 28.05.2013 23:16, schrieb Tom Rini:
On Tue, May 28, 2013 at 11:01:09PM +0200, Wolfgang Denk wrote:
Dear Tom,
In message 20130528172309.GF5829@bill-the-cat you wrote:
Of course this can't yet apply to
Any help on this, was this a useful fix.
Thanks,
Jagan.
On Mon, May 27, 2013 at 10:49 AM, Jagannadha Sutradharudu Teki
jagannadha.sutradharudu-t...@xilinx.com wrote:
Request for an update on this.
Thanks,
Jagan.
-Original Message-
From: Jagannadha Sutradharudu Teki
On Wed, May 29, 2013 at 09:47:34AM +0900, Masahiro Yamada wrote:
Hello, Simon.
Please let me ask some more questions.
By applying these series of commits,
U-Boot's config file scheme and Kconfig coexist.
For example, scripts/Makefile.build includes
both auto.conf generated by Kconfig
On Sun, May 12, 2013 at 07:25:36PM -0700, Simon Glass wrote:
Some Makefiles doen't define COBJS, but just use COBJS-y directly. This
messes with our Kconfig script which uses COBJS to decide which objects
are needed.
Also, for directories where COBJS produces an empty list, COBJS- must be
On Wed, May 29, 2013 at 03:39:54PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/cpu/armv7/omap5/hw_data.c |6 --
1 file
Hi Albert,
On Tue, May 28, 2013 at 10:28 AM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Did you manage this test? If you did and it succeeded, then I'll merge
the series into u-boot-arm.
Unfortunately I did not manage to find some spare time to test this, sorry.
Please go ahead and
On Wed, May 29, 2013 at 04:32:42PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
The sys_clk on the dra evm board is 20MHZ.
Changing the configuration for the same.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
include/configs/dra7xx_evm.h |4
On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
arch/arm/include/asm/arch-omap5/omap.h |7 ---
On Wed, May 29, 2013 at 04:32:44PM +0530, Lokesh Vutla wrote:
From: Balaji T K balaj...@ti.com
add dra mmc pbias support and ldo1 power on
Signed-off-by: Balaji T K balaj...@ti.com
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
[snip]
+ udelay(150); /* wait 10 us */
+ value |=
On Wed, May 29, 2013 at 04:32:35PM +0530, Lokesh Vutla wrote:
This series update support for DRA7xx family Socs and the data for
DRA752 ES1.0 soc.
This is on top of my recent Misc cleanup series:
http://u-boot.10912.n7.nabble.com/PATCH-0-3-ARM-OMAP4-Misc-Cleanup-tt155877.html
Tested on
On Wednesday 29 May 2013 06:10 PM, Tom Rini wrote:
On Wed, May 29, 2013 at 03:39:54PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
SGX clocks should be enabled only for OMAP5 ES1.0.
So this can be removed.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
On Wednesday 29 May 2013 06:36 PM, Tom Rini wrote:
On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices.
So fixing it here.
Signed-off-by: Sricharan R r.sricha...@ti.com
---
Hi Tom,
On 29/05/13 16:24, Tom Rini wrote:
On 05/29/2013 02:34 AM, Lubomir Popov wrote:
Hi Tom,
On 29.05.2013 01:55, Tom Rini wrote:
On 05/27/2013 02:44 PM, Lubomir Popov wrote:
P.S. I have an updated version of the I2C driver patch, with some
minor
improvements (mainly on identification
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 05/29/2013 09:33 AM, Sricharan R wrote:
On Wednesday 29 May 2013 06:36 PM, Tom Rini wrote:
On Wed, May 29, 2013 at 04:32:43PM +0530, Lokesh Vutla wrote:
From: Sricharan R r.sricha...@ti.com
NON SECURE SRAM is 512KB in DRA7xx devices. So
Hi Alison,
On Wednesday, May 29, 2013 7:37:32 AM, Wang Huan-B18965 wrote:
Hi, Benoit,
diff --git a/doc/README.vf610 b/doc/README.vf610 new file mode
100644 index 000..38cf5cf
--- /dev/null
+++ b/doc/README.vf610
@@ -0,0 +1,10 @@
+U-Boot for Freescale Vybrid VF610
Hi Alison,
On Wednesday, May 29, 2013 7:52:33 AM, Wang Huan-B18965 wrote:
Hi, Benoit,
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+#define IMX_FEC_BASE
Hi Stefano,
On Wednesday, May 29, 2013 8:21:00 AM, Stefano Babic wrote:
On 29/05/2013 07:29, Wang Huan-B18965 wrote:
Where is this one defined? I don't see it in include/configs/vf610twr.h.
[Alison Wang] CONFIG_IOMUX_SHARE_CONF_REG is defined in
Hi Stephen,
On Tue, May 28, 2013 at 1:57 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/28/2013 01:36 PM, Simon Glass wrote:
There are a few partially conflicting requirements in compiling the device
tree, since U-Boot relies on whatever is installed on the build machine.
Some
Hi Wolfgang,
On Tue, May 28, 2013 at 2:08 PM, Wolfgang Denk w...@denx.de wrote:
Dear Simon Glass,
In message 1369769778-12455-1-git-send-email-...@chromium.org you wrote:
Some device tree files use the word 'linux' which gets replaced with '1' by
many version of gcc, including version 4.7.
Hi Tom,
On Tue, 28 May 2013 14:16:41 -0700, Tom Warren
twarren.nvi...@gmail.com wrote:
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL for all the Tegra boards is OK, running a ./MAKEALL -a arm now.
tools/checkpatch.pl is clean.
The following changes since
On 05/29/2013 09:59 AM, Simon Glass wrote:
Hi Stephen,
On Tue, May 28, 2013 at 1:57 PM, Stephen Warren swar...@wwwdotorg.org wrote:
On 05/28/2013 01:36 PM, Simon Glass wrote:
There are a few partially conflicting requirements in compiling the device
tree, since U-Boot relies on whatever is
On 05/28/2013 03:08 PM, Wolfgang Denk wrote:
Dear Simon Glass,
In message 1369769778-12455-1-git-send-email-...@chromium.org you wrote:
Some device tree files use the word 'linux' which gets replaced with '1' by
many version of gcc, including version 4.7. So undefine this.
I think this
Dear Simon,
In message CAPnjgZ2a+qrsPWTz5Y=48m_lcrqaiky0-sejudw8ay5asdw...@mail.gmail.com
you wrote:
I think this is not a good way to address this issue. The GCC
documentation (section System-specific Predefined Macros [1])
desribes how this should be handled. The correct (TM) way to
Dear Stephen,
In message 51a62f8d.9010...@wwwdotorg.org you wrote:
The Linux kernel chose to solve this by bundling the required dtc source
inside the kernel source tree as a tool. This seems by far the simplest
way to solve the problem for U-Boot too. If not, it's not exactly hard to:
Dear Stephen,
In message 51a634b5.5060...@wwwdotorg.org you wrote:
I think this is not a good way to address this issue. The GCC
documentation (section System-specific Predefined Macros [1])
desribes how this should be handled. The correct (TM) way to fix
this is by adding -ansi or any
On 05/29/2013 03:31 PM, Wolfgang Denk wrote:
Dear Stephen,
In message 51a62f8d.9010...@wwwdotorg.org you wrote:
The Linux kernel chose to solve this by bundling the required dtc source
inside the kernel source tree as a tool. This seems by far the simplest
way to solve the problem for
Tested on OMAP4/5 only, but should work on older OMAPs and
derivatives as well.
- Rewritten i2c_read to operate correctly with all types of chips
(old function could not read consistent data from some I2C slaves).
- Optimised i2c_write.
- New i2c_probe, optionally selectable via
Dear Stephen Warren,
In message 51a67ec1.2000...@wwwdotorg.org you wrote:
To keep this process in check a bit, we could always pick a specific git
commit or release version of dtc that each U-Boot version (release) will
be allowed to assume. That will limit the number of times people need to
On 05/29/2013 03:33 PM, Wolfgang Denk wrote:
Dear Stephen,
In message 51a634b5.5060...@wwwdotorg.org you wrote:
I think this is not a good way to address this issue. The GCC
documentation (section System-specific Predefined Macros [1])
desribes how this should be handled. The correct
On 05/28/2013 09:11:17 PM, Zhang Ying-B40530 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, May 29, 2013 6:34 AM
To: Zhang Ying-B40530
Cc: Wood Scott-B07421; u-boot@lists.denx.de; aflem...@gmail.com; Xie
Xiaobo-R63061; Ilya Yanok
Subject: Re: [PATCH 5/6] spl: Make
On 05/29/2013 04:36 PM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 51a67ec1.2000...@wwwdotorg.org you wrote:
To keep this process in check a bit, we could always pick a specific git
commit or release version of dtc that each U-Boot version (release) will
be allowed to assume.
Hi, experts:
Could i use fopen/fwrite standard C lib functions in U-boot code?
Best wishes,
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hi,
On Wednesday 29 May 2013 06:42 PM, Tom Rini wrote:
On Wed, May 29, 2013 at 04:32:35PM +0530, Lokesh Vutla wrote:
This series update support for DRA7xx family Socs and the data for
DRA752 ES1.0 soc.
This is on top of my recent Misc cleanup series:
Hi,
On Tue, May 28, 2013 at 11:10 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
This patch set enables PREAMBLE Mode for EXYNOS SPI.
Changes in v2:
- Remove preamable_count variable which is not really needed
- Fix checkpatch warning (multiple assignments)
Changes
Hi,
On Wed, May 29, 2013 at 4:07 PM, Stephen Warren swar...@wwwdotorg.orgwrote:
On 05/29/2013 04:36 PM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 51a67ec1.2000...@wwwdotorg.org you wrote:
To keep this process in check a bit, we could always pick a specific git
commit or
On Tue, May 28, 2013 at 11:36 PM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Andy,
U seem to be busy. I you have no issues can I ask Minkyu Kang to take
them in u-boot-samsung tree. Please do reply.
It would be great to get this applied soon, thank you.
--
Regards,
On 05/29/2013 10:46 PM, Simon Glass wrote:
Hi,
On Wed, May 29, 2013 at 4:07 PM, Stephen Warren swar...@wwwdotorg.org
mailto:swar...@wwwdotorg.org wrote:
On 05/29/2013 04:36 PM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 51a67ec1.2000...@wwwdotorg.org
This patch set exports the function timer_get_us and adds a delay for
devices that need some time to react after spi transation
finishes
This patch set is based on
EXYNOS: SPI: Support SPI_PREAMBLE mode
link: http://comments.gmane.org/gmane.comp.boot-loaders.u-boot/162269;
Changes in V2:
This function, if implemented by the board, provides a microsecond
timer. The granularity may be larger than 1us if hardware does not
support this.
Signed-off-by: Simon Glass s...@chromium.org
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Removed #ifdefine
For devices that need some time to react after a spi transaction
finishes, add the ability to set a delay.
Implement this as a delay on the first/next transaction to avoid
any delay in the fairly common case where a SPI transaction is
followed by other processing.
Based on:
[U-Boot] [PATCH 0/2
Accessing SPI registers is slow, but access to the FIFO level register
in particular seems to be extraordinarily expensive (I measure up to
600ns). Perhaps it is required to synchronise with the SPI byte output
logic which might run at 1/8th of the 40MHz SPI speed (just a guess).
Reduce access to
Hi Stephen,
On Wed, May 29, 2013 at 10:11 PM, Stephen Warren swar...@wwwdotorg.orgwrote:
On 05/29/2013 10:46 PM, Simon Glass wrote:
Hi,
On Wed, May 29, 2013 at 4:07 PM, Stephen Warren swar...@wwwdotorg.org
mailto:swar...@wwwdotorg.org wrote:
On 05/29/2013 04:36 PM, Wolfgang Denk
Since SPI register access is so expensive, it is worth transferring data
a word at a time if we can. This complicates the driver unfortunately.
Use the byte-swapping feature to avoid having to convert to/from big
endian in software.
This change increases speed from about 2MB/s to about 4.5MB/s.
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