On 7/1/2013 11:02 AM, Axel Lin wrote:
The questions raised here are valid and it forced me to re-read the
datasheet. For your convenience, I must tell you that the device is actually
pl061 from ARM, so the driver can also be named so.
The datasheet is here
On Thu, 27 Jun 2013 21:36:09 + (UTC), Tormod Volden wrote:
Hi Tormod,
Lukasz Majewski writes:
This commit fixes problems with some non-standard requests send with
device address instead of interface address
(bmRequestType.Receipent field).
This happens with dfu-util (debian
Fill the right command type when using CMD12 to stop data transfer.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
CC: Fleming Andrew-AFLEMING aflem...@freescale.com
CC: Scott Wood scottw...@freescale.com
---
drivers/mmc/fsl_esdhc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Hi Graeme,
On Mon, 1 Jul 2013 13:54:45 +1000, Graeme Russ graeme.r...@gmail.com
wrote:
Hi Guys,
Due to personal circumstances I left the U-Boot community back in late
October 2012.
Now I find my circumstances have been completely flipped upside down (long
story) and I will soon have
EXYNOS4 user manual equation for calculating PLL output is
FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 11 +--
1 files changed, 9 insertions(+), 2 deletions(-)
diff
From: Mingkai Hu mingkai...@freescale.com
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes C293PCIE board, C293PCIE board and C291PCIE board.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
From: Mingkai Hu mingkai...@freescale.com
The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC types(C291, C292, C293) with the following features:
- 512K L2 Cache/SRAM and 512 KB platform SRAM
-
On 01/07/13 16:42, Rajeshwari Shinde wrote:
EXYNOS4 user manual equation for calculating PLL output is
FOUT= MDIV x FIN/(PDIV x 2^(SDIV -1))
hence updating accordingly.
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 11 +--
1
Hi Minkyu Kang,
As per the user manual I have for EXYNOS5 it is
FOUT = MDIV * FIN / (PDIV * 2^SDIV)
Regards,
Rajeshwari Shinde.
On Mon, Jul 1, 2013 at 1:56 PM, Minkyu Kang mk7.k...@samsung.com wrote:
On 01/07/13 16:42, Rajeshwari Shinde wrote:
EXYNOS4 user manual equation for calculating PLL
I haven't subscribe the mail list and I didn't find the patch
creates a separate autoconf.mk. Can you tell me where I can
find it? Thanks.
-Original Message-
From: Wood Scott-B07421
Sent: Saturday, June 29, 2013 3:40 AM
To: Zhang Ying-B40530
Cc: Wood Scott-B07421; u-boot@lists.denx.de;
On 06/28/2013 09:49 PM, Scott Wood wrote:
On 06/28/2013 04:05:43 AM, Prabhakar Kushwaha wrote:
On 06/27/2013 12:36 AM, Scott Wood wrote:
On 06/25/2013 11:09:04 PM, Prabhakar Kushwaha wrote:
then it should be like this. slightly complex.
#if defined(CONFIG_SYS_PPC_E500_DEBUG_TLB)
Hi All,
Board Configuration:
TargetArch CPU
BoardName
qemu_mipsmipsmips32 qemu-mips
-
-
Options
qemu-mips
While bitbake u-boot:
Log data follows:
| DEBUG: Executing shell function do_compile
| NOTE: make -j 4
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Le 01/07/2013 00:53, Simon Guinot a écrit :
On Sun, Jun 30, 2013 at 12:12:29PM +0200, Frédéric Leroy wrote:
CloudBox device is device tree compliant, but older LaCie kernel uses
machine ID method to boot.
Signed-off-by: Frédéric Leroy
Dear y...@tx30smr01.am.freescale.net,
In message 1372661036-11828-1-git-send-email-y you wrote:
From: Mingkai Hu mingkai...@freescale.com
The Freescale C29x family is a high performance crypto co-processor.
It combines a single e500v2 core with necessary SEC engine. There're
three SoC
Hi, experts:
I tried to turn off gcc optimazition by changing config.mk file:
OPTFLAGS= -O0 #-fomit-frame-pointer
But failed to compile u-boot, it tipped:
..
/home/lion/Origen0921/arm-2010.09/bin/arm-none-eabi-ld:
arch/arm/cpu/armv7/libarmv7.o: relocation R_ARM_MOVW_ABS_NC against `a
local
Dear y...@tx30smr01.am.freescale.net,
In message 1372661036-11828-2-git-send-email-y you wrote:
From: Mingkai Hu mingkai...@freescale.com
C29XPCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module. It
includes
Dear krishna dwivedi,
please don't top post / full quote!!
In message CAKAK--mJC=5_J1awu4=m1evpjpkmmib0yvnmvqjnca5wznv...@mail.gmail.com
you wrote:
Can you please reply on this.
I can reply, but I cannot help you.
I am using xlp832 mips64 netlogic board.I referred these steps from
Convert the assembly code in board/samsung to c and move the same to arch/arm.
lds file made common across SMDKV310, Origen and SMDK5250.
Add the power reset and exit wakeup api for exynos.
Initialise GPIO for uart in Origen and SMDKV310 using pinmux.
Changes in V2:
- Rebased on latest
This patch adds APIs to get power reset status and exit the wakeup condition for
both exynos5 and exynos4
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
---
Changes in V2:
- Expanded the comments for get_reset_status function declaration.
arch/arm/cpu/armv7/exynos/power.c
smdk5250-uboot-spl.lds is moved to common folder, so that it can be reused.
It is renamed to exynos-uboot-spl.lds
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Changes in V2:
- None.
This patch configures the gpio values for UART
on Origen and SMDKV310 using pinmux
Signed-off-by: Rajeshwari Shinde rajeshwar...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Chnages in V2:
- None
arch/arm/cpu/armv7/exynos/pinmux.c | 40 +++
On Mon, Jul 01, 2013 at 11:30:01AM +0200, Frédéric Leroy wrote:
Le 01/07/2013 00:53, Simon Guinot a écrit :
On Sun, Jun 30, 2013 at 12:12:29PM +0200, Frédéric Leroy wrote:
CloudBox device is device tree compliant, but older LaCie kernel uses
machine ID method to boot.
Dear krishna dwivedi,
In message CAKAK--n326NQLOxERi47i63qeruOAcLr=ifHeoY9Ca=x3c0...@mail.gmail.com
you wrote:
Board Configuration:
TargetArch CPU
BoardName
qemu_mipsmipsmips32 qemu-mips
This builds fine for me:
+
Dear tiger...@viatech.com.cn,
In message fe7aded5c2218b4786c09cd97dc4c49f940...@exchbj02.viatech.com.bj you
wrote:
I tried to turn off gcc optimazition by changing config.mk file:
OPTFLAGS= -O0 #-fomit-frame-pointer
But failed to compile u-boot, it tipped:
Don't do it, then.
Q: why would
Hi, Denk:
During debug u-boot with JTAG tools, maybe turning off optimizations was
recommended.
Best wishes,
-邮件原件-
发件人: Wolfgang Denk [mailto:w...@denx.de]
发送时间: 2013年7月1日 18:03
收件人: Tiger Liu
抄送: u-boot@lists.denx.de
主题: Re: [U-Boot] compiled failed when turned off gcc optimazition
Hi Wolfgang,
I knew i have to run make qemu_mips_config before make allI am using ELDK
5.3 toolchain and compiling u-boot recipe came as a part of ELDK..But in
yocto environment,we use bitbake instead of make.I already tried make:
[unknown@h229 build]$ make qemu_mips_config
make: *** No rule to
Hi Minkyu Kang,
Can we please get this merged soon after your review as it is effort
to rebase and test this each time.
On Mon, Jul 1, 2013 at 3:32 PM, Rajeshwari Shinde
rajeshwar...@samsung.com wrote:
Convert the assembly code in board/samsung to c and move the same to arch/arm.
lds file made
Hi Simon,
On 28 June 2013 21:20, Simon Glass s...@chromium.org wrote:
Hi Inderpal,
On Thu, Jun 20, 2013 at 12:10 AM, Inderpal Singh
inderpal.si...@linaro.org wrote:
Hi Simon,
Thanks for review.
On 11 June 2013 19:57, Simon Glass s...@chromium.org wrote:
Hi,
On Fri, Jun 7, 2013
Hi!
--- /dev/null
+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
@@ -0,0 +1,213 @@
+
+#include pinmux_config.h
+
+/* pin mux configuration data */
+unsigned long sys_mgr_init_table[CONFIG_HPS_PINMUX_NUM] = {
+ 0, /* EMACIO0 - Unused */
+ 2, /*
On Fri 2013-06-28 16:20:48, Chin Liang See wrote:
socfpga: Adding System Manager driver which will
configure the pin mux for real hardware Cyclone V
development kit (not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Configure
Hi Wolfgang,
Can you please let me know on which mips board you have compiled this
u-boot now.
Regards,
Krishna
On Mon, Jul 1, 2013 at 3:28 PM, Wolfgang Denk w...@denx.de wrote:
Dear krishna dwivedi,
please don't top post / full quote!!
In message CAKAK--mJC=5_J1awu4=
Hi!
@@ -21,6 +21,7 @@
void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
struct socfpga_reset_manager {
u32padding1;
u32ctrl;
@@ -31,7 +32,23 @@ struct socfpga_reset_manager {
Acked-by: Sonic Zhangsonic.zh...@analog.com
On Mon, Jul 1, 2013 at 1:16 PM, Axel Lin axel@ingics.com wrote:
Current code uses gd-baudrate before setting its value.
Besides, I got below build warning which is introduced by
commit ddb5c5be blackfin: add baudrate to bdinfo.
board.c:235:3:
Dear Dan Murphy,
Adapt the usb-compat.h to uBoot.
Use #ifndef __UBOOT__ for code that is not applicable to uBoot.
Use #ifdef __UBOOT__ to add code that is uBoot specific.
Create linux-compat.h - Linux kernel compatibility definitions that do not
exist in the uBoot. Moved the
Dear Dan Murphy,
This patch series has been generated in an effort to get comments on
the implementation of the dwc code within the uBoot.
V2 incorporates comments to first port the kernel header backward to uBoot
and then produce the uBoot changes so the uBoot changes are easily
Hi Amit,
Sure.But i am trying to compile U-boot for default board qemu-mips without
any changes that is supported in boards.cfg.
Regards,
Krishna
On Mon, Jul 1, 2013 at 4:24 PM, Amit Virdi amit.vi...@st.com wrote:
Krishna,
On 7/1/2013 4:15 PM, krishna dwivedi wrote:
Hi Wolfgang,
Krishna,
On 7/1/2013 4:15 PM, krishna dwivedi wrote:
Hi Wolfgang,
Can you please let me know on which mips board you have compiled this
u-boot now.
Please understand that the u-boot community supports only those
platforms whose support has been mainlined. If you are making changes to
the
Dear tiger...@viatech.com.cn,
please do not top post / full quote.
In message fe7aded5c2218b4786c09cd97dc4c49f940...@exchbj02.viatech.com.bj you
wrote:
During debug u-boot with JTAG tools, maybe turning off optimizations was
recommended.
Many people recommend many things. Even strange or
Dear krishna dwivedi,
please stop top posting / full quoting.
In message CAKAK--=kZV0EebqGGmxEkHX5=agan2ilvqknsojcnchp3qk...@mail.gmail.com
you wrote:
I knew i have to run make qemu_mips_config before make allI am using ELDK
5.3 toolchain and compiling u-boot recipe came as a part of
The LaCie CloudBox device is a Kirkwood based nas :
- SoC: Marvell 88F6702 1000Mhz
- SDRAM memory: 256MB DDR2 400Mhz
- Gigabit ethernet: PHY Marvell 88E1318
- Flash memory: SPI NOR 512KB (Macronix MX25L4005A)
- 1 push button
- 1 reset switch
- 1 SATA port
- 1 LED (bi-color, blue and red)
The CloudBox device have a different ethernet phy setup than other ns2
devices.
Prepare source to use different init registers
Signed-off-by: Frédéric Leroy fr...@starox.org
---
board/LaCie/common/common.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git
Signed-off-by: Frédéric Leroy fr...@starox.org
---
include/configs/lacie_kw.h | 26 +-
1 file changed, 13 insertions(+), 13 deletions(-)
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index e2b3b21..cac616a 100644
--- a/include/configs/lacie_kw.h
+++
This series adds support for the LaCie Cloudbox v2 device.
Changes in v3:
- prepare other LaCie boards for led patch
- fix Machine ID
- use one commit for adding device
Changes in v2:
- sort unsorted #ifdef list in lacie_kw.h
- add entry to MAINTAINERS
- remove unused GPIO definitions
- remove
With the do_bootm_states re-organization, we have the call to any
potential sub-commands in a single spot. If one fails, we can then stop
right there and return to the caller. Prior to these calls we have
already ensured that ret is zero so we will not be returning this error
for some other
Dear Shrimanth,
Reminder Mail
Please reply ASAP.
I believe the remarks above won't help you, neither will top-posting.
The problem looks to be either DRAM setup being incorrect or kernel problem.
-- Forwarded Message
From: Shrimanth shrima...@signal-networks.com
To:
On Fri, Jun 28, 2013 at 06:56:46PM -0300, Fabio Estevam wrote:
On Fri, Jun 28, 2013 at 6:52 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
This changes were being done in every version of U-Boot and it
makes sense to try to merge them upstream.
Please review them and ack/nack them.
On Mon, Jul 1, 2013 at 10:20 AM, Tom Rini tr...@ti.com wrote:
On Fri, Jun 28, 2013 at 06:56:46PM -0300, Fabio Estevam wrote:
On Fri, Jun 28, 2013 at 6:52 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
This changes were being done in every version of U-Boot and it
makes sense to try to
On Mon, Jul 01, 2013 at 10:25:46AM -0300, Otavio Salvador wrote:
On Mon, Jul 1, 2013 at 10:20 AM, Tom Rini tr...@ti.com wrote:
On Fri, Jun 28, 2013 at 06:56:46PM -0300, Fabio Estevam wrote:
On Fri, Jun 28, 2013 at 6:52 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
This changes
On Mon, Jul 1, 2013 at 10:30 AM, Tom Rini tr...@ti.com wrote:
On Mon, Jul 01, 2013 at 10:25:46AM -0300, Otavio Salvador wrote:
On Mon, Jul 1, 2013 at 10:20 AM, Tom Rini tr...@ti.com wrote:
On Fri, Jun 28, 2013 at 06:56:46PM -0300, Fabio Estevam wrote:
On Fri, Jun 28, 2013 at 6:52 PM,
Hi Wolfgang,
Thanks for yours valuable time and support.U-boot got compiled for
qemu-mips board.
Regards,
Krishna
On Mon, Jul 1, 2013 at 5:19 PM, Wolfgang Denk w...@denx.de wrote:
Dear krishna dwivedi,
please stop top posting / full quoting.
In message CAKAK--=kZV0EebqGGmxEkHX5=
Hi Pavel,
On Mon, 2013-07-01 at 12:39 +0200, ZY - pavel wrote:
Hi!
--- /dev/null
+++ b/board/altera/socfpga_cyclone5/pinmux_config.c
@@ -0,0 +1,213 @@
+
+#include pinmux_config.h
+
+/* pin mux configuration data */
+unsigned long
Hi Pavel,
On Mon, 2013-07-01 at 12:42 +0200, ZY - pavel wrote:
On Fri 2013-06-28 16:20:48, Chin Liang See wrote:
socfpga: Adding System Manager driver which will
configure the pin mux for real hardware Cyclone V
development kit (not Virtual Platform)
Signed-off-by: Chin Liang See
Hi Wolfgang,
On Sat, 2013-06-29 at 00:47 +0200, ZY - wd wrote:
Dear Chin Liang See,
In message 1372451028.11240.2.ca...@drezykow-virtualbox.altera.com you
wrote:
socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Please keep the
Hi Pavel,
On Mon, 2013-07-01 at 12:46 +0200, ZY - pavel wrote:
Hi!
@@ -21,6 +21,7 @@
void reset_cpu(ulong addr);
void reset_deassert_peripherals_handoff(void);
+#if defined(CONFIG_SOCFPGA_VIRTUAL_TARGET)
struct socfpga_reset_manager {
u32padding1;
Hi Marek,
On Sun, Jun 30, 2013 at 10:08 PM, Marek Vasut ma...@denx.de wrote:
Dear Stephen Warren,
(Sorry to those on to/cc; I'm resending this so it goes to the correct
mailing list)
Dear Stephen,
sorry for the delay in responding to this.
Commit 020bbcb usb: hub: Power-cycle on root-hub
socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
---
include/configs/socfpga_cyclone5.h | 28 +---
1 file changed, 21 insertions(+), 7 deletions(-)
diff --git
socfpga: Consolidating reset code into reset_manager.c.
Also separating reset configuration for virtual target
and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
---
arch/arm/cpu/armv7/socfpga/Makefile |2 +-
socfpga: Adding System Manager driver which
will configure the pin mux for real hardware Cyclone V
development kit (not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
---
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
socfpga: Adding the generated pin mux
configuration by Preloader Generator tool
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
---
board/altera/socfpga_cyclone5/pinmux_config.c | 214
+
board/altera/socfpga_cyclone5/pinmux_config.h
On 06/13/2013 05:13 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Some ARM compilers may emit code that makes unaligned accesses when
faced with constructs such as:
const char format[] = r5g6b5;
Make this data static since it doesn't chagne; the compiler will simply
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/01/2013 12:30 PM, Stephen Warren wrote:
On 06/13/2013 05:13 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Some ARM compilers may emit code that makes unaligned accesses
when faced with constructs such as:
const char
On 07/01/2013 07:49 AM, Vivek Gautam wrote:
Hi Marek,
On Sun, Jun 30, 2013 at 10:08 PM, Marek Vasut ma...@denx.de wrote:
Dear Stephen Warren,
(Sorry to those on to/cc; I'm resending this so it goes to the correct
mailing list)
Dear Stephen,
sorry for the delay in responding to this.
Hi Axel,
Thanks for your v2.
On Sun, Jun 30, 2013 at 9:02 AM, Axel Lin axel@ingics.com wrote:
Use ARRAY_SIZE instead of having similar implementation in each drivers.
Signed-off-by: Axel Lin axel@ingics.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Ben Warren
On 07/01/2013 03:48:16 AM, Zhang Ying-B40530 wrote:
I haven't subscribe the mail list and I didn't find the patch
creates a separate autoconf.mk. Can you tell me where I can
find it? Thanks.
Search in http://patchwork.ozlabs.org/project/uboot/list/
-Scott
On Mon, Jul 1, 2013 at 10:26 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
Hi Axel,
Thanks for your v2.
On Sun, Jun 30, 2013 at 9:02 AM, Axel Lin axel@ingics.com wrote:
Use ARRAY_SIZE instead of having similar implementation in each drivers.
Signed-off-by: Axel Lin axel@ingics.com
On 07/01/2013 03:56:23 AM, Prabhakar Kushwaha wrote:
On 06/28/2013 09:49 PM, Scott Wood wrote:
On 06/28/2013 04:05:43 AM, Prabhakar Kushwaha wrote:
On 06/27/2013 12:36 AM, Scott Wood wrote:
On 06/25/2013 11:09:04 PM, Prabhakar Kushwaha wrote:
then it should be like this. slightly complex.
On Fri, 24 May 2013 09:43:46 +0200
Piotr Wilczek p.wilc...@samsung.com wrote:
This patch change 'data_to_send' array to static to avoid
unaligned access exeption on some platforms (ex Trats2).
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park
On 07/01/2013 04:37 AM, Wolfgang Denk wrote:
Dear tiger...@viatech.com.cn,
please do not top post / full quote.
In message fe7aded5c2218b4786c09cd97dc4c49f940...@exchbj02.viatech.com.bj
you wrote:
During debug u-boot with JTAG tools, maybe turning off optimizations was
recommended.
On Mon, 1 Jul 2013 12:35:46 -0400
Tom Rini tr...@ti.com wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/01/2013 12:30 PM, Stephen Warren wrote:
On 06/13/2013 05:13 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
Some ARM compilers may emit code that
On Mon, Jul 01, 2013 at 02:57:43PM +0200, Frédéric Leroy wrote:
This series adds support for the LaCie Cloudbox v2 device.
Changes in v3:
- prepare other LaCie boards for led patch
- fix Machine ID
- use one commit for adding device
Changes in v2:
- sort unsorted #ifdef list in
On Thu, 13 Jun 2013 17:13:11 -0600
Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
Some ARM compilers may emit code that makes unaligned accesses when
faced with constructs such as:
const char format[] = r5g6b5;
Make this data static since it doesn't
From: Dinh Nguyen dingu...@altera.com
Because the SOCFPGA platform will include support for Cyclone V and
Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to
be more generic.
Signed-off-by: Dinh Nguyen dingu...@altera.com
Cc: Chin Liang See cl...@altera.com
Cc: Wolfgang Denk
Hello Andreas,
On 06/30/2013 01:15 PM, Andreas Bießmann wrote:
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a simple
define for them.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
+#ifndef REG_NOERROR
+/* BSD regex.h do not expose REG_NOERROR */
+#
On Wed, 05 Jun 2013 08:14:30 +0200
Piotr Wilczek p.wilc...@samsung.com wrote:
When compressed image is loaded, it must be decompressed
to an aligned address + 2 to avoid unaligned access exception
on some ARM platforms.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by:
Hi Andreas,
Interfaces exposed by error.h seems not to be used in rsa-sig.c, remove it.
This also fixes an compile error on OS X:
---8---
u-boot/lib/rsa/rsa-sign.c:23:19: error: error.h: No such file or directory
---8---
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a simple
define for them.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
Tested-by: Lubomir Popov lpo...@mm-sol.com
___
U-Boot mailing list
U-Boot@lists.denx.de
Some OS (like OS X) do not provide a generic readelf. We should enforce to use
the toochain provided readelf instead, to do so use $(CROSS_COMPILE)readelf.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
Tested-by: Lubomir Popov lpo...@mm-sol.com
On Fri, Jun 28, 2013 at 11:46:37AM -0500, Scott Wood wrote:
The following changes since commit 2f998071254d566c71c34ef013aef1d9d0ec0fa3:
image: Use ENOENT instead of ENOMEDIUM for better compatibility (2013-06-17
09:56:42 -0400)
are available in the git repository at:
When parsing a path with a leading slash, the root inode was freed which
lead
to a crash. Path parsing is now improved and allows leading slashs like
other
filesystem commands (e.g. ext4load).
Signed-off-by: Stefan Agner ste...@agner.ch
---
fs/btrfs/btrfs.c | 6 +++---
1 file changed, 3
Reading the super block leads to data abort crashes. Enabling the no
unaligned
option works around this. Since the format of the super block is fixed
by
the on-disk format unaligned access might by necessary in order to have
btrfs
support at all.
Signed-off-by: Stefan Agner ste...@agner.ch
The function btrfs_mangle_name limited path lenght to 20 characters.
Since
the command parsing already checks spaces, the function is not needed at
all.
---
fs/btrfs/btrfs.c | 44 +---
1 file changed, 1 insertion(+), 43 deletions(-)
diff --git
Hi,
My goal was booting from an ArchLinux btrfs filesystem on a BeagleBone
Black
(am335x_evm). Therefor I patched U-Boot 2013.07-rc1 with the patches
sent in
May by Adnan Ali (btrfs v12). After some tweaks and help from the IRC
channel
I could successfully load the Kernel and the Device Tree
Dear krishna dwivedi,
In message cakak--np_6bvq5grcbmvtswwhpdwed4pb4mquofmm_xjjgj...@mail.gmail.com
you wrote:
Thanks for yours valuable time and support.U-boot got compiled for
qemu-mips board.
You really should read up on Netiquette, like [1] in general, and
especially [2]
[1]
Dear Mike Dunn,
In message 51d1c455.9010...@newsguy.com you wrote:
But there's a good motivation for wanting to turn off optimization.
I disagree here. If you are hunting down a problem, you want to be as
close at the original code as possible. Disabling optimization is
such a dramatic
Hello Robert,
On Wed, 26 Jun 2013 16:00:20 -0700
Robert Winkler robert.wink...@boundarydevices.com wrote:
Hello all,
I haven't heard from anyone but Igor. Does that mean it looks good?
Sorry for delay, I've applied this series now. Thanks!
Anatolij
Hello Andreas,
On 07/01/2013 08:45 PM, Jeroen Hofstee wrote:
Hello Andreas,
On 06/30/2013 01:15 PM, Andreas Bießmann wrote:
BSD (like OS X) variants of regex.h do not declare REG_NOERROR, add a
simple
define for them.
Signed-off-by: Andreas Bießmann andreas.de...@googlemail.com
---
On Fri, Jun 28, 2013 at 5:12 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I've tagged and pushed v2013.07-rc2. A bit more over the place than I
should have gone, but picked up a lot of things that have been
outstanding for a while. The big thing is a refactor of the boot loop.
Everything
socfpga: Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
---
Changes for v2:
- Fixed the word wrap issue within patch
Changes for v3:
- Fixed the long subject of the patch
Changes for v4:
-
Hello Otavio,
Sorry for delay.
On Thu, 6 Jun 2013 14:57:23 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
...
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ s = getenv(splashpos);
+ if (s != NULL) {
+ if (s[0] == 'm')
+ x = BMP_ALIGN_CENTER;
+
Code for checking splashpos environment variable is
duplicated in drivers, move it to the common function.
Call this function also in the bmp display command to
consider splashpos settings.
Signed-off-by: Anatolij Gustschin ag...@denx.de
---
common/cmd_bmp.c|3 +++
common/lcd.c
Hello Tom,
The following changes since commit e6bf18dba2a21bebf2c421b1c2e188225f6485a1:
Prepare v2013.07-rc2 (2013-06-28 18:03:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-video.git master
for you to fetch changes up to
-Original Message-
From: Frédéric Leroy [mailto:fr...@starox.org]
Sent: 01 July 2013 18:28
To: u-boot@lists.denx.de
Cc: Wolfgang Denk; Prafulla Wadaskar; Albert ARIBAUD;
Simon Guinot
Subject: [PATCH v3 0/3] arm: add support for LaCie
CloudBox
This series adds support for the
On Mon, Jul 1, 2013 at 7:04 PM, Anatolij Gustschin ag...@denx.de wrote:
Code for checking splashpos environment variable is
duplicated in drivers, move it to the common function.
Call this function also in the bmp display command to
consider splashpos settings.
Signed-off-by: Anatolij
On Mon, Jul 1, 2013 at 7:01 PM, Anatolij Gustschin ag...@denx.de wrote:
Hello Otavio,
Sorry for delay.
On Thu, 6 Jun 2013 14:57:23 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
...
+#ifdef CONFIG_SPLASH_SCREEN_ALIGN
+ s = getenv(splashpos);
+ if (s != NULL) {
+
Consolidating reset code into reset_manager.c.
Also separating reset configuration for virtual target
and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
---
Adding the generated pin mux
configuration by Preloader Generator tool
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
---
Changes for v2:
- Fixed the word
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen
On Mon, Jul 1, 2013 at 7:13 PM, Anatolij Gustschin ag...@denx.de wrote:
Hello Tom,
The following changes since commit e6bf18dba2a21bebf2c421b1c2e188225f6485a1:
Prepare v2013.07-rc2 (2013-06-28 18:03:51 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-video.git
Hi, experts:
I found it would determine whether CPU was in HYP mode or not before
switching to SVC mode in reset handler.
So, why need to test HYP mode?
So, which case could cause CPU in HYP mode during U-Boot boot stage?
Best wishes,
___
U-Boot
Hi,
On Mon, Jul 1, 2013 at 7:28 PM, Inderpal Singh inderpal.si...@linaro.orgwrote:
Hi Simon,
On 28 June 2013 21:20, Simon Glass s...@chromium.org wrote:
Hi Inderpal,
On Thu, Jun 20, 2013 at 12:10 AM, Inderpal Singh
inderpal.si...@linaro.org wrote:
Hi Simon,
Thanks for review.
On
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