Hi Tom,
On 07/26/2013 09:34 PM, Tom Rini wrote:
Signed-off-by: Tom Rini tr...@ti.com
---
board/gdsys/common/dp501.c | 18 +-
board/gdsys/common/fpga.c | 18 +-
board/gdsys/common/mclink.c | 18 +-
board/gdsys/common/mclink.h | 18
Hello,
We have made a small build called fpga_loader using 'standalone' approach
provided by u-boot, it works well
after running 'go' command.
Please first refer this
http://u-boot.10912.n7.nabble.com/U-Boot-How-to-get-GPL-free-standalone-programs-with-u-boot-td42180.html
We need to leave
(although this patch is more than two *years* old, it never got properly
answered to. I am doing so here to make sure future readers know why it
was not applied and won't be.)
Hi Michael,
On Thu, 17 Mar 2011 15:46:55 -0400, Michael Spang
msp...@csclub.uwaterloo.ca wrote:
If U-Boot is loaded
Hi Sascha,
On Mon, 15 Jul 2013 08:19:57 -0400, Tom Rini tr...@ti.com wrote:
On Mon, Jul 15, 2013 at 11:23:54AM +0200, Sascha Silbe wrote:
Albert ARIBAUD albert.u.b...@aribaud.net writes:
The situation has gotten better recently and U-Boot fits into the
previous partition size of
Dear Andy Green,
In message CAAfg0W4wXdRafRcHvrNVNnkCGd3EvJfNujuzUsjQXgW=wmc...@mail.gmail.com
you wrote:
Given that code should perferably never be used, maybe it should print
a warning like Using default memory ops and leave it like it is.
The problem is not correctness just inefficiency.
On 28/07/2013 22:16, Philippe Reynes wrote:
Add some missing constant (chip select, ...)
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
arch/arm/cpu/arm926ejs/mx27/asm-offsets.c |5 +
On 26.07.2013 15:42, Andy Green wrote:
On 26 July 2013 20:58, Wolfgang Denk w...@denx.de wrote:
...
you not make sure that you provide optimized implementations for such
functions and consequently #define __HAVE_ARCH_MEMMOVE (and
__HAVE_ARCH_MEMCPY) ?
Yes I found these afterwards...
Looping Will...
On 29 July 2013 16:28, Dirk Behme dirk.be...@de.bosch.com wrote:
On 26.07.2013 15:42, Andy Green wrote:
On 26 July 2013 20:58, Wolfgang Denk w...@denx.de wrote:
...
you not make sure that you provide optimized implementations for such
functions and consequently #define
Hi Axel,
On Sat, 15 Jun 2013 17:10:38 +0800, Axel Lin axel@ingics.com
wrote:
The implementation of gpio_is_valid() has inversed logic, fix it.
Signed-off-by: Axel Lin axel@ingics.com
---
Hi,
I don't have this hardware to test, but current code looks obviously wrong.
I'd
On 27/07/2013 02:53, Eric Nelson wrote:
The frame-buffer on i.MX boards needs to be aligned for DMA.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
Applied to u-boot-imx, thanks.
Best regards,
Stefano Babic
--
On 29 July 2013 09:44, Andy Green andy.gr...@linaro.org wrote:
Looping Will...
On 29 July 2013 16:28, Dirk Behme dirk.be...@de.bosch.com wrote:
On 26.07.2013 15:42, Andy Green wrote:
On 26 July 2013 20:58, Wolfgang Denk w...@denx.de wrote:
...
you not make sure that you provide optimized
This series contains two usb related bug fixes, one regarding the power cycling
of hub ports, and the other- a memory leak in ehci-hcd.
Cc: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Nikita Kiryanov (2):
usb_hub: fix power cycling logic
ehci-hcd: fix memory leak in
When power cycling the hub ports, a misbehaving port will prevent all ports
from being powered on because we quit at the first sign of trouble.
Skip problematic ports instead of failing the entire power on.
Cc: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Signed-off-by:
usb_lowlevel_init() allocates a new periodic_list each time it is invoked,
without freeing the original list. Since it is initialized later on in the code,
just reuse the first-allocated list in future invocations of usb_lowlevel_init.
Cc: Marek Vasut ma...@denx.de
Cc: Igor Grinberg
Hi all,
I have the following queries.
1) Can anyone suggest me the exact version of u-boot in which falcon mode
is implemented?
I also wanted to know, if is there any readme available for that
implementation.
Please also tell me, where exactly in the u-boot code it is implemented.
2) The
Hi Rajdeep,
On 29/07/2013 14:04, Rajdeep Vaghasia wrote:
Hi all,
I have the following queries.
1) Can anyone suggest me the exact version of u-boot in which falcon mode
is implemented?
There is no exact version - falcon mode was merged more as one year ago.
Take simply 2013.07 or u-boot
On Mon, Jul 29, 2013 at 08:14:19AM +0200, Stefan Roese wrote:
Hi Tom,
On 07/26/2013 09:34 PM, Tom Rini wrote:
Signed-off-by: Tom Rini tr...@ti.com
---
board/gdsys/common/dp501.c | 18 +-
board/gdsys/common/fpga.c | 18 +-
On Mon, Jul 29, 2013 at 06:58:05AM +0200, Heiko Schocher wrote:
Add TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog support.
Signed-off-by: Heiko Schocher h...@denx.de
Reviewed-by: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
[snip]
+++
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 07/28/2013 11:40 AM, Wolfgang Denk wrote:
Hello all,
I need some help / recommendations how we should handle
non-trivial license issues. For example, please have a look at the
NE2000 network driver code:
drivers/net/ne2000.h
Hello Tom,
Am 29.07.2013 14:39, schrieb Tom Rini:
On Mon, Jul 29, 2013 at 06:58:05AM +0200, Heiko Schocher wrote:
Add TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog support.
Signed-off-by: Heiko Schocherh...@denx.de
Reviewed-by: Tom Rinitr...@ti.com
Cc: Albert
On Mon, Jul 29, 2013 at 03:06:00PM +0200, Heiko Schocher wrote:
Hello Tom,
Am 29.07.2013 14:39, schrieb Tom Rini:
On Mon, Jul 29, 2013 at 06:58:05AM +0200, Heiko Schocher wrote:
Add TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog support.
Signed-off-by: Heiko Schocherh...@denx.de
Hi Michael,
On Mon, 29 Jul 2013 08:57:53 -0400, Michael Spang
msp...@csclub.uwaterloo.ca wrote:
Albert,
That's not a correct characterization of the bug.
The incoherent cache lines are from before the relocation stage. If
U-Boot is relocating from RAM, and later copies the OS there
Albert,
That's not a correct characterization of the bug.
The incoherent cache lines are from before the relocation stage. If
U-Boot is relocating from RAM, and later copies the OS there without
invalidating those lines, then that's a bug in U-Boot.
Michael
On Mon, Jul 29, 2013 at 3:19 AM,
On Mon, Jul 29, 2013 at 10:09 AM, Albert ARIBAUD
albert.u.b...@aribaud.net wrote:
Hi Michael,
On Mon, 29 Jul 2013 08:57:53 -0400, Michael Spang
msp...@csclub.uwaterloo.ca wrote:
Albert,
That's not a correct characterization of the bug.
The incoherent cache lines are from before the
Hi List,
I am trying to add support of a Vitesse L2 switch in u-boot (in unmanaged
configuration).
I was analyzing whether advanced features like flow control, link-aggregation
etc are
required to be supported for a L2 switch working in a u-boot bootloader level.
My point-of-view is that the
This patch added support for accessing dual memories in
stacked connections with single chipselect line from controller.
this connection mode is implemented in xilinx zynq qspi controller.
For more info, see doc/README.spi-flash-conn-modes
Below are the changes for dual stacked to work:
- mtd
Dual parallel accessing can be done by updating flash part
attributes like page_size*2, sector_size*2
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spansion.c | 6 ++
drivers/mtd/spi/stmicro.c | 6 ++
2 files changed, 12 insertions(+)
diff --git
For upper memory, bank selection on dual stacked access
needs to subtract the calculated banks from the number of
banks available on a single memory.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spi_flash.c | 13 +
1 file changed, 13
This patch added support for accessing dual memories in
parallel connections with single chipselect line from controller.
this connection mode is implemented in xilinx zynq qspi controller.
For more info, see doc/README.spi-flash-conn-modes
Below are the changes for dual parallel to work:
- mtd
This patchset adds support for dual flash memory accessing with single
chipselect line from the controller.
dual flash memory support is implemented in xilinx zynq qspi controllers
in which dual stacked and dual parallel are the connection modes.
Currently added these connection modes support on
Dual stacked accessing can be done by updating flash part
attributes like sector_size*2
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spansion.c | 3 +++
drivers/mtd/spi/stmicro.c | 3 +++
2 files changed, 6 insertions(+)
diff --git
Hi Tom,
2013/7/23 Dan Murphy dmur...@ti.com:
On 07/19/2013 02:00 PM, Tom Rini wrote:
Add a am33xx_spl_board_init (and enable the PMICs) that we may see,
depending on the board we are running on. In all cases, we see if we
can rely on the efuse_sma register to tell us the maximum speed. In
On 05/04/2013 06:01 AM, Heiko Schocher wrote:
From: Simon Glass s...@chromium.org
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
Heiko, the latest U-Boot tree hangs during boot on Tegra, and git
bisect points at this patch. Olof
Hi Eric,
On Sun, Jul 28, 2013 at 1:22 PM, Eric Nelson
eric.nel...@boundarydevices.com wrote:
Hi Simon,
On 07/28/2013 11:09 AM, Simon Glass wrote:
Hi Eric,
On Sun, Jul 28, 2013 at 10:57 AM, Eric Nelson
eric.nelson@boundarydevices.**com eric.nel...@boundarydevices.com
Hi Sharma,
On Mon, 29 Jul 2013 15:33:39 +, Sharma Bhupesh-B45370
b45...@freescale.com wrote:
Hi List,
I am trying to add support of a Vitesse L2 switch in u-boot (in unmanaged
configuration).
I was analyzing whether advanced features like flow control, link-aggregation
etc are
- line over 80 characters
- add spaces
- add tabs
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/sst.c | 32
1 file changed, 20 insertions(+), 12 deletions(-)
diff --git a/drivers/mtd/spi/sst.c b/drivers/mtd/spi/sst.c
index
- line over 80 characters
- insert the expression in same line
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/eon.c | 3 +--
drivers/mtd/spi/ramtron.c | 6 --
drivers/mtd/spi/spansion.c | 3 ++-
3 files changed, 7 insertions(+), 5 deletions(-)
diff
- line over 80 characters
- add tabs
- CHECK: Alignment should match open parenthesis
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
common/cmd_sf.c | 27 ++-
common/env_sf.c | 2 +-
2 files changed, 15 insertions(+), 14 deletions(-)
diff --git
- line over 80 characters.
- CHECK: Alignment should match open parenthesis
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spi_flash.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/drivers/mtd/spi/spi_flash.c
- line over 80 characters
- foo * bar - foo *bar
- removed unnecessary for single statement blocks.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/stmicro.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/spi/stmicro.c
- CHECK: Alignment should match open parenthesis
- trailing whitespace
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/atmel.c| 10 +-
drivers/mtd/spi/gigadevice.c | 2 +-
drivers/mtd/spi/ramtron.c | 2 +-
drivers/mtd/spi/spansion.c
This patch set consist of code clean-up on sf.
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (6):
sf: eon|spansion|ramtron: Fix code cleanup
sf: sst: Fix code cleanup
sf: stmicro: Fix code cleanup
sf: Fix code cleanup
cmd_sf|env_sf: Fix code cleanup
sf: Fix code cleanups
Add support for Macronix MX25L51235F SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/macronix.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index ce2fb9c..d0e6d6c 100644
---
This patch adds bank addr access support for macronix flash's
so-that the macronix flashes which has 16Mbyte sizes can be
accessible in 3-byte addressing mode.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spi_flash.c | 1 +
Add support for Macronix MX25L25635F SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/macronix.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/drivers/mtd/spi/macronix.c b/drivers/mtd/spi/macronix.c
index 70435eb..ce2fb9c 100644
---
IDCODE0 are required to find the bank addr read/write commands,
as these commands are specific to manufacture id hence moved
manu id code macros to CONFIG_SPI_FLASH_BAR.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
drivers/mtd/spi/spi_flash_internal.h | 8
1 file
This patch set adds bank addr access support for macronix flash's
so-that the macronix flashes which has 16Mbyte sizes can be
accessible in 3-byte addressing mode.
REQUEST FOR MACRONIX FLASH VENDORS/USERS: PLEASE TEST THESE CHANGES
ON YOUR RESPECTIVE HW, FLASH PARTS FROM USER HW IS NOT AVAILABLE
Zynq spi controller driver supports 2 buses and
3 chipselects on each bus.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Acked-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
arch/arm/include/asm/arch-zynq/hardware.h |
Tested spi on zynq board with sst flash by enabling
CONFIG_ZYNQ_SPI.
sf probe 1:1 0 0
SF: Detected SST25WF080 with page size 4 KiB, total 1 MiB
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Acked-by: Siva Durga Prasad Paladugu siva...@xilinx.com
Signed-off-by: Michal Simek
Add support for SST25WF080 SPI flash.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Michal Simek michal.si...@xilinx.com
---
drivers/mtd/spi/sst.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/spi/sst.c b/drivers/mtd/spi/sst.c
index
This small series patchset will add suuport for zynq spi
controller, tested on sst flash.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (3):
spi: Add zynq spi controller driver
sf: sst: Add support for SST25WF080
zynq: Enable CONFIG_ZYNQ_SPI
arch/arm/include/asm/arch-zynq/hardware.h |
On Fri, Jul 26, 2013 at 9:20 PM, Dennis Gilmore
dgilm...@fedoraproject.org wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On Fri, 26 Jul 2013 10:52:04 -0300
Otavio Salvador ota...@ossystems.com.br wrote:
On Thu, Jul 25, 2013 at 6:13 PM, dgilm...@fedoraproject.org wrote:
From:
On 07/28/2013 07:31:00 AM, Wolfgang Denk wrote:
Dear Scott,
with commit ea533c2 cmd_nand: some infrastructure fixes and
refactoring (Mon Aug 02, 2010), you added the following license
header to common/cmd_nand.c :
+ * Copyright 2010 Freescale Semiconductor
+ * The portions of this file whose
Dear Tom,
In message 51f666a4.9060...@ti.com you wrote:
drivers/net/ne2000.h drivers/net/ne2000.c
drivers/net/ne2000_base.h drivers/net/ne2000_base.c
...
I grabbed (because of the omap watchdog patch) 2.4.17, and that's (a)
older than our ne2k driver and (b) Already a GPLv2 and not 'or
Dear Scott,
In message 1375127231.30721.54@snotra you wrote:
Looking at this commit, it is totally unclear to me which parts of the
newly added code you could be referring to with your which are not
considered a derived work of GPL v2-only code.
Your addition makes the legal situation
Dear Bhupesh,
In message
a1a6ea40f8503d48bb002b42bd65974e0a0c9...@039-sn2mpn1-012.039d.mgd.msft.net
you wrote:
I am trying to add support of a Vitesse L2 switch in u-boot (in unmanaged
configuration).
I was analyzing whether advanced features like flow control, link-aggregation
etc are
Separating the configuration file for Virtual
Target and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc:
Adding System Manager driver which will configure the
pin mux for real hardware Cyclone V development kit
(not Virtual Platform)
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen
Adding the generated pin mux
configuration by Preloader Generator tool
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek pa...@denx.de
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen dingu...@altera.com
Cc: Tom Rini tr...@ti.com
Cc: Albert
Consolidating reset code into reset_manager.c.
Also separating reset configuration for virtual target
and real hardware Cyclone V development kit
Signed-off-by: Chin Liang See cl...@altera.com
Reviewed-by: Pavel Machek
Cc: Wolfgang Denk w...@denx.de
CC: Pavel Machek pa...@denx.de
Cc: Dinh Nguyen
Dear Nikita Kiryanov,
This series contains two usb related bug fixes, one regarding the power
cycling of hub ports, and the other- a memory leak in ehci-hcd.
Cc: Marek Vasut ma...@denx.de
Cc: Igor Grinberg grinb...@compulab.co.il
Nikita Kiryanov (2):
usb_hub: fix power cycling logic
On 07/29/2013 03:08:23 PM, Wolfgang Denk wrote:
Dear Scott,
In message 1375127231.30721.54@snotra you wrote:
Looking at this commit, it is totally unclear to me which parts
of the
newly added code you could be referring to with your which are
not
considered a derived work of GPL
On Wed, Jul 10, 2013 at 01:54:16AM +0200, Andre Przywara wrote:
[...]
diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c
index 1b6e0ac..7b0619e 100644
--- a/arch/arm/lib/bootm.c
+++ b/arch/arm/lib/bootm.c
@@ -34,6 +34,10 @@
#include asm/bootm.h
#include linux/compiler.h
On Wed, Jul 10, 2013 at 01:54:18AM +0200, Andre Przywara wrote:
For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.
While doing the non-secure switch, we have to enable
On Wed, Jul 10, 2013 at 01:54:17AM +0200, Andre Przywara wrote:
Currently the non-secure switch is only done for the boot processor.
To enable full SMP support, we have to switch all secondary cores
into non-secure state also.
So we add an entry point for secondary CPUs coming out of
n Wed, Jul 10, 2013 at 01:54:14AM +0200, Andre Przywara wrote:
A prerequisite for using virtualization is to be in HYP mode, which
requires the CPU to be in non-secure state first.
Add new file in arch/arm/cpu/armv7 to hold a monitor handler routine
which switches the CPU to non-secure state
On 07/28/2013 03:16:56 PM, Philippe Reynes wrote:
Signed-off-by: Philippe Reynes trem...@yahoo.fr
Signed-off-by: Eric Jarrige eric.jarr...@armadeus.org
---
Makefile |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index 4218226..b971f30 100644
On 07/29/2013 12:51:45 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is an integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For example:
Issuing a command 0x10 to FTNANDC021 would
2013/7/30 Scott Wood scottw...@freescale.com:
On 07/29/2013 12:51:45 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTNANDC021 is an integrated NAND flash controller.
It use a build-in command table to abstract the underlying
NAND flash control logic.
For
Hey,
The following changes since commit 8b485ba12b0defa0c4ed3559789250238f8331a8:
Merge branch 'u-boot/master' into u-boot-arm/master (2013-07-25 17:57:46
+0200)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to
In U-boot source, some '#if' directives evaluate
undefined identifiers.
To find and fix them, this commit adds -Wundef to CFLAGS.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
config.mk | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/config.mk b/config.mk
Hi Albert,
Thanks for your reply.
-Original Message-
From: Albert ARIBAUD [mailto:albert.u.b...@aribaud.net]
Sent: Monday, July 29, 2013 10:27 PM
To: Sharma Bhupesh-B45370
Cc: 'u-boot@lists.denx.de'
Subject: Re: [U-Boot] Query: Ethernet switch support
Hi Sharma,
On Mon, 29
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
On 05/04/2013 06:01 AM, Heiko Schocher wrote:
From: Simon Glasss...@chromium.org
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and the Tegra
i2c driver to support this.
Heiko, the latest U-Boot tree hangs during
Hi Heiko,
On Mon, Jul 29, 2013 at 10:28 PM, Heiko Schocher h...@denx.de wrote:
Hello Stephen,
Am 29.07.2013 18:12, schrieb Stephen Warren:
On 05/04/2013 06:01 AM, Heiko Schocher wrote:
From: Simon Glasss...@chromium.org
This enables CONFIG_SYS_I2C on Tegra, updating existing boards and
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Tom Rini tr...@ti.com
---
- changes for v2:
none
doc/README.SPL | 2 +-
spl/Makefile | 1 +
2 Dateien geändert, 2 Zeilen hinzugefügt(+), 1 Zeile entfernt(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ac9a213..312a6a6 100644
---
Add TI OMAP 16xx 24xx/34xx 32KHz (non-secure) watchdog support.
Signed-off-by: Heiko Schocher h...@denx.de
Reviewed-by: Tom Rini tr...@ti.com
Cc: Albert Aribaud albert.u.b...@aribaud.net
---
- changes for v2:
- add Reviedwed-by from Tom Rini
- fixed subject
- add SPDX-License-Identifier
add support for the am335x based boards from siemens:
dxr2:
- DDR3 128MiB
- NAND 256MiB
- Ethernet with external Switch SMSC LAN9303
- no PMIC
- internal Watchdog
- DFU support
pxm2:
- DDR2 512 MiB
- NAND 1024 MiB
- PMIC
- PHY atheros ar803x
- USB Host
- internal Watchdog
Locking sequence for all the dplls is same.
In the current code same sequence is done repeatedly
for each dpll. Instead have a generic function
for locking dplls and pass dpll data to that function.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
This series tries to cleanup code for AM33xx,
inorder to ensure code reusabilty by moving the
duplicated code to common place.
This also helps in addition of new Soc with minimal
changes.
Testing:
Boot tested on BeagleBone White/Black, AM35xx EVM/EVMSK.
Verified ./MAKEALL -s am33xx.
Changes
There are many musb prints in SPL and U-Boot log.
These prints are required only during musb debug.
So replacing printk with pr_debug in musb_core.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
drivers/usb/musb-new/musb_core.c | 20
1 file changed, 8 insertions(+), 12
From: Heiko Schocher h...@denx.de
s_init has the same outline for all the AM33xx based
board. So making it generic.
This also helps in addition of new Soc with minimal changes.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
Signed-off-by: Heiko Schocher h...@denx.de
Signed-off-by: Tom Rini
Cleaning up the clocks layer.
This helps in addition of new Soc with minimal
changes.
This is derived from OMAP4 boards.
Signed-off-by: Lokesh Vutla lokeshvu...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |6 -
arch/arm/cpu/armv7/am33xx/clock.c | 62 +-
Hello Stefan
Is this patch still needed?
Yes, I think so.
Best Regards
Masahiro Yamada
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