On Thu, Aug 8, 2013 at 9:09 PM, Tom Rini tr...@ti.com wrote:
Hey all,
I want to announce a few custodian changes. Andy Fleming is stepping
down from both his PowerPC and MMC custodianships to go off and do
something non-technical and fun for a while. I want to thank him for
all his time
On 08-08-2013 19:03, Jagannadha Sutradharudu Teki wrote:
From: Michal Simek mon...@monstr.eu
Initialization spi.
Signed-off-by: Michal Simek mon...@monstr.eu
Acked-by: Stephan Linz l...@li-pro.net
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
Changes for v2:
-
On 07-08-2013 01:17, Jagannadha Sutradharudu Teki wrote:
This is a v2 for previous series with same cover head.
This small series patchset will add suuport for zynq spi
controller, tested on sst flash.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (3):
spi: Add zynq spi controller driver
the smc cs related registers start at 0x600 and loop with 5 registers
so the reserved register should be in at91_smc structure while no in
at91_cs structure. So fix it
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/include/asm/arch-at91/sama5d3_smc.h |2 +-
1 file changed, 1
The CONFIG_MAX_NAND_CHIPS never used, remove it
No where define LCD_TEST_PATTERN, so no need undefine
Signed-off-by: Bo Shen voice.s...@atmel.com
---
include/configs/sama5d3xek.h |2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/sama5d3xek.h b/include/configs/sama5d3xek.h
Hi,
On 08-08-2013 15:02, Nobuhiro Iwamatsu wrote:
This patch adds a driver for Renesas SoC's Queued SPI bus.
This supports with 8 bits per transfer to use with SPI flash.
Signed-off-by: Kouei Abe kouei.abe...@renesas.com
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
Hi,
FYI: I am trying to prepare the spi driver code to more readable.
As each spi driver has a common set of calls.
header file inclusion
Register bit masks
MISC macro definitions
controller reg structure
controller private slave structure
inline func defination
spi_xfer_sub()
From: Dirk Eibach dirk.eib...@gdsys.cc
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
include/configs/dlvision-10g.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h
index a03c462..68e5246 100644
---
From: Dirk Eibach dirk.eib...@gdsys.cc
Up to this point some PHY initialization was done from the FPGA
and some from u-boot.
From now all initialization is done from u-boot.
To keep this maintainable a PHY setup machine was implemented that can
execute commands from initialization arrays.
From: Dirk Eibach dirk.eib...@gdsys.cc
Add a new iocon flavor with a second communiction port per channel.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
board/gdsys/405ep/iocon.c | 36 +---
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git
From: Dirk Eibach dirk.eib...@gdsys.cc
Since I will be on parental leave soon, Reinhard will probably take over
maintaining this series at some point.
Dirk Eibach (4):
powerpc/ppc4xx: Add support for iocon fiber
powerpc/ppc4xx: Add support for iocon-2
powerpc/ppc4xx: Do full iocon PHY
From: Dirk Eibach dirk.eib...@gdsys.cc
Add a new iocon flavor with fiber instead of copper connectivity.
Signed-off-by: Dirk Eibach dirk.eib...@gdsys.cc
---
board/gdsys/405ep/iocon.c | 44
1 file changed, 36 insertions(+), 8 deletions(-)
diff --git
On 08/06/2013 07:50 PM, Mateusz Zalega wrote:
From: Arkadiusz Wlodarczyk a.wlodarc...@samsung.com
Proper adjustment for supporting DFU at GONI target has been made.
The s5p_goni.h file has been updated. Moreover the code for low level
USB initialization has been added to GONI board code.
On 08/06/2013 07:50 PM, Mateusz Zalega wrote:
This commit changes name of an existing initialization function to
board_usb_init(), so that such functions could be reached by every
USB driver and command (ie. do_dfu()).
Signed-off-by: Mateusz Zalega m.zal...@samsung.com
---
Hi,
Any feedback for those patch series?
Best Regards,
Josh Wu
On 7/3/2013 11:11 AM, Josh Wu wrote:
In this patch series, first we make the nand driver can dynamic change sector
size and ecc correct bits.
Then we enable ONFI ecc parameters check.
v2 -- v3: use dev_err/info(host-dev) instead
Fix size calculation in copy of go_to_speed into SRAM.
Use SRAM_CLK_CODE in call to SRAM-based go_to_speed.
Signed-off-by: Albert ARIBAUD albert.u.b...@aribaud.net
---
arch/arm/cpu/armv7/omap3/clock.c | 6 ++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 8 +++-
2 files changed, 5
On Fri, Aug 9, 2013 at 6:17 AM, Kuo-Jung Su dant...@gmail.com wrote:
Hi Jagan:
Thanks for the comments, but the [spi bus controller: ftssp010]
has been scheduled after the [Faraday A36x platform support] get approved.
In this way, the entire patch itself looks much better clean.
Best
Since the parameters need to be modified according to different Serdes
protocols at runtime, the const will block this. Also remove const from
arrays define used by vsc3316_config.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
changes for V2:
1. changed subject;
2. fix broken on B4xxx
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/09/2013 04:48 AM, Jagan Teki wrote:
Hi,
FYI: I am trying to prepare the spi driver code to more readable.
As each spi driver has a common set of calls.
header file inclusion Register bit masks
MISC macro definitions
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/08/2013 03:04 PM, ub...@andestech.com wrote:
Hi Tom,
Please pull the following patch from u-boot-nds32 into your tree.
Thanks!
The following changes since commit
d05bfd0586ccebe96e31976459c8ef45ec65e109:
Merge branch 'master' of
This flag is to make console aware that NET transfer is running or not.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
1. Change configuration name from CONFIG_CTRLC_POLL_MS to CONFIG_CTRLC_POLL_S.
2. New code will be executed only when CONFIG_CTRLC_POLL_S is defined in
TFTP booting is slow when a USB keyboard is installed and
stdin has usbkbd added.
This fix is to change Ctrl-C polling for USB keyboard to every second
when NET transfer is running.
Signed-off-by: Jim Lin ji...@nvidia.com
---
Changes in v2:
1. Change configuration name from CONFIG_CTRLC_POLL_MS
On Thu, Aug 08, 2013 at 11:24:58AM +0200, Wolfgang Denk wrote:
Hello all,
I think we should bring the upcoming U-Boot mini-summit in Edinburgh
back to attention - it's still more than two months, so no reason to
panic yet, but as we all know, time flies like an arrow...
In message
On Fri, Jul 26, 2013 at 03:42:49PM +0200, TENART Antoine wrote:
Hi,
Since the merge window is open, any comment / news on the serie ?
Things look good and I shall pick it up soon for u-boot-ti/master,
thanks!
--
Tom
signature.asc
Description: Digital signature
On 08/09/13 11:30, Jaehoon Chung wrote:
+int board_usb_init(enum board_usb_init_type what_to_init)
{
debug(USB_udc_probe\n);
s3c_udc_probe(s5pc210_otg_data);
+return 0;
Always return 0?
}
You're right, it could pass return value from s3c_udc_probe.
Thanks,
--
Mateusz
On Thu, Aug 08, 2013 at 01:39:33AM +0530, Jagannadha Sutradharudu Teki wrote:
This is v2 series for past read/write instruction support.
this series also includes zynq qspi driver patch set for knowing
usage of these extended/quad read and write commnads.
[snip]
REQUEST FOR ALL SPI CODE
The core specific part of the work is done in the assembly routine
in nonsec_virt.S, introduced with the previous patch, but for the full
glory we need to setup the GIC distributor interface once for the
whole system, which is done in C here.
The routine is placed in arch/arm/cpu/armv7 to allow
To actually trigger the non-secure switch we just implemented, call
the switching routine from within the bootm command implementation.
This way we automatically enable this feature without further user
intervention.
Signed-off-by: Andre Przywara andre.przyw...@linaro.org
---
While actually switching to non-secure state is one thing, another
part of this process is to make sure that we still have full access
to the interrupt controller (GIC).
The GIC is fully aware of secure vs. non-secure state, some
registers are banked, others may be configured to be accessible from
Currently the non-secure switch is only done for the boot processor.
To enable full SMP support, we have to switch all secondary cores
into non-secure state also.
So we add an entry point for secondary CPUs coming out of low-power
state and make sure we put them into WFI again after having
A prerequisite for using virtualization is to be in HYP mode, which
requires the CPU to be in non-secure state first.
Add a new file in arch/arm/cpu/armv7 to hold a monitor handler routine
which switches the CPU to non-secure state by setting the NS and
associated bits.
According to the ARM
armv7.h contains some useful constants, but also C prototypes.
To include it also in assembly files, protect the non-assembly
part appropriately.
Signed-off-by: Andre Przywara andre.przyw...@linaro.org
---
arch/arm/include/asm/armv7.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
(for GIT URL and Changelog see below)
ARM CPUs with the virtualization extension have a new mode called
HYP mode, which allows hypervisors to safely control and monitor
guests. The current hypervisor implementations (KVM and Xen)
require the kernel to be entered in that HYP mode.
This patch
To enable hypervisors utilizing the ARMv7 virtualization extension
on the Versatile Express board with the A15 core tile, we add the
required configuration variable.
Also we define the board specific functions to do the SMP bringup:
smp_set_cpu_boot_addr() to set the start address for secondary
For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.
While doing the non-secure switch, we have to enable the HVC
instruction and setup the HYP mode HVBAR (while still secure).
We defined PHYS_DRAM_1 to 0x8000 (start of DRAM) and then used this
for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1
in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and
then using that name in code.
Signed-off-by: Tom Rini tr...@ti.com
---
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/am335x_evm.h |2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index e32066d..7d755f1 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -314,8
Hey all,
The following series cleans up am335x a bit, and then uses that to
introduce a common config file that can be used on all of the ARMv7
platforms from TI. This series converts am335x_evm, omap5_uevm and
dra7xx_evm to use the new structure. There is room for further cleanup
and
Add the generic poke the SPI bus command, with the SPI related
defines.
Acked-by: Dan Murphy dmur...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/ti_armv7_common.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/ti_armv7_common.h
Add the generic poke a GPIO command, with the GPIO related defines.
Acked-by: Dan Murphy dmur...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/ti_armv7_common.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/ti_armv7_common.h
Update omap5_common.h to use ti_armv7_common.h, and in turn update
dra7xx_evm.h and omap5_uevm.h slightly. The biggest changes here are
that IP blocks which exist on the platform, and had clocks enabled,
now have the drivers being built as well.
Signed-off-by: Tom Rini tr...@ti.com
---
Changes
We create two new files, include/configs/ti_armv7_common.h for all of
the common IP blocks and related features / commands we share in
virtually all of our platforms. We then create
include/configs/ti_am335x_common.h for everything common to the am335x
SoC leaving just the board specific parts to
With device trees, boards do not always set CONFIG_MACH_TYPE now, so we
must not rely on this define being set. The kernel uses ~0 to see if we
have a valid machine number or not, so set that as the default, invalid
machine, id and only fix if CONFIG_MACH_TYPE is set.
Acked-by: Dan Murphy
Bring in the 'boot_fdt' environment variable that i.MX boards use to try
and load a device tree when booting.
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/am335x_evm.h | 21 -
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git
Acked-by: Dan Murphy dmur...@ti.com
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/igep0033.h |4
include/configs/pcm051.h |3 ---
include/configs/ti814x_evm.h |3 ---
3 files changed, 10 deletions(-)
diff --git a/include/configs/igep0033.h
On Fri, Aug 09, 2013 at 05:03:11PM +0200, Andre Przywara wrote:
For the KVM and XEN hypervisors to be usable, we need to enter the
kernel in HYP mode. Now that we already are in non-secure state,
HYP mode switching is within short reach.
While doing the non-secure switch, we have to enable
On Fri, Aug 09, 2013 at 05:03:04PM +0200, Andre Przywara wrote:
(for GIT URL and Changelog see below)
ARM CPUs with the virtualization extension have a new mode called
HYP mode, which allows hypervisors to safely control and monitor
guests. The current hypervisor implementations (KVM and
On Fri, Aug 09, 2013 at 05:03:08PM +0200, Andre Przywara wrote:
The core specific part of the work is done in the assembly routine
in nonsec_virt.S, introduced with the previous patch, but for the full
glory we need to setup the GIC distributor interface once for the
whole system, which is
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/calimain.h |1 -
include/configs/cam_enc_4xx.h |1 -
include/configs/da830evm.h |1 -
include/configs/da850evm.h |1 -
include/configs/davinci_dm365evm.h |1 -
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/galaxy5200.h |7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h
index 984f274..47e65d8 100644
--- a/include/configs/galaxy5200.h
+++
On Fri, Aug 9, 2013 at 10:08 AM, Tom Rini tr...@ti.com wrote:
On Thu, Aug 08, 2013 at 11:24:58AM +0200, Wolfgang Denk wrote:
I think we should bring the upcoming U-Boot mini-summit in Edinburgh
back to attention - it's still more than two months, so no reason to
panic yet, but as we all know,
On Mon, 29 Jul 2013 13:51:44 +0800
Kuo-Jung Su dant...@gmail.com wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Faraday FTLCDC200 Color LCD controller performs translation of
pixel-coded data into the required formats and timings to
drive a variety of single/dual mono and color LCDs.
On Tue, 30 Jul 2013 23:37:52 +0200
Marek Vasut ma...@denx.de wrote:
Allocate the framebuffer aligned so it can be flushed
and the flush_dcache_range() function won't complain.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Anatolij Gustschin ag...@denx.de
Cc: Fabio Estevam
On Tue, 30 Jul 2013 23:37:53 +0200
Marek Vasut ma...@denx.de wrote:
Add hook that allow configuring SmartLCD attached the MXS LCDIF
controller operating in System-Mode. This hook can be overriden
by a platform-specific SmartLCD programming routine, which writes
the SmartLCD specific values
On Tue, 30 Jul 2013 23:37:51 +0200
Marek Vasut ma...@denx.de wrote:
Add special function that executes a specially crafted circular
DMA descriptor. The function doesn't wait for the descriptor to
finish the transfer, since the descritor never finishes. This is
useful when operating a SmartLCD
On Tue, 30 Jul 2013 23:37:54 +0200
Marek Vasut ma...@denx.de wrote:
The LCDIF interface doesn't give us any means to do continuous refresh
when driving a SmartLCD. To work this around, we produce a special
circular DMA descriptor, which only writes the HW_LCDIF_CTRL0 register
and sets the RUN
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/linkstation.h | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h
index 2ec7761..932dac3 100644
--- a/include/configs/linkstation.h
+++
On Thu, Aug 8, 2013 at 10:39 AM, Tom Rini tr...@ti.com wrote:
Hey all,
I want to announce a few custodian changes. Andy Fleming is stepping
down from both his PowerPC and MMC custodianships to go off and do
something non-technical and fun for a while. I want to thank him for
all his time
Hi
Il giorno 09/ago/2013 20:58, Otavio Salvador ota...@ossystems.com.br ha
scritto:
On Fri, Aug 9, 2013 at 10:08 AM, Tom Rini tr...@ti.com wrote:
On Thu, Aug 08, 2013 at 11:24:58AM +0200, Wolfgang Denk wrote:
I think we should bring the upcoming U-Boot mini-summit in Edinburgh
back to
From: Roy Zang tie-fei.z...@freescale.com
Fix the following build error caused by patch powerpc/pcie: add PCIe
version 3.x support:
pcie.c:302:34: error: 'PCI_LTSSM' undeclared (first use in this function)
pcie.c:303:15: error: 'PCI_LTSSM_L0' undeclared (first use in this function)
On 08/03/2013 01:11 AM, Dennis Gilmore wrote:
Hi all,
I wanted to start a discussion on defining a unified feature set that
makes it simpler for the different distros to support ARM systems using
u-boot. I have based a lot of my thoughts on how calxeda ship their
systems configured as it
Dear Stephen Warren,
In message 52056b16.7050...@wwwdotorg.org you wrote:
There's also the possibility of chain-loading e.g. Grub from U-Boot,
which I think would satisfy at least some of your desires, although
there would still be a need for U-Boot's bootcmd to know to modified to
be able
On 08/09/2013 04:49 PM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 52056b16.7050...@wwwdotorg.org you wrote:
There's also the possibility of chain-loading e.g. Grub from U-Boot,
which I think would satisfy at least some of your desires, although
there would still be a need for
On 08/07/2013 10:20 AM, Stephen Warren wrote:
On 08/06/2013 11:52 PM, Simon Glass wrote:
Tegra recently moved to the new I2C framework, which sets up I2C prior to
relocation, and prior to calling i2c_init_board(). This causes a crash on
Tegra boards.
note:
There are many ways to fix this.
On Thu, 2013-07-25 at 15:44 +0800, ying.zh...@freescale.com wrote:
This patch is on top of the patch:
SPL: Makefile: Build a separate autoconf.mk for SPL
Could you fix the reported build problem with that patch and submit it?
-Scott
___
On Fri, 2013-08-09 at 18:00 +0800, Josh Wu wrote:
Hi,
Any feedback for those patch series?
Best Regards,
Josh Wu
Acked-by: Scott Wood scottw...@freescale.com
-Scott
___
U-Boot mailing list
U-Boot@lists.denx.de
On Tue, 2013-08-06 at 15:25 +0530, Pekon Gupta wrote:
BCH8_ECC scheme implemented in omap_gpmc.c driver has following two favours
+---+-+-+
|ECC Scheme | ECC Calculation | Error Detection |
+Tom Rini
Hi Stephen,
On Fri, Aug 9, 2013 at 5:17 PM, Stephen Warren swar...@wwwdotorg.orgwrote:
On 08/07/2013 10:20 AM, Stephen Warren wrote:
On 08/06/2013 11:52 PM, Simon Glass wrote:
Tegra recently moved to the new I2C framework, which sets up I2C prior
to
relocation, and prior to
On 08/09/2013 05:00 PM, Stephen Warren wrote:
On 08/09/2013 04:49 PM, Wolfgang Denk wrote:
Dear Stephen Warren,
In message 52056b16.7050...@wwwdotorg.org you wrote:
There's also the possibility of chain-loading e.g. Grub from U-Boot,
which I think would satisfy at least some of your
69 matches
Mail list logo
