Dear 0xbin4ry,
please keep the list in cc.
On 28.08.13 19:17, 0xbin4ry wrote:
Am 28.08.13 16:58, schrieb Andreas Bießmann:
In s_init you do
_not_ have a full CRT! The BSS is not initialized there and writing data
in BSS will likely corrupt code, at least in the 'normal' u-boot mode
before
Hi Joe, List
-Original Message-
From: Sharma Bhupesh-B45370
Sent: Friday, August 23, 2013 8:18 PM
To: u-boot@lists.denx.de; joe.hershber...@gmail.com
Cc: Goel Arpit-B44344; Sharma Bhupesh-B45370
Subject: [PATCH 1/1] net: phy/vitesse: Add support for VSC8514 phy module
From: Arpit
Hi,
When I do make P1021RDB-PC_36BIT_NAND in u-boot code base, I am getting below
errors.
Look like u-boot is getting oversized. Any idea how can this be resolved
/opt/freescale/usr/local/gcc-4.5.55-eglibc-2.11.55/powerpc-linux-gnu/bin/powerpc-linux-gnu-gcc
-E -g -Os -fpic -mrelocatable
T1040 SoC has
- DDR controller ver 5.0
- 2 PLLs
- 8 IFC Chip select
- FMAN Muram 192K
- No Srio
- Sec controller ver 5.0
- Max CPU update for its personalities
So, update the defines accordingly along with LIODN
Signed-off-by: Prabhakar Kushwaha
CHASSIS2 architecture never defines type of L2 cache present in SoC.
it is dependent upon the core present in the SoC.
for example,
- e6500 core has L2 cluster (Kibo)
- e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
CHASSIS2 architecture never fix clock groups for Cluster and hardware
accelerator like PME, FMA. These are SoC defined. SoC defines :-
- NUM of PLLs present in the system
- Clusters and their Clock group
- hardware accelerator and their clock group
if no clock group, then
On 2013-08-28, Chuck Wical chuck.wi...@amanomcgann.com wrote:
I am trying to load rootfs.ext2.gz.uboot from usb using fatload but
when it reaches a point in writing the file to memory a reset occurs
of the CPU. If I load this file using tftp it works fine. Here are
the commands I am using:
It seems there is no CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK in the latest
master.
I intended to do that for P1010RDB rather than BSC9132, so just drop the patch.
Thanks.
-Original Message-
From: sun york-R58495
Sent: Tuesday, August 20, 2013 7:38 AM
To: Liu Shengzhou-B36685
Cc:
This patch add support for a new Samsung board Trats2.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang mk7.k...@samsung.com
---
MAINTAINERS |4 +
board/samsung/trats2/Makefile | 34 +++
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Lukasz Majewski l.majew...@samsung.com
---
board/samsung/common/multi_i2c.c |4
1 file changed, 4 insertions(+)
diff --git a/board/samsung/common/multi_i2c.c
This patchset add support for a new Samsung board Trats2.
Multi i2c file is updated for third soft I2C adapter for Trats2 board
Battery support is added for Trats2.
This patchset depends on:
http://patchwork.ozlabs.org/patch/254056/
http://patchwork.ozlabs.org/patch/245307/
Changes in v4:
-
-Original Message-
From: Timur Tabi [mailto:ti...@tabi.org]
Sent: Monday, August 12, 2013 7:51 AM
To: Liu Shengzhou-B36685
Cc: U-Boot Mailing List; sun york-R58495
Subject: Re: [U-Boot] [PATCH] powerpc/eeprom: update MAX_NUM_PORTS to fix
program failure
On Thu, Aug 8, 2013 at
Thanks Dave, I will try that.
-Original Message-
From: Liu Dave-R63238
Sent: Thursday, August 29, 2013 1:21 PM
To: Jain Priyanka-B32167; u-boot@lists.denx.de
Subject: RE: observing u-boot build error due to oversizing
Priyanka,
If you use gcc version 4.7.2 (GCC), it will pass
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same output clock value to
calculate the CLKDIV value.
as per user manual: cclk_in = SDCLKIN / (DIVRATIO + 1)
Input
*changes in v3*
[PATCH 1/5] (complete change)
- ecc-scheme is selection is controller by s/w, not CONFIG_NAND_xx
- added omap_select_ecc_scheme(), as common function to handle all
ecc-scheme related configurations for both board_nand_init()
BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours
+---+-+-+
|ECC Scheme | ECC Calculation | Error Detection |
+---+-+-+
chip-ecc.calculate() is used for calculating and fetching of ECC syndrome by
processing the data passed during Read/Write accesses.
All H/W based ECC schemes use GPMC controller to calculate ECC syndrome.
But each BCHx_ECC scheme has its own implemetation of post-processing and
fetching ECC
chip-ecc.hwctl() is used for preparing the H/W controller before read/write
NAND accesses (like assigning data-buf, enabling ECC scheme configs, etc.)
Though all ECC schemes in OMAP NAND driver use GPMC controller for generating
ECC syndrome (for both Read/Write accesses). But but in current code
NAND boot mode on AM335x EVM has been verified, and steps
to use it has been documented and update in this README
Signed-off-by: Pekon Gupta pe...@ti.com
---
board/ti/am335x/README | 59 +++---
1 file changed, 42 insertions(+), 17 deletions(-)
diff
chip-ecc.correct() is used for detecting and correcting bit-flips during read
operations. In omap-nand driver it implemented as:
(a) omap_correct_data(): for h/w based ECC_HAM1 scheme
(b) omap_correct_data_bch() + CONFIG_NAND_OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
for ECC_BCH8 scheme using
CCing the MMC Maintainer.
On Thu, Aug 29, 2013 at 4:22 PM, Rajeshwari S Shinde
rajeshwar...@samsung.com wrote:
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside controller by the DIVRATIO value set
in the CLKSEL register, we need to use the same
Hi,
I am trying to add a new command in uboot(common/cmd_..).
I need to have almost 5-6 arguements to that command.
Is it possible to write these arguements in a file which can be read by the
implementation of the command?
Is it possible to create and read file at runtime?
Is there any other
Priyanka,
If you use gcc version 4.7.2 (GCC), it will pass the build
Regards,
Dave
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-boun...@lists.denx.de] On
Behalf Of Jain Priyanka-B32167
Sent: Thursday, August 29, 2013 3:31 PM
To: u-boot@lists.denx.de
Subject:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/29/2013 06:56 AM, Pekon Gupta wrote:
NAND boot mode on AM335x EVM has been verified, and steps
to use it has been documented and update in this README
Signed-off-by: Pekon Gupta pe...@ti.com
[snip]
+ # redundant copies of MLO are kept
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/29/2013 09:01 AM, Gupta, Pekon wrote:
On 08/29/2013 06:56 AM, Pekon Gupta wrote:
NAND boot mode on AM335x EVM has been verified, and steps
to use it has been documented and update in this README
Signed-off-by: Pekon Gupta pe...@ti.com
Romain Izard romain.izard.pro at gmail.com writes:
On 2013-08-28, Chuck Wical chuck.wical at amanomcgann.com wrote:
I am trying to load rootfs.ext2.gz.uboot from usb using fatload but
when it reaches a point in writing the file to memory a reset occurs
of the CPU. If I load this file
Hi Chuck,
On 29/08/2013 15:32, Chuck Wical wrote:
My concern is the cross-compiler that was created by a third party may not
be compatible with newer versions of U-Boot and I would need to go through
the patches to see if there was anything custom created. As you probably
understand this is
On Mon, Aug 19, 2013 at 04:48:04PM +0200, Heiko Schocher wrote:
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted here:
http://patchwork.ozlabs.org/patch/263211/
On Thu, Aug 29, 2013 at 5:04 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
CCing the MMC Maintainer.
On Thu, Aug 29, 2013 at 4:22 PM, Rajeshwari S Shinde
rajeshwar...@samsung.com wrote:
This patch corrects the divider value written to CLKDIV register.
Since SDCLKIN is divided inside
On Thu, Aug 29, 2013 at 04:26:41PM +0530, Pekon Gupta wrote:
BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours
+---+-+-+
|ECC Scheme | ECC Calculation | Error Detection |
On 08/29/2013 04:56 AM, Liu Shengzhou-B36685 wrote:
If the EEPROM is 128 bytes, then you have a non-conformant EEPROM.
What is a conformant EEPROM?
A conformant EEPROM has a size of 256 bytes .
The size of struct of EEPROM_NXID should be able to conform to real size of
EEPROM, regardless
On Thu, Aug 29, 2013 at 04:26:40PM +0530, Pekon Gupta wrote:
*changes in v3*
[PATCH 1/5] (complete change)
- ecc-scheme is selection is controller by s/w, not CONFIG_NAND_xx
- added omap_select_ecc_scheme(), as common function to handle all
ecc-scheme related
Hello,
I'm working with an AMCC based board and I'm running into an issue when I
set my uart0 baud rate. In the include/configs/amcc-common.h there is the
following code:
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,
From: James Chargin [mailto:jimccr...@gmail.com]
On 08/28/2013 08:07 AM, ANDY KENNEDY wrote:
All,
In an effort to play by the rules, we created a stand alone app that
handles breaking the boot process with bootdelay set to 0. We require
a special key sequence to break into the boot
Some _CLKGATE_MASK and _FRAC_MASK macros were wrong for PFD_480
and the PFD_528 macros were missing.
Fortunately, the incorrect macros weren't being used.
Since both the PFD_480 and PFD_528 registers have the same
structure, and the fields are identical for [0..3] in bytes
[0..3], so a single
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
board/boundary/nitrogen6x/nitrogen6x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
b/board/boundary/nitrogen6x/nitrogen6x.c
index 79ab449..58fe8ae 100644
---
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/29/2013 01:26 PM, Gupta, Pekon wrote:
On Thu, Aug 29, 2013 at 04:26:40PM +0530, Pekon Gupta wrote:
*changes in v3*
[PATCH 1/5] (complete change)
- ecc-scheme is selection is controller by s/w, not CONFIG_NAND_xx
- added
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/include/asm/arch-mx6/sys_proto.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h
b/arch/arm/include/asm/arch-mx6/sys_proto.h
index bfdfd29..8c21364 100644
---
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 08/29/2013 02:14 PM, Gupta, Pekon wrote:
Hi,
Need a help in debugging the spl boot via NAND.
NAND Device is flashed with valid 'MLO' and 'u-boot.img'.
Also it boots via MMC/SD perfectly using same images.
But is NAND-SPL boot gets stuck
On 08/29/2013 10:45 AM, Eric Nelson wrote:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
board/boundary/nitrogen6x/nitrogen6x.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c
These patches are in preparation for a patch to address errata
ERR006282 as described in this document:
https://community.freescale.com/docs/DOC-94581
And as implemented in Freescale's 2009.08-based release:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/
Commit
This clock isn't feeding anything under U-Boot, so there's no
point in changing it from power-on default.
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
Patch V1 changed the settings to use new macros
V2 simply discards the code
board/boundary/nitrogen6x/nitrogen6x.c | 5 -
Some _CLKGATE_MASK and _FRAC_MASK macros were wrong for PFD_480
and the PFD_528 macros were missing.
Fortunately, the incorrect macros weren't being used.
Since both the PFD_480 and PFD_528 registers have the same
structure, and the fields are identical for [0..3] in bytes
[0..3], so a single
This addresses silicon errata ERR006282 as described in this
document:
https://community.freescale.com/docs/DOC-94581
Also implemented in Freescale's 2009.08-based release:
http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/
Commit id:
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Tom Rini
On Wed, Aug 28, 2013 at 03:07:47PM +, ANDY KENNEDY wrote:
All,
In an effort to play by the rules, we created a stand alone app that
handles breaking the boot process with bootdelay set to 0. We require
a special
Hi Eric,
Am 29/08/2013 19:57, schrieb Eric Nelson:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/include/asm/arch-mx6/sys_proto.h | 7 +++
1 file changed, 7 insertions(+)
Patch is marked as 3/5 in subject - is it part of a patchset ?
diff --git
Hi Stefano,
On 08/29/2013 02:02 PM, Stefano Babic wrote:
Hi Eric,
Am 29/08/2013 19:57, schrieb Eric Nelson:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/include/asm/arch-mx6/sys_proto.h | 7 +++
1 file changed, 7 insertions(+)
Patch is marked as 3/5 in
From: Oliver Metz oli...@freetz.org
Signed-off-by: Oliver Metz oli...@freetz.org
Tested-by: Luka Perkov l...@openwrt.org
---
v1 - v2:
* fix checkpatch.pl warnings
tools/env/fw_env.c | 70 --
1 file changed, 42 insertions(+), 28 deletions(-)
From: Oliver Metz oli...@freetz.org
Signed-off-by: Oliver Metz oli...@freetz.org
Tested-by: Luka Perkov l...@openwrt.org
---
v1 - v2:
* correct spelling of redundant
tools/env/fw_env.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/tools/env/fw_env.c b/tools/env/fw_env.c
index
Dear Przemyslaw Marczak,
On 28/08/13 23:36, Przemyslaw Marczak wrote:
This change allow to use sd card on Goni the same like mmc 0.
SD card is mmc dev 1, so it can be used like this: fatls mmc 1:2.
Changes in V2:
- Init SD card even if eMMC init fail.
Signed-off-by: Przemyslaw Marczak
Tested-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon Chung
On 08/29/2013 05:49 PM, Piotr Wilczek wrote:
This patchset add support for a new Samsung board Trats2.
Multi i2c file is updated for third soft I2C adapter for Trats2 board
Battery support is added for Trats2.
This
On 21/08/13 14:08, Chander Kashyap wrote:
The Arndale board is based on samsung's exynos5250 SOC.
For spl generation, it depends on the patch at [5].
First patch provides the basic arndale board support. The second patch
adds the MMC support.
Changes in v2:
- split from earlier
On 15/07/13 23:46, Tom Rini wrote:
On Tue, Jun 25, 2013 at 09:59:47AM +0200, Piotr Wilczek wrote:
This patch add new functions to pmic max77686 to set voltage and mode.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
CC: Minkyu Kang
Dear Piotr Wilczek,
On 29/08/13 17:49, Piotr Wilczek wrote:
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
drivers/power/battery/Makefile |1 +
drivers/power/battery/bat_trats2.c | 65
Hello Tom,
Am 29.08.2013 16:05, schrieb Tom Rini:
On Mon, Aug 19, 2013 at 04:48:04PM +0200, Heiko Schocher wrote:
- add omap24xx driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Tested on the am335x based siemens boards rut, dxr2 and pxm2
posted
Hi Tom,
On Friday 23 August 2013 09:56 PM, Tom Rini wrote:
Test on Beaglebone white over cpsw, usb ether and SD card (read and
write), performance increased, crc32 of data matches.
Signed-off-by: Tom Rini tr...@ti.com
---
arch/arm/cpu/armv7/am33xx/board.c |8
1 file changed,
On 28/08/13 20:47, Tushar Behera wrote:
On 19 August 2013 11:30, Tushar Behera tushar.beh...@linaro.org wrote:
On 19 August 2013 10:01, Donghwa Lee dh09@samsung.com wrote:
On 2013년 08월 19일 12:06, Tushar Behera wrote:
On 19 August 2013 07:22, Donghwa Lee dh09@samsung.com wrote:
On Fri,
Stefano,
Thank you for reviewing this patch, and for the constructive comments.
Most of your comments are taken on board, and we will re-submit updated patches
in the near future.
On some things we probably need some clarification, see inlined responses
to some of your questions.
---
Dear Albert,
The following changes since commit 9ed887caecb9ecb0c68773a1870d143b9f28d3da:
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' (2013-08-17
18:24:13 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-samsung master
for you to fetch changes up to
Eric,
On Wed, 28 Aug 2013 16:26:44 +0200
Eric Bénard e...@eukrea.com wrote:
Le Wed, 28 Aug 2013 19:23:33 +0800,
Tapani tap...@technexion.com a écrit :
Add support for TechNexion edm-cf-imx6 SoM
The edm1-cf-imx6 SoM comes in three variants, one with imx6 solo cpu,
one
On 29.08.2013 18:08, txcotrader wrote:
I'm working with an AMCC based board and I'm running into an issue when I
set my uart0 baud rate. In the include/configs/amcc-common.h there is the
following code:
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE \
{300, 600,
On 29/08/2013 23:09, Eric Nelson wrote:
Hi Stefano,
On 08/29/2013 02:02 PM, Stefano Babic wrote:
Hi Eric,
Am 29/08/2013 19:57, schrieb Eric Nelson:
Signed-off-by: Eric Nelson eric.nel...@boundarydevices.com
---
arch/arm/include/asm/arch-mx6/sys_proto.h | 7 +++
1 file changed, 7
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