Hello Michael,
Am 20.09.2013 22:40, schrieb Michael Burr:
Changes:
'zynq_i2c.c':
Adapted driver for compliance with new I2C driver model
(CONFIG_SYS_I2C).
Support for 0-length register address in 'i2c_write', 'i2c_read'.
'i2c.h', 'i2c_core.c':
Support for Texas Instruments PCA9548 bus
AR8035 driver will be never applied because of wrong mask for
AR8031 driver. Fix this.
Signed-off-by: Heiko Schocher h...@denx.de
Reported-by: Pavel Nakonechny pavel.nakonec...@skitlab.ru
Cc: Andy Fleming aflem...@freescale.com
Cc: Joe Hershberger joe.hershber...@gmail.com
---
From: Tang Yuantian yuantian.t...@freescale.com
The offset of register address within GPIO module is just
CONFIG_SYS_MPC85xx_GPIO_ADDR, no reason to add 0xc00.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
arch/powerpc/include/asm/mpc85xx_gpio.h | 4 ++--
1 file changed, 2
Hi all,
First, My uboot version is 2013.04.
In the function scan_write_bbt(), U-boot uses MTD_OOB_PLACE to write BBT
data and BBT pattern. See below
static int scan_write_bbt(struct mtd_info *mtd, loff_t offs, size_t len,
uint8_t *buf, uint8_t *oob)
{
Hi, experts:
Is the u-boot's NAND OOB-layout same with linux kernel's nand drivers?
Best wishes,
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On Sat, Sep 21, 2013 at 8:31 PM, Po Liu po@freescale.com wrote:
+void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
+{
+ int ret = i2c_read(i2c_address, 0, 2, (uchar *)spd,
(uchar) is wrong.
int i2c_read(uint8_t chip, unsigned int addr, int alen,
On Tue, Sep 17, 2013 at 10:59 AM, York Sun york...@freescale.com wrote:
I am wondering if there is generic
DDR driver used by many ARM platforms, like the one we have for
powerpc/mpc85xx SoCs.
Sadly, no such thing exists. There is no generic DDR controller for
ARM. I'm working on DDR
On Thu, Sep 19, 2013 at 3:57 PM, Tom Rini tr...@ti.com wrote:
Thinking back, as a rule of thumb, PowerPC has SPD I2C data
available, usually. That's not the rule for ARM. One of a few choices
happen:
Even if you do have SPD on your ARM chip, that's still no guarantee
that you can program
Dear Timur,
In message caozdjxvdf7z7ya8p4nkybp1wj1cnmts736cetrnp_9yqygq...@mail.gmail.com
you wrote:
On Tue, Sep 17, 2013 at 10:59 AM, York Sun york...@freescale.com wrote:
I am wondering if there is generic
DDR driver used by many ARM platforms, like the one we have for
powerpc/mpc85xx
Hello,
On 08/24/2013 06:32 PM, Jeroen Hofstee wrote:
4) Keep the s_init in crt0.S or move it to the board_init_f?
The disadvantage of the later is that all the different
board_init_f's need to call system_init.
Since this has been on the mailing-list for a month without a reply,
let's push
Hi Vikas,
On Sun, Sep 22, 2013 at 1:16 PM, Vikas N Kumar vi...@vikaskumar.org wrote:
Hi
I am trying to get verified boot working for the Beaglebone Black (BBB)
and have gotten the FIT image part working with a kernel and an FDT
blob for the BBB.
However, I am a little confused by the
Hi
I am trying to get verified boot working for the Beaglebone Black (BBB)
and have gotten the FIT image part working with a kernel and an FDT
blob for the BBB.
However, I am a little confused by the documentation
which says that u-boot also needs an FDT blob (with CONFIG_OF_CONTROL)
to embed
Dear Fabio Estevam,
From: Fabio Estevam fabio.este...@freescale.com
If cpu_eth_init() fails we should return the error immediately.
Cc: Marek Vasut ma...@denx.de
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
Acked-by: Marek Vasut ma...@denx.de
---
Dear Troy Kisky,
On 9/20/2013 3:58 AM, Marek Vasut wrote:
Dear Troy Kisky,
Only perform one copy, either in the bounce
routine for IN transfers, or the debounce
rtn for OUT transfer.
On out transfers, only copy the number
of bytes received from the bounce buffer
Dear Troy Kisky,
On 9/20/2013 3:52 AM, Marek Vasut wrote:
Dear Troy Kisky,
set wMaxPacketSize for full speed descriptors
fs_source_desc, fs_sink_desc to 64.
Full-speed bulk endpoint can have a maximum packet size of
8, 16, 32, or 64 bytes, so choice 64.
The hs_source_desc,
Dear Troy Kisky,
On 9/20/2013 3:45 AM, Marek Vasut wrote:
Dear Troy Kisky,
i.mx6 has 1 otg controller, and 3 host ports. So,
CONFIG_USB_MAX_CONTROLLER_COUNT can be greater than 1
even though only 1 device mode controller is supported.
Signed-off-by: Troy Kisky
Prevent a crash when PXE boot calls do_bootm with a vmlinuz formatted image.
In this case, there will be a null cmdtp pointer, and we must not dereference
it.
Signed-off-by: Steven A. Falco stevenfa...@gmail.com
---
In file cmd_pxe.c around line 687 is a call:
do_bootm(NULL, 0, bootm_argc,
Hi Simon,
On Fri, Sep 20, 2013 at 8:31 PM, Simon Glass s...@chromium.org wrote:
Hi Rajeshwari,
On Fri, Sep 20, 2013 at 3:32 AM, Rajeshwari Birje
rajeshwari.bi...@gmail.com wrote:
Hi Simon
Thank you for coments.
Regards,
Rajeshwari Shinde
On Thu, Sep 19, 2013 at 11:27 AM, Simon
Hi Simon,
On Thu, Sep 19, 2013 at 11:41 AM, Simon Glass s...@chromium.org wrote:
On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde
rajeshwar...@samsung.com wrote:
When variable size SPL is used, the BL1 expects the SPL to be
encapsulated differently: instead of putting the checksum
Hi Simon,
On Sat, Sep 21, 2013 at 8:11 AM, Simon Glass s...@chromium.org wrote:
Hi Rajeshwari,
On Wed, Sep 11, 2013 at 4:01 AM, Rajeshwari S Shinde
rajeshwar...@samsung.com wrote:
Create a common board.c file for all functions which are common across
all EXYNOS5 platforms.
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